2011 Microchip Technology Inc. DS80521A-page 1
PIC16(L)F720/721
The PIC16(L)F720/721 family devices that you have
received conform functionally to the current Device Data
Sheet (DS41341E), except for the anomalies described
in this document.
The silicon issues discussed in the following pages are
for silicon revisions with the Device and Revision IDs
listed in Table 1. The silicon issues are summarized in
Table 2.
The errata describ ed in this document will be addressed
in future revisions of the PIC16(L)F720/721 silicon.
Data Sheet clarifications and corrections start on page 4,
following the discu ssion of silicon issues .
The silicon revision level can be identified using the
current version of MPLAB® IDE and Microchip’s
programmers, debuggers, and emulation tools, which
are available at the Microchip corporate web site
(www.microchip.com).
For example, to identify the silicon revision level using
MPLAB IDE in conjunction with MPLAB ICD 2 or
PICkit™ 3:
1. Using the appropriate interface, connect the
device to the MPLAB ICD 2 programmer/
debugger or PICkit™ 3.
2. From the main menu in MPLAB IDE, select
Configure>Select Device, and then select the
target part number in the dialog box.
3. Select the MPLAB hardware tool
(Debugger>Select Tool).
4. Perform a “Connect” operation to the device
(Debugger>Connect). Depending on the
development tool used, the part number and
Device Revision ID value appear in the Output
window.
The DEVREV values for the various PIC16(L)F720/721
silicon revisions are shown in Table 1.
Note: This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated in the last column of
Table 2 apply to the current silicon
revision (A3).
Note: If you are unable to extract the silicon
revision level, please contact your local
Microchip sales office for assistance.
TABLE 1: SILICON DEVREV VALUES
Part Number Device ID(1) Rev ision ID for Si licon Revi sion(2)
A3
PIC16F720 01 1100 000x xxxx 0x3
PIC16LF720 01 1100 010x xxxx 0x3
PIC16F721 01 1100 001x xxxx 0x3
PIC16LF721 01 1100 011x xxxx 0x3
Note 1: The Device ID is located at 2006h. The 5 Least Significant bits comprise the revision ID.
2: Refer to the “PI C16F720/721 Mem ory Programming Specification” (DS41409) for detailed info rma tio n on
Device and Revi sion IDs for your specific de vice.
PIC16(L)F720/721 Family
Silicon Errata and Data Sheet Clarification
PIC16(L)F720/721
DS80521A-page 2 2011 Microchip Technology Inc.
TABLE 2: SILICON ISSUE SUMMARY
Module Feature Item
Number Issue Summary Affected Revis ions (1)
A3
AUSART OERR Flag 1.1 OERR flag not clea ring. X
AUSART Interrupts 1.2 Starting the Interrupt Service Routine. X
Interrupts Stack Push 2. Interrupt logic incorrectly pushes two addresses to
the stack. X
2011 Microchip Technology Inc. DS80521A-page 3
PIC16(L)F720/721
Silicon Errata Issues
1. Module: AUSART
1.1 OERR Flag Not Clearing
The OERR flag of the RCST A register is reset only
by either clearing the CREN bit of the RCSTA
register or by a device Reset. Clearing the SPEN
bit of the RCS TA registe r does n ot clear the OER R
flag.
Work around
Clear the OERR flag by clearing the CREN bit in
lieu of clearing the SPEN bit.
Affected Silicon Revisions
1.2 Starting the Interrupt Service Routine
When the AU SAR T i s c onf igu red for Sy nc hro nou s
mode and either an RCIF or TXIF flag event wake s
the device from Sleep, then execution of the
Interrupt Service Routine (ISR) will begin
immed iately af ter the t wo instr uctions f ollowin g the
SLEEP instruction have finished executing.
Work around
Follow the SLEEP instruction with two NOP
instructions or two instructions desired to be
executed before the ISR begins.
Affected Silicon Revisions
2. Module: Interrupts
The interrupt logic incorrectly pushes two
addresses to the stack when vectoring to the
interrupt vector. Specifically, the interrupt vector
address 0x4 is in correctly p ushed to the stack af ter
the current PC, at the time the interrupt was
received, is pushed. This will cause the stack to
overflow if the user program is operating seven
calls deep when an interrupt arrives. Because the
stack is circular , the overflow causes the first stack
address to be overw ritt en.
Work around
Disable interrupts by clearing the GIE bit in the
INTCON register whenever the user program is
operating seven calls deep. This ensures that
interrupts will not cause the stack to overflow.
Affected Silicon Revisions
Note: This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (as applicable).
A3
X
A3
X
A3
X
PIC16(L)F720/721
DS80521A-page 4 2011 Microchip Technology Inc.
Data Sheet Clarificati ons
None.
2011 Microchip Technology Inc. DS80521A-page 5
PIC16(L)F720/721
APPENDIX A: DOCUMENT
REVISION HISTORY
Rev. A Document (02/2011)
Original release of this document.
PIC16(L)F720/721
DS80521A-page 6 2011 Microchip Technology Inc.
NOTES:
2011 Microchip Technology Inc. DS80521A-page 7
Information contained in this publication regarding device
applications a nd t he lik e is provid ed only for your convenience
and may be su perseded by updates. I t is y our respo ns i bil it y to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
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OTHERWISE, RELATED TO THE INFORMATION,
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Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PI CSTART,
PIC32 logo, rfPIC and UNI/O are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONIT OR, FanSense, HI-TIDE , In - Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Cert ified
logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance,
TSHARC, UniWinDriver, WiperLock and ZENA are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip T echnology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2011, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-60932-914-3
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that it s family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is c onstantly evolving. We a t Microc hip are co m mitted to continuously improving the code prot ect ion featur es of our
products. Attempts to break Microchip’ s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and d sPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperiph erals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS80521A-page 8 2011 Microchip Technology Inc.
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