FQB12P20TM_SB82075 - Fairchild Semiconductor Corporation

May 2000

Rev. A, May 2000

FQB12P20 / FQI12P20

QFET

QFETQFET

QFETTM

FQB12P20 / FQI12P20

200V P-Channel MOSFET

General Description

These P-Channel enhancement mode power field effect

transistors are produced using Fairchild’s proprietary,

planar stripe, DMOS technology.

This advanced technology has been especially tailored to

minimize on-state resistance, provide superior switching

performance, and withstand high energy pulse in the

avalanche and commutation mode. These devices are well

suited for high efficiency switching DC/DC converters.

Features

• -11.5A, -200V, RDS(on) = 0.47Ω @VGS = -10 V

• Low gate charge ( typical 31 nC)

• Low Crss ( typical 30 pF)

• Fast switching

• 100% avalanche tested

• Improved dv/dt capability

Absolute Maximum Ratings TC = 25°C unless otherwise noted

Thermal Characteristics

Symbol Parameter FQB12P20 / FQI12P20 Units

VDSS Drain-Source Voltage -200 V

IDDrain Current - Continuous (TC = 25°C) -11.5 A

- Continuous (TC = 100°C) -7.27 A

IDM Drain Current - Pulsed (Note 1) -46 A

VGSS Gate-Source Voltage ± 30 V

EAS Single Pulsed Avalanche Energy (Note 2) 810 mJ

IAR Avalanche Current (Note 1) -11.5 A

EAR Repetitive Avalanche Energy (Note 1) 12 mJ

dv/dt Peak Diode Recovery dv/dt (Note 3) -5.5 V/ns

PDPower Dissipation (TA = 25°C) * 3.13 W

Power Dissipation (TC = 25°C) 120 W

- Derate above 25°C 0.96 W/°C

TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C

TLMaximum lead temperature for soldering purposes,

1/8" from case for 5 seconds 300 °C

Symbol Parameter Typ Max Units

RθJC Thermal Resistance, Junction-to-Case -- 1.04 °C/W

RθJA Thermal Resistance, Junction-to-Ambient * -- 40 °C/W

RθJA Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W

* When mounted on the minimum pad size recommended (PCB Mount)

D2-PAK

FQB Series I2-PAK

FQI Series

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FQB12P20 / FQI12P20

(Note 4)

(Note 4, 5)

(Note 4)

Rev. A, May 2000

Elerical Characteristics TC = 25°C unless otherwise noted

Notes:

1. Repetitive Rating : Pulse width limited by maximum junction temperature

2. L = 9.2mH, IAS = -11.5A, VDD = -50V, RG = 25 Ω, Starting TJ = 25°C

3. ISD ≤ -11.5 A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C

4. Pulse Test : Pulse width ≤300µs, Duty cycle ≤2%

5. Essentially independent of operating temperature

Symbol Parame ter Test Co nditions Min Typ Max Unit s

Off Characteristics

BVDSS Drain-S ource Breakdown Voltage VGS = 0 V, ID = -250 µA-200 -- -- V

∆BVDSS

/ ∆TJ

Breakdown Voltage Temperature

Coefficient ID = -250 µA, Referenced to 25°C -- - -- V/°C

IDSS Zero Gate Voltage Drain Current VDS = -200 V, VGS = 0 V -- -- -1 µA

VDS = -160 V, TC = 125°C -- -- -10 µA

IGSSF Gate-Body Leakage Current, Forward VGS = -30 V, VDS = 0 V -- -- -100 nA

IGSSR Gate-Body Leakage Current, Reverse VGS = 30 V, VDS = 0 V -- -- 100 nA

On Characteri st ics

VGS(th) Gate Threshold Voltage VDS = VGS, ID = -250 µA-3.0 -- -5.0 V

RDS(on) Static Drain-Source

On-Resistance VGS = -10 V, ID = -5.75 A -- 0.36 0.47 Ω

gFS Forward Transconductance VDS = -40 V, ID = -5.75 A -- 6.4 -- S

Dynamic Characteristics

Ciss Input Capacitance VDS = -25 V, VGS = 0 V,

f = 1.0 MHz

-- 920 1200 pF

Coss Output Capacitance -- 190 250 pF

Crss Reverse Transf er Capacitance -- 30 40 pF

Switching Characteristics

td(on) Turn-On Delay Time VDD = -100 V, ID = -11. 5 A,

RG = 25 Ω

-- 20 50 ns

trTurn-On Rise Time -- 195 400 ns

td(off) Turn-Off De l a y Time -- 40 90 ns

tfTurn-Off Fa ll Time -- 6 0 130 ns

QgTotal Gate Charge VDS = -160 V, ID = -11.5 A,

VGS = -10 V

-- 31 40 nC

Qgs Gate-Source Charge -- 8.1 -- nC

Qgd Gate-Drain Charge -- 16 -- nC

Drain-Source Diode Characteristics and Maximum Ratings

ISMaximum Continuous Drain-Source Diode Forward Current -- -- -11.5 A

ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- -46 A

VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = -11.5 A -- -- -5.0 V

trr Reverse Recovery Time VGS = 0 V, IS = -11.5 A,

dIF / dt = 100 A/µs

-- 180 -- ns

Qrr Reverse Recovery Charge -- 1.44 -- µC

FQB12P20 / FQI 12P20

Rev. A, May 2000

0 5 10 15 20 25 30 35

VDS = -100V

VDS = -40V

VDS = -160V

※ Note : ID = -11.5 A

-VGS , Gate-Source Voltage [V]

QG, Total Gate Charge [n C]

10-1 100101

400

800

1200

1600

2000

2400 Ciss = Cgs + Cgd (Cds = shorted)

Coss = Cds + Cgd

Crss = Cgd

※ Notes :

1. VGS = 0 V

2. f = 1 M Hz

Crss

Coss

Ciss

Capacitance [pF]

-VDS, Drain-Source Voltage [V]

0.0 0.5 1.0 1.5 2.0 2.5 3.0

10-1

100

101

150℃

※ No tes :

1. VGS = 0V

2. 250μ

s Pu lse T es t

25℃

-IDR , Reverse Drain Current [A]

-VSD , Sou r c e-Dr ain V oltag e [V]

0 10203040

0.0

0.5

1.0

1.5

2.0

※ N o te : TJ = 25℃

VGS = - 20V

VGS = - 10V

RDS(on) [Ω],

Drain-Source On-Resistance

-ID , Drain C u rrent [A]

246810

10-1

100

101

150℃

25℃

-55℃

※ No tes :

1. VDS = -40V

2. 250μ

s Pu lse T es t

-ID , Dra in Cu rr e nt [A ]

-VGS , Gate-Source Voltage [V]

10-1 100101

10-1

100

101

VGS

Top : -15.0 V

-10.0 V

-8.0 V

-7.0 V

-6.5 V

-6.0 V

Bo ttom : -5.5 V

※ Notes :

1. 250μ

s Pulse Test

2. TC = 25℃

-ID, Drain Current [A]

-VDS, Drain-Source Voltage [V]

Typical Characteristics

Figure 5. C apacitanc e Ch aracterist i cs Figure 6. Ga te Ch arge Cha ra ct eri stics

Figu re 3. On-Resistan ce Vari ation vs.

Drain Current and Gate Voltage Figure 4. Body Diode Fo rwa rd Voltage

Variation vs. Source Current

and Temperature

Figure 2. Transfer CharacteristicsFigure 1. On- R egi on Character i st ic s

FQB12P20 / FQI12P20

Rev. A, May 2000

10-5 10-4 10-3 10-2 10-1 100101

10-2

10-1

100

※ No tes :

1 . ZθJC(t) = 1.04 ℃/W M a x .

2 . D u ty F a c t o r, D = t1/t2

3 . TJM - T C = PDM * Z θJC(t)

single pulse

D=0.5

0.02

0.2

0.05

0.1

0.01

ZθJC

(t), Therm al Response

t1, Sq u a re W a ve P u ls e Dura tio n [s ec ]

25 50 75 100 125 150

-ID, Drain C urrent [A ]

TC, Case Temperature [℃

]

100101102

10-1

100

101

102

10 m s

1 m s

100 µs

Operation in This Area

is Limited b y R DS(on)

※ Notes :

1. TC = 25 oC

2. TJ = 150 oC

3. Single Pulse

-ID, Drain Current [A]

-VDS, Drain-Source Voltage [V]

-100 -50 0 50 100 150 200

0.0

0.5

1.0

1.5

2.0

2.5

※ No tes :

1. VGS = -10 V

2. ID = -5.75 A

RDS(ON) , (N o r ma liz ed)

Drain-Source On-Resistance

TJ, Junction Temp erature [oC]

-100 -50 0 50 100 150 200

0.8

0.9

1.0

1.1

1.2

※ Notes :

1 . VGS = 0 V

2 . ID = -250 μ

-BV DSS , (N ormaliz e d )

Drain-Source Breakdow n Voltage

TJ, Junction Tem perature [oC]

Typical Characteristics (Continued)

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current

vs. Case Temperature

Figu re 7. Breakdown Volta ge Variation

vs. Temperature Figure 8. On-Resistance Variation

vs. Temperature

Figure 11. Transient Ther mal Res ponse Curve

PDM

FQB12P20 / FQI 12P20

Rev. A, May 2000

Charge

VGS

-10V Qg

Qgs Qgd

-3mA

VGS

DUT

VDS

300nF

50KΩ

200nF

12V

Same Type

as DUT

Charge

VGS

-10V Qg

Qgs Qgd

-3mA

VGS

DUT

VDS

300nF

50KΩ

200nF

12V

Same Type

as DUT

VDS

VGS 10%

90%

td(on) tr

ton toff

td(off) tf

VDD

-10V

VDS RL

DUT

VGS

VDS

VGS 10%

90%

td(on) tr

ton toff

td(off) tf

VDD

-10V

VDS RL

DUT

VGS

EAS =LI

AS2

----

1--------------------

BVDSS -V

BVDSS

VDD

VDS

BVDSS

t p

VDD

IAS

VDS (t)

ID (t)

Time

-10V DUT

t p

EAS =LI

AS2

----

EAS =LI

AS2

----

1--------------------

BVDSS -V

BVDSS

VDD

VDS

BVDSS

t p

VDD

IAS

VDS (t)

ID (t)

Time

-10V DUT

t p

Gate Charge Test Circuit & Waveform

Resistive Switching Test Circuit & Waveforms

Unclamped Inductive Switching Test Circuit & W aveforms

FQB12P20 / FQI12P20

Rev. A, May 2000

Peak Diode Recovery dv/dt Test Circ ui t & Waveform s

DUT

VDS

Driver

RGCompliment of DUT

(N-Channel)

VGS • dv/dt controlled by RG

•I

SD con trolled by pulse period

VDD

ISD

10V

VGS

( Driver )

ISD

( DUT )

VDS

( DUT )

VDD

Body Diode

Forward Voltage Drop

VSD

IFM , Body Diode Forward Current

Body Diode Reverse Current

IRM

Body Diode Recovery dv/dt

di/dt

D = Gate Pulse Width

Gate Pu lse P eri od

--------------------------

DUT

VDS

Driver

RGCompliment of DUT

(N-Channel)

VGS • dv/dt controlled by RG

•I

SD con trolled by pulse period

VDD

ISD

10V

VGS

( Driver )

ISD

( DUT )

VDS

( DUT )

VDD

Body Diode

Forward Voltage Drop

VSD

IFM , Body Diode Forward Current

Body Diode Reverse Current

IRM

Body Diode Recovery dv/dt

di/dt

D = Gate Pulse Width

Gate Pu lse P eri od

--------------------------

D = Gate Pulse Width

Gate Pu lse P eri od

--------------------------

FQB12P20 / FQI 12P20

Rev. A, May 2000

Package Dimensions

10.00 ±0.20

(8.00)

(4.40)

1.27 ±0.10 0.80 ±0.10

0.80 ±0.10

(2XR0.45)

9.90 ±0.20 4.50 ±0.20

0.10 ±0.15

2.40 ±0.20

2.54 ±0.30

15.30 ±0.30

9.20 ±0.20

4.90 ±0.20

1.40 ±0.20

2.00 ±0.10

(0.75)

(1.75)

(7.20)

0°~3°

1.20 ±0.20

9.20 ±0.20

15.30 ±0.30

4.90 ±0.20

(0.40)

2.54 TYP 2.54 TYP

1.30 +0.10

–0.05

0.50 +0.10

–0.05

D2PAK

FQB12P20 / FQI12P20

Rev. A, May 2000

Package Dimensions (Continued)

9.90 ±0.20

2.40 ±0.20

4.50 ±0.20

1.27 ±0.10 1.47 ±0.10

(45°)

0.80 ±0.10

10.00 ±0.20

2.54 TYP2.54 TYP

13.08 ±0.20

9.20 ±0.20

1.20 ±0.20

10.08 ±0.20 MAX13.40

MAX 3.00

(0.40)

(1.46)

(0.94)

1.30 +0.10

–0.05

0.50 +0.10

–0.05

I2PAK

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The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is

not intended to be an exhaustive list of all such trademarks.

ACEx™

Bottomless™

CoolFET™

CROSSVOLT™

E2CMOS™

FACT™

FACT Quiet Series™

FAST®

FASTr™

GTO™

HiSeC™

ISOPLANAR™

MICROWIRE™

POP™

PowerTrench®

QFET™

QS™

Quiet Series™

SuperSOT™-3

SuperSOT™-6

SuperSOT™-8

SyncFET™

TinyLogic™

UHC™

VCX™

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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY

PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY

LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;

NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR

INTERNATIONAL.

As used herein:

1. Life support devices or systems are devic es or syst em s

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when properly used in accordance with instructions for use

provided in the labeling, can be reasonably expected to

result in significant injury to the user.

2. A critical component is any component of a life support

device or system whose failure to perform can be

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PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or In

Design This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconduct or reserv es the right to make

changes at any time without notice in order to improve

design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Rev. A, January 2000

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Product status/pricing/packaging

FQB12P20

200V P-Channel QFET

General description

Features

Contents

•General description

•Features

•Product status/pricing/packaging

•Order Samples

•Qualification Support

These P-Channel enhancement mode power field effect transistors are

produced using Fairchild's proprietary, planar stripe, DMOS technology.

This advanced technology has been especially tailored to minimize on-state

resistance, provide superior switching performance, and withstand high

energy pulse in the avalanche and commutation mode. These devices are

well suited for low voltage applications such as high efficiency switching

DC/DC converters, and DC motor control.

z-11.5A, -200V, RDS(on)= 0.47Ω @VGS= -10V

zLow gate charge ( typical 31 nC)

zLow Crss (typical 30 pF)

zFast switching

z100% avalanche tested

zImproved dv/dt capability

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