IRLR2908PBF - INTERNATIONAL RECTIFIER

10/01/10

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IRLR2908PbF

IRLU2908PbF

HEXFET® Power MOSFET

Description

This HEXFET ® Power MOSFET utilizes the latest processing techniques

to achieve extremely low on-resistance per silicon area. Additional features

of this HEXFET power MOSFET are a 175°C junction operating temperature,

low RθJC, fast switching speed and improved repetitive avalanche rating.

These features combine to make this design an extremely efficient and

reliable device for use in a wide variety of applications.

The D-Pak is designed for surface mounting using vapor phase, infrared,

or wave soldering techniques. The straight lead version (IRFU series) is

for through-hole mounting applications. Power dissipation levels up to 1.5

watts are possible in typical surface mount applications.

VDSS = 80V

RDS(on) = 28mΩ

ID = 30A

D-Pak

IRLR2908PbF

Features

Advanced Process Technology

Ultra Low On-Resistance

Dynamic dv/dt Rating

175°C Operating Temperature

Fast Switching

Repetitive Avalanche Allowed up to Tjmax

Lead-Free

I-Pak

IRLU2908PbF

Absolute Maximum Ratings

Parameter Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) A

ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (See Fig. 9)

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package Limited)

IDM Pulsed Drain Current

PD @TC = 25°C Maximum Power Dissipation W

Linear Derating Factor W/°C

VGS Gate-to-Source Voltage V

EAS Single Pulse Avalanche Energy (Thermally Limited)

EAS (tested) Sin

le Pulse Avalanche Ener

Tested Value

IAR Avalanche Current

EAR Repetitive Avalanche Ener

dv/dt Peak Diode Recovery dv/dt

V/ns

TJ Operating Junction and °C

TSTG Storage Temperature Range

Soldering Temperature, for 10 seconds

Thermal Resistance

Parameter Typ. Max. Units

RθJC Junction-to-Case ––– 1.3 °C/W

RθJA Junction-to-Ambient (PCB Mount)

j

––– 40

RθJA Junction-to-Ambient ––– 110

120

0.77

± 16

180

250

See Fig.12a,12b,15,16

Max.

150

300 (1.6mm from case )

-55 to + 175

2.3

PD - 95552B

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Notes  through  are on page 11

HEXFET® is a registered trademark of International Rectifier.

Static @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units

V(BR)DSS Drain-to-Source Breakdown Voltage 80 ––– ––– V

∆ΒVDSS

∆TJ Breakdown Voltage Temp. Coefficient ––– 0.085 ––– V/°C

RDS(on) Static Drain-to-Source On-Resistance ––– 22.5 28 mΩ

––– 25 30

VGS(th) Gate Threshold Voltage 1.0 ––– 2.5 V

gfs Forward Transconductance 35 ––– ––– S

IDSS Drain-to-Source Leakage Current ––– ––– 20 µA

––– ––– 250

IGSS Gate-to-Source Forward Leakage ––– ––– 200 nA

Gate-to-Source Reverse Leakage ––– ––– -200

QgTotal Gate Charge ––– 22 33 nC

Qgs Gate-to-Source Charge ––– 6.0 9.1

Qgd Gate-to-Drain ("Miller") Charge ––– 11 17

td(on) Turn-On Delay Time ––– 12 ––– ns

trRise Time –––95–––

td(off) Turn-Off Delay Time ––– 36 –––

tfFall Time –––55–––

LDInternal Drain Inductance ––– 4.5 ––– nH Between lead,

6mm (0.25in.)

LSInternal Source Inductance ––– 7.5 ––– from package

and center of die contact

Ciss Input Capacitance ––– 1890 ––– pF

Coss Output Capacitance ––– 260 –––

Crss Reverse Transfer Capacitance ––– 35 –––

Coss Output Capacitance ––– 1920 –––

Coss Output Capacitance ––– 170 –––

Coss eff. Effective Output Capacitance ––– 310 –––

Diode Characteristics

Parameter Min. Typ. Max. Units

ISContinuous Source Current ––– ––– 39

(Body Diode) A

ISM Pulsed Source Current ––– ––– 150

(Body Diode)

c

VSD Diode Forward Voltage ––– ––– 1.3 V

trr Reverse Recovery Time ––– 75 110 ns

Qrr Reverse Recovery Charge ––– 210 310 nC

ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

VDS = 64V

VGS = 4.5V

ƒ = 1.0MHz, See Fig. 5

VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz

VGS = 4.5V

MOSFET symbol

VGS = 0V

VDS = 25V

VGS = 0V, VDS = 64V, ƒ = 1.0MHz

Conditions

VGS = 0V, VDS = 0V to 64V

TJ = 25°C, IF = 23A, VDD = 25V

di/dt = 100A/µs

TJ = 25°C, IS = 23A, VGS = 0V

showing the

integral reverse

p-n junction diode.

VDS = VGS, ID = 250µA

VDS = 80V, VGS = 0V

VDS = 80V, VGS = 0V, TJ = 125°C

RG = 8.3Ω

ID = 23A

VDS = 25V, ID = 23A

VDD = 40V

ID = 23A

VGS = 16V

VGS = -16V

VGS = 4.5V, ID = 20A

Conditions

VGS = 0V, ID = 250µA

Reference to 25°C, ID = 1mA

VGS = 10V, ID = 23A

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Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductance

vs. Drain Current

0.01 0.1 110 100

VDS, Drain-to-Source Voltage (V)

0.01

0.1

100

1000

ID, Drain-to-Source Current (A)

2.5V

20µs PULSE WIDTH

Tj = 25°C

VGS

TOP 15V

10V

4.5V

4.0V

3.5V

3.0V

2.7V

BOTTOM 2.5V

0.01 0.1 110 100

VDS, Drain-to-Source Voltage (V)

0.1

100

1000

ID, Drain-to-Source Current (A)

2.5V

20µs PULSE WIDTH

Tj = 175°C

VGS

TOP 15V

10V

4.5V

4.0V

3.5V

3.0V

2.7V

BOTTOM 2.5V

010 20 30 40 50 60

ID, Drain-to-Source Current (A)

GFS, Forward Transconductance (S)

TJ = 25°C

TJ = 175°C

VDS = 10V

20µs PULSE WIDTH

2 3 4 5

VGS, Gate-to-Source Voltage (V)

100

1000

ID, Drain-to-Source Current (Α)

TJ = 25°C

TJ = 175°C

VDS = 25V

20µs PULSE WIDTH

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Fig 8. Maximum Safe Operating Area

Fig 6. Typical Gate Charge vs.

Gate-to-Source Voltage

Fig 5. Typical Capacitance vs.

Drain-to-Source Voltage

Fig 7. Typical Source-Drain Diode

Forward Voltage

110 100

VDS, Drain-to-Source Voltage (V)

100

1000

10000

100000

C, Capacitance(pF)

VGS = 0V, f = 1 MHZ

Ciss = Cgs + Cgd, Cds SHORTED

Crss = Cgd

Coss = Cds + Cgd

Coss

Crss

Ciss

0 5 10 15 20 25

QG Total Gate Charge (nC)

0.0

1.0

2.0

3.0

4.0

5.0

VGS, Gate-to-Source Voltage (V)

VDS= 64V

VDS= 40V

VDS= 16V

ID= 23A

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8

VSD, Source-to-Drain Voltage (V)

0.10

1.00

10.00

100.00

1000.00

ISD, Reverse Drain Current (A)

TJ = 25°C

TJ = 175°C

VGS = 0V

1 10 100 1000

VDS, Drain-to-Source Voltage (V)

0.1

100

1000

ID, Drain-to-Source Current (A)

1msec

10msec

OPERATION IN THIS AREA

LIMITED BY R DS(on)

100µsec

Tc = 25°C

Tj = 175°C

Single Pulse

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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig 9. Maximum Drain Current vs.

Case Temperature

Fig 10. Normalized On-Resistance

vs. Temperature

25 50 75 100 125 150 175

TC , Case Temperature (°C)

ID, Drain Current (A)

-60 -40 -20 020 40 60 80 100 120 140 160 180

TJ , Junction Temperature (°C)

0.0

0.5

1.0

1.5

2.0

2.5

3.0

RDS(on) , Drain-to-Source On Resistance

(Normalized)

ID = 38A

VGS = 4.5V

1E-006 1E-005 0.0001 0.001 0.01 0.1 1

t1 , Rectangular Pulse Duration (sec)

0.001

0.01

0.1

Thermal Response ( Z thJC )

0.20

0.10

D = 0.50

0.02

0.01

0.05

SINGLE PULSE

( THERMAL RESPONSE ) Note s:

1. Duty factor D = t / t

2. Peak T = P x Z + T

1 2

JDM thJC C

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Charge

D.U.T. V

3mA

.3µF

50KΩ

.2µF

12V

Current Regulator

Same Type as D.U.T.

Current Sampling Resistors

10 V

Fig 13b. Gate Charge Test Circuit

Fig 13a. Basic Gate Charge Waveform

Fig 12c. Maximum Avalanche Energy

vs. Drain Current

Fig 12b. Unclamped Inductive Waveforms

Fig 12a. Unclamped Inductive Test Circuit

(BR)DSS

Fig 14. Threshold Voltage vs. Temperature

0.01

Ω

D.U.T

VDS

-V

DRIVER

15V

20V

VGS

25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

100

200

300

400

EAS , Single Pulse Avalanche Energy (mJ)

TOP 9.3A

16A

BOTTOM 23A

-75 -50 -25 025 50 75 100 125 150 175 200

TJ , Temperature ( °C )

0.5

1.0

1.5

2.0

2.5

VGS(th) Gate threshold Voltage (V)

ID = 250µA

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Fig 15. Typical Avalanche Current vs.Pulsewidth

Fig 16. Maximum Avalanche Energy

vs. Temperature

Notes on Repetitive Avalanche Curves , Figures 15, 16:

(For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption:

Purely a thermal phenomenon and failure occurs at a

temperature far in excess of Tjmax. This is validated for

every part type.

2. Safe operation in Avalanche is allowed as long asTjmax is

not exceeded.

3. Equation below based on circuit and waveforms shown in

Figures 12a, 12b.

4. PD (ave) = Average power dissipation per single

avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for

voltage increase during avalanche).

6. Iav = Allowable avalanche current.

7. ∆T = Allowable rise in junction temperature, not to exceed

Tjmax (assumed as 25°C in Figure 15, 16).

tav = Average time in avalanche.

D = Duty cycle in avalanche = tav ·f

ZthJC(D, tav) = Transient thermal resistance, see figure 11)

PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC

Iav = 2DT/ [1.3·BV·Zth]

EAS (AR) = PD (ave)·tav

1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

0.1

100

1000

Avalanche Current (A)

0.05

Duty Cycle = Single Pulse

0.10

Allowed avalanche Current vs

avalanche pulsewidth, tav

assuming ∆Tj = 25°C due to

avalanche losses

0.01

25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

100

150

200

EAR , Avalanche Energy (mJ)

TOP Single Pulse

BOTTOM 10% Duty Cycle

ID = 23A

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Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET® Power MOSFETs

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer

P.W. Period

di/dt

Diode Recovery

dv/dt

Ripple ≤5%

Body Diode Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current

Body Diode Forward

Current

=10V

Driver Gate Drive

D.U.T. I

Waveform

D.U.T. V

Waveform

Inductor Curent

D = P. W .

Period

* VGS = 5V for Logic Level Devices







RGVDD

• dv/dt controlled by RG

• Driver same type as D.U.T.

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

D.U.T



VDS

90%

10%

VGS

d(on)

d(off)

VDS

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

VGS

D.U.T.

10V

VDD

Fig 18a. Switching Time Test Circuit

Fig 18b. Switching Time Waveforms

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D-Pak (TO-252AA) Part Marking Information

D-Pak (TO-252AA) Package Outline

Dimensions are shown in millimeters (inches)

INTERNAT IONAL

AS S EMBL ED ON WW 16, 2001

IN THE AS SEMBLY LINE "A"

Note: "P" in as s embly line pos ition

EXAMPLE:

LOT CODE 1234

THIS IS AN IRFR120

WIT H AS S EMB L Y

indi cates "L ead-F r ee"

PRODUCT (OPT IONAL)

P = DESIGNATES LEAD-FREE

A = AS S E MB LY S I T E CODE

PART NUMBER

WE E K 16

DAT E CODE

YEAR 1 = 2001

RECTIFIER

INTERNAT IONAL

LOGO

LOT CODE

AS S E MB L Y

3412

IRFR120

116A

LINE A

RECTIFIER

LOGO

IRFR120

AS S E MB L Y

LOT CODE

YEAR 1 = 2001

DAT E CODE

PART NUMBER

WE E K 16

"P" in as s embly line pos ition indicates

"L ead- F ree" qual i fi cation to the cons umer- l evel

P = DESIGNATES LEAD-FREE

PRODUCT QUALIFIED TO THE

CONSUMER LEVEL (OPTIONAL)

Notes:

1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/

2. For the most current drawing please refer to IR website at http://www.irf.com/package/

IRLR/U2908PbF

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I-Pak (TO-251AA) Package Outline

Dimensions are shown in millimeters (inches)

I-Pak (TO-251AA) Part Marking Information

LINE A

LOGO

INTERNATIONAL

RECT IFIER

PRODUCT (OPT IONAL)

P = DESIGNATES LEAD-FREE

A = AS S E MB L Y S IT E CODE

IRF U120

PART NUMBER

WEEK 19

DAT E CODE

YEAR 1 = 2001

RECTIFIER

INTERNATIONAL

LOGO

ASSEMBLY

LOT CODE

IR F U120

DAT E CODE

PAR T NUMBER

LOT CODE

AS S E MB L Y

56 78

YEAR 1 = 2001

WEEK 19

119A

indicates Lead-Free"

ASS EMBLED ON WW 19, 2001

IN THE ASSEMBLY LINE "A"

Note: "P" in as s embly line pos ition

EXAMPLE:

WI T H AS S E MB L Y

THIS IS AN IRFU120

LOT CODE 5678

Notes:

1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/

2. For the most current drawing please refer to IR website at http://www.irf.com/package/

IRLR/U2908PbF

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IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information. 10/2010

Notes:

Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11).

Limited by TJmax, starting TJ = 25°C, L = 0.71mH, RG = 25Ω, IAS = 23A, VGS =10V. Part not recommended for use above

this value.

ISD ≤ 23A, di/dt ≤ 400A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.

Pulse width ≤ 1.0ms; duty cycle ≤ 2%.

Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS .

Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance.

This value determined from sample failure population. 100% tested to this value in production.

 When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer

to application note #AN-994.

D-Pak (TO-252AA) Tape & Reel Information

Dimensions are shown in millimeters (inches)

16.3 ( .641 )

15.7 ( .619 )

8.1 ( .318 )

7.9 ( .312 )

12.1 ( .476 )

11.9 ( .469 ) FEED DIRECTION FEED DIRECTION

16.3 ( .641 )

15.7 ( .619 )

TRR TRL

NOTES :

1. CONTROLLING DIMENSION : MILLIMETER.

2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).

3. OUTLINE CONFORMS TO EIA-481 & EIA-541.

NOTES :

1. OUTLINE CONFORMS TO EIA-481.

16 mm

13 INCH

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.

Qualification Standards can be found on IR’s Web site.