General Description
The MAX6803/MAX6804/MAX6805 microprocessor (µP)
supervisory circuits monitor the power supplies in 2.85V
to 5.0V µP and digital systems. They increase circuit
reliability and reduce cost by eliminating external com-
ponents and adjustments. They also feature a
debounced manual reset input.
These devices perform a single function: they assert a
reset signal whenever the VCC supply voltage declines
below a preset threshold or whenever manual reset is
asserted. Reset remains asserted for a preset timeout
period after VCC has risen above the reset threshold or
after manual reset is deasserted. The only difference
among the three devices is their output. The MAX6804
(push/pull) and MAX6805 (open-drain) have an active-
low RESET output, while the MAX6803 (push/pull) has
an active-high RESET output. The MAX6803/MAX6804
are guaranteed to be in the correct state for VCC down
to 0.7V. The MAX6805 is guaranteed to be in the cor-
rect state for VCC down to 1.0V.
The reset comparator in these ICs is designed to ignore
fast transients on VCC. Reset thresholds are factory-
trimmable between 2.63V and 4.80V, in approximately
100mV increments. These devices are available with a
1ms min, 20ms min, or 100ms min reset timeout period.
Ideal for space-critical applications, the MAX6803/
MAX6804/MAX6805 come packaged in a 4-pin
SOT143. For a lower threshold voltage version, see the
MAX6335/MAX6336/MAX6337.
Applications
Computers
Controllers
Intelligent Instruments
Critical µP/µC Power Monitoring
Portable/Battery-Powered Equipment
Automotive
Features
Ultra-Low 0.7V Operating Supply Voltage
Low 4.0µA Supply Current
Precision Monitoring of 2.85V to 5.0V Power-
Supply Voltages
Reset Thresholds Available from 2.63V to 4.80V,
in Approximately 100mV Increments
Debounced Manual Reset Input
Fully Specified over Temperature
Three Power-On Reset Timeout Periods Available
(1ms min, 20ms min, 100ms min)
Low Cost
Three Available Output Structures: Push/Pull
RESET, Push/Pull RESET, Open-Drain RESET
Guaranteed RESET/RESET Valid to VCC = 0.7V
(MAX6803/MAX6804)
Power-Supply Transient Immunity
No External Components Required
4-Pin SOT143 Package
Pin Compatible with MAX811/MAX812 and
MAX6314/MAX6315
MAX6803/MAX6804/MAX6805
4-Pin, Low-Power
µP Reset Circuits with Manual Reset
________________________________________________________________ Maxim Integrated Products 1
19-1946; Rev 2; 12/05
PART*
MAX6803US_ _D_-T
MAX6804US_ _D_-T
MAX6805US_ _D_-T -40°C to +125°C
-40°C to +125°C
-40°C to +125°C
TEMP RANGE PIN-PACKAGE
4 SOT143
4 SOT143
4 SOT143
Ordering Information
*These devices are available in factory-set VCC reset thresh-
olds from 2.63V to 4.80V, in approximately 0.1V increments.
Choose the desired reset threshold suffix from Table 1 and
insert it in the blanks following “US” in the part number.
Factory-programmed reset timeout periods are also available.
Insert the number corresponding to the desired nominal reset
timeout period (1 = 1ms min, 2 = 20ms min, 3 = 100ms min) in
the blank following “D” in the part number. There are 15 stan-
dard versions with a required order increment of 2500 pieces.
Sample stock is generally held on the standard versions only
(see Selector Guide). Contact the factory for availability of non-
standard versions (required order increment is 10,000 pieces).
All devices available in tape-and-reel only.
Devices are available in both leaded and lead-free packaging.
Specify lead-free by replacing “-T” with “+T” when ordering.
Typical Operating Circuit and Pin Configuration appear
at end of data sheet.
Selector Guide appears at end of data sheet.
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
MAX6803/MAX6804/MAX6805
4-Pin, Low-Power
µP Reset Circuits with Manual Reset
2_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC = full range, TA= -40°C to +125°C, unless otherwise noted. Typical values are at VCC = +5.0V and TA= +25°C, reset not
asserted.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Terminal Voltage (with respect to GND)
VCC ......................................................................-0.3V to +6V
Push/Pull RESET or RESET, MR ............-0.3V to (VCC + 0.3V)
Open-Drain RESET ..............................................-0.3V to +6V
Input Current (VCC).............................................................20mA
Output Current (RESET, RESET).........................................20mA
Continuous Power Dissipation (TA= +70°C)
4-Pin SOT143 (derate 4mW/°C above +70°C) ............320mW
Operating Temperature Range .........................-40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
UNITS
MAX6803/MAX6804 0.7 5.5
TA = 0°C to +125°C MAX6805 1.0 5.5
MAX6803/MAX6804
0.78
5.5
Supply Voltage Range
(Note 1) VCC
TA = -40°C to +125°C
MAX6805 1.2 5.5
V
VCC = +3.0V 4 10
Supply Current ICC No load VCC = +5.0V 5 12 µA
TA = +25°C
VTH
- 1.8% VTH VTH
+ 1.8%
Reset Threshold VTH MAX680_US_ _D_-T,
Table 1
TA = - 40°C to + 125°C VTH
- 3% VTH VTH
+ 3%
V
VCC Falling Reset Delay VCC falling at 10V/ms 30 µs
MAX680_US_ _D1-T 1
1.5
2
MAX680_US_ _D2-T 20 30 40Reset Active Timeout Period tRP
MAX680_US_ _D3-T
100 150
200
ms
MR Minimum Pulse Width s
MR Glitch Immunity 50 ns
MR Reset Delay
0.1
µs
VIL
0.3 VCC
MR Input Voltage VIH 0.7 VCC
V
MR Pullup Resistance 12 20 30 k
ISINK = 50µA, VCC 1.0V 0.4
ISINK = 1.2mA, VCC 2.5V 0.3
RESET Output Low Voltage
(MAX6804/MAX6805) VOL Reset
asserted
ISINK = 3.2mA, VCC 4.25V
0.4
V
ISOURC E = 50A, VCC
3.0V 0.8 VCC
RESET Output High Voltage
(MAX6804) VOH Reset not
asserted ISOURC E = 800µA, VCC
5.0V 0.8 VCC
V
4-Pin, Low-Power
µP Reset Circuits with Manual Reset
_______________________________________________________________________________________ 3
3.0
4.0
3.5
5.0
4.5
6.0
5.5
6.5
-50 0 25-25 50 75 100 125
SUPPLY CURRENT vs. TEMPERATURE
MAX6803/04/05 toc01
TEMPERATURE (°C)
ICC (µA)
VCC = +5.0V
VCC = +3.3V
0.950
0.980
0.970
0.960
1.000
0.990
1.040
1.030
1.020
1.010
1.050
-50 -25 0 25 50 75 100 125
NORMALIZED RESET TIMEOUT PERIOD
vs. TEMPERATURE
MAX6803/04/05 toc02
TEMPERATURE (°C)
NORMALIZED RESET TIMEOUT PERIOD
80
60
40
20
0
1.0 1.5 2.5 3.0
OUTPUT-VOLTAGE LOW
vs. SUPPLY VOLTAGE
MAX6803/04/05 toc03
VCC (V)
OUTPUT-VOLTAGE LOW (mV)
+25°C
-40°C
+125°C
+85°C
VTH = 2.93V
ISINK = 500µA
RESET
2.0
100
75
50
25
0
1.0 2.01.5 2.5
OUTPUT-VOLTAGE HIGH
vs. SUPPLY VOLTAGE
MAX6803/04/05 toc04
VCC (V)
OUTPUT-VOLTAGE HIGH (VCC - VOH) (mV)
+25°C
-40°C
+125°C
+85°C
VTH = 2.93V
ISINK = 100µA
RESET ASSERTED
(MAX6803)
3.0
100 1000
0
100
200
400
300
500
600
0.1 1 10
MAXIMUM TRANSIENT DURATION
vs. RESET COMPARATOR OVERDRIVE
MAX6803/04/05 toc05
RESET COMPARATOR OVERDRIVE (mV)
MAXIMUM TRANSIENT DURATION (µs)
RESET OCCURS
RESET DOES
NOT OCCUR
0
30
20
10
50
40
90
80
70
60
100
-50 -25 0 25 50 75 100 125
VCC FALLING PROPAGATION DELAY
vs. TEMPERATURE
MAX6803/04/05 toc06
TEMPERATURE (°C)
POROPAGATION DELAY (µs)
VCC = FALLING AT 1V/ms
VCC = FALLING AT 10V/ms
__________________________________________Typical Operating Characteristics
(Reset not asserted, TA= +25°C, unless otherwise noted.)
MAX6803/MAX6804/MAX6805
ELECTRICAL CHARACTERISTICS (continued)
(VCC = full range, TA= -40°C to +125°C, unless otherwise noted. Typical values are at VCC = +5.0V and TA= +25°C, reset not
asserted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
UNITS
ISOURC E = A, VCC
1.0V 0.8 VCC
ISOURC E = 200µA, VCC
1.8V 0.8 VCC
VOH Reset
asserted
ISOURC E = 800µA, VCC
4.25V
0.8 VCC
V
ISINK = 1.2mA, V
CC
3.0V 0.3
RESET Output Voltage
(MAX6803)
VOL Reset not
asserted ISINK = 3.2mA, V
CC
5.0V 0.4 V
RESET Output Leakage Current
(MAX6805) VCC > VTH, RESET not asserted 0.5 µA
Note 1: All parts are production tested at TA= +25°C. Over temperature limits are guaranteed by design and not production tested.
Note 2: ISOURCE for the MAX6803 is 100nA; ISINK for the MAX6804 is 100nA; ISINK for the MAX6805 is 50µA.
MAX6803/MAX6804/MAX6805
4-Pin, Low-Power
µP Reset Circuits with Manual Reset
4_______________________________________________________________________________________
Pin Description
Applications Information
Manual Reset Input
Many µP-based products require manual reset capabil-
ity, allowing the operator, a test technician, or external
logic circuitry to initiate a reset. A logic low on MR
asserts reset. Reset remains asserted while MR is low,
and for the reset active timeout period after MR returns
high. MR has an internal 20kpullup resistor, so it can
be left unconnected if not used. Connect a normally
open momentary switch from MR to GND to create a
manual reset function; external debounce circuitry is
not required.
Interfacing to µPs with
Bidirectional Reset Pins
Since the RESET output on the MAX6805 is open-drain,
this device interfaces easily with µPs that have bidirec-
tional reset pins, such as the Motorola 68HC11.
Connecting the µP supervisor’s RESET output directly
to the microcontroller’s (µC’s) RESET pin with a single
pullup resistor allows either device to assert reset
(Figure 1).
Negative-Going VCC Transients
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, these devices
are relatively immune to short-duration, negative-going
VCC transients (glitches). The Typical Operating
Characteristics show the Maximum Transient Duration
vs. Reset Comparator Overdrive graph. The graph
shows the maximum pulse width that a negative-going
VCC transient may typically have without issuing a reset
signal. As the amplitude of the transient increases, the
maximum allowable pulse width decreases.
Ensuring a Valid Reset Output
down to VCC = 0
When VCC falls below 1V and approaches the minimum
operating voltage of 0.7V, push/pull-structured reset
sinking (or sourcing) capabilities decrease drastically.
High-impedance CMOS-logic inputs connected to the
RESET pin can drift to indeterminate voltages. This
does not present a problem in most cases, since most
VCC
VCC
GND
MAX6805
RESETMR
VCC
GND
RESET
MOTOROLA
68HCXX
µP
100k
Figure 1. Interfacing to µPs with Bidirectional Reset Pins
PIN
MAX6803 MAX6804
MAX6805
NAME FUNCTION
1 1 GND Ground
2 RESET
Active-Low Reset Output. RESET is asserted while VCC is below the reset
threshold, or while MR is asserted. RESET remains asserted for a reset
timeout period (tRP) after VCC rises above the reset threshold or MR is
deasserted. RESET on the MAX6804 is push/pull. RESET on the MAX6805
is open-drain.
Active-High Reset Output. RESET is asserted high while VCC is below the
reset threshold or while MR is asserted, and RESET remains asserted for a
reset timeout period (tRP) after VCC rises above the reset threshold or MR
is deasserted. RESET on the MAX6803 is push/pull.
RESET2
3 3 MR
Manual Reset Input. A logic low on MR asserts reset. Reset remains
asserted as long as MR is low, and for the reset timeout period (tRP) after
MR goes high. Leave unconnected or connect to VCC if not used.
Supply Voltage InputVCC
44
4-Pin, Low-Power
µP Reset Circuits with Manual Reset
_______________________________________________________________________________________ 5
MAX6803/MAX6804/MAX6805
VCC
GND
MAX6804
RESETMR
100k
(a)
VCC
GND
MAX6803
RESET
100k*
(b)
*ASSUMES HIGH-Z RESET INPUT TO THE µP
MR
Figure 2. Ensuring Reset Valid down to VCC = 0
µPs and circuitry do not operate when VCC drops below
1V. For the MAX6804 application where RESET must be
valid down to 0, adding a pulldown resistor between
RESET and GND removes stray leakage currents, hold-
ing RESET low (Figure 2a). The pulldown resistor value
is not critical; 100kis large enough not to load RESET,
and small enough to pull it low. For the MAX6803, where
RESET must be valid to VCC = 0, a 100kpullup resistor
between RESET and VCC will hold RESET high when
VCC falls below 0.7V (Figure 2b).
Since the MAX6805 has an open-drain, active-low out-
put, it typically uses a pullup resistor. With this device,
RESET will most likely not maintain an active condition,
but will drift to a non-active level due to the pullup
resistor and the reduced sinking capability of the open-
drain device. Therefore, this device is not recommend-
ed for applications where the RESET pin is required to
be valid down to VCC = 0.
1
2
4
3
VCC
MR(RESET)
GND
MAX6803
MAX6804
MAX6805
SOT143
TOP VIEW
RESET
( ) ARE FOR MAX6803
MAX6804
VCC
VCC
RESETMR RESET
GND
PUSHBUTTON
SWITCH
VCC
GND
µP
Pin Configuration
Typical Operating Circuit
MAX6803/MAX6804/MAX6805
4-Pin, Low-Power
µP Reset Circuits with Manual Reset
6_______________________________________________________________________________________
TA = +25°CT
A = -40°C to +125°C
RESET
THRESHOLD
SUFFIX MIN TYP (VTH)MAX MINMAX
48 4.714 4.80 4.886 4.656 4.944
47 4.615 4.70 4.785 4.559 4.841
46 4.547 4.63 4.713 4.491 4.769
45 4.419 4.50 4.581 4.365 4.635
44 4.301 4.38 4.459 4.249 4.511
43 4.223 4.30 4.377 4.171 4.429
42 4.124 4.20 4.276 4.074 4.326
41 4.026 4.10 4.174 3.977 4.223
40 3.928 4.00 4.072 3.880 4.120
39 4.830 3.90 3.970 3.783 4.017
38 3.732 3.80 3.868 3.686 3.914
37 3.633 3.70 3.767 3.589 3.811
36 3.535 3.60 3.665 3.492 3.708
35 3.437 3.50 3.563 3.395 3.605
34 3.339 3.40 3.461 3.298 3.502
33 3.241 3.30 3.359 3.201 3.399
32 3.142 3.20 3.258 3.104 3.296
31 3.025 3.08 3.135 2.988 3.172
30 2.946 3.00 3.054 2.910 3.090
29 2.877 2.93 2.983 2.842 3.018
28 2.750 2.80 2.850 2.716 2.884
27 2.651 2.70 2.749 2.619 2.781
26 2.583 2.63 2.677 2.551 2.709
Table 1. Factory-Trimmed Reset Thresholds
MAX6803/MAX6804/MAX6805
4-Pin, Low-Power
µP Reset Circuits with Manual Reset
_______________________________________________________________________________________ 7
*Sample stock is generally held on all standard versions.
PART OUTPUT STAGE NOMINAL VTH (V) MIN RESET
TIMEOUT (ms)
SOT
TOP MARK
MAX6803US26D3-T Push/Pull RESET 2.63 100 KACH
MAX6803US29D3-T Push/Pull RESET 2.93 100 KACI
MAX6803US31D3-T Push/Pull RESET 3.08 100 KACJ
MAX6803US44D3-T Push/Pull RESET 4.38 100 KACK
MAX6803US46D3-T Push/Pull RESET 4.63 100 KACL
MAX6804US26D3-T Push/Pull RESET 2.63 100 KACN
MAX6804US29D3-T Push/Pull RESET 2.93 100 KACP
MAX6804US31D3-T Push/Pull RESET 3.08 100 KACQ
MAX6804US44D3-T Push/Pull RESET 4.38 100 KACR
MAX6804US46D3-T Push/Pull RESET 4.63 100 KACS
MAX6805US26D3-T Open-Drain RESET 2.63 100 KACO
MAX6805US29D3-T Open-Drain RESET 2.93 100 KACU
MAX6805US31D3-T Open-Drain RESET 3.08 100 KACV
MAX6805US44D3-T Open-Drain RESET 4.38 100 KACW
MAX6805US46D3-T Open-Drain RESET 4.63 100 KACX
Selector Guide (Standard Versions*)
TRANSISTOR COUNT: 505
PROCESS: BiCMOS
Chip Information
MAX6803/MAX6804/MAX6805
4-Pin, Low-Power
µP Reset Circuits with Manual Reset
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8_____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
©2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.
SOT-143 4L.EPS
E
1
1
21-0052
PACKAGE OUTLINE, SOT-143, 4L
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)