ISL9016IRUFCZ-T - Intersil Corporation

150mA Dual LDO with Low Noise, High PSRR, and Low IQ

ISL9016

ISL9016 is a high performance dual LDO capable of providing

up to 150mA current on each channel. It features a low standby

current and very high PSRR and is stable with output

capacitance of 1µF to 4.7µF with an ESR of up to 200mΩ.

The device integrates a separate enable function for each

output. The quiescent current is typically 49µA when only one

LDO is enabled and typically 80µA when both LDOs are

enabled. When both LDOs are under shutdown condition, the

drawing current is typically less than 1µA.

ISL9016 provides a wide input voltage range from 1.8V to

6.5V. It also has a high PSRR of 80dB at 1kHz and 45dB at

1MHz. ISL9016 also provides output current limit, overheat

protection, reverse current protection, as well as excellent load

transient response.

ISL9016 is offered in a tiny 1.6mmx1.6mm 6 Ld µTDFN

package. Output voltage options are available from 1.2V to

3.3V. Several combinations of voltage outputs are standard

and others may be available upon request.

Features

• Dual Integrated 150mA High Performance LDOs

• High PSRR: 80dB @ 1kHz and 45dB @ 1MHz

• Reverse Current Protection

•Low Quiescent Current

- 49µA (Single LDO Enabled)/80µA (Dual LDOs Enabled)

• Excellent Load Transient Response

• Typically ±0.8% Output Voltage Accuracy

• Low Output Noise: Typically 25µVRMS

• Wide Input Voltage Capability: 1.8V to 6.5V

• Low Dropout Voltage: Typically 120mV @ 150mA

• Separate Enable Control for each LDO

• Stable with 1µF to 4.7µF Ceramic Output Capacitors

• Soft-start to Limit Input Current Surge During Enable

• Current Limit and Overheat Protection

• Tiny 6 Ld 1.6mmx1.6mm µTDFN package

• Pb-free (RoHS Compliant)

Applications

• PDAs, Cell Phones and Smart Phones

• Portable Instruments, MP3/4 Players, PMP, DSC

• Handheld Devices including Medical Handhelds

VIN

GND

EN2 EN1

VOUT2

VOUT1

OFF

C1 C2 C3

C1, C2, C3: 1µF, X5R (or X7R) CERAMIC CAPACITOR

R1, R2: 100k

R1 R2

ISL9016

VIN (1.8V TO 6.5V)

VOUT1

1.2V~3.3V, 0~150mA

VOUT2

1.2V~3.3V, 0~150mA

FIGURE 1. TYPICAL APPLICATION DIAGRAM

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.

All other trademarks mentioned are the property of their respective owners.

May 16, 2011

FN6832.1

ISL9016

2FN6832.1

May 16, 2011

Pin Configuration

ISL9016

(6 LD 1.6x1.6 µTDFN)

TOP VIEW

VIN

GND

EN2

VOUT1

VOUT2

EN1

Pin Descriptions

PIN # PIN NAME DESCRIPTION

1 VIN Supply Voltage/LDO Input. Connect a 1µF capacitor to GND.

2 GND GND is the connection to system ground. Connect to PCB Ground plane.

3 EN2 LDO2 Enable pin. Enable = High, Disable = Low. A 100k resistor should be connected between EN2 and the control voltage rail.

Do NOT leave it floating.

4 EN1 LDO1 Enable pin. Enable = High, Disable = Low. A 100k resistor should be connected between EN1 and the control voltage rail.

Do NOT leave it floating.

5VOUT2

LDO2 Output. Connect capacitor with a value from 1µF to 4.7µF to GND (1µF recommended).

6 VOUT1 LDO1 Output. Connect capacitor with a value from 1µF to 4.7µF to GND (1µF recommended).

- E-Pad Connect the e-pad to the system ground.

ISL9016

3FN6832.1

May 16, 2011

Ordering Information

PART NUMBER

(Notes 1, 3)

PART

MARKING

VO1 VOLTAGE

(V) (Note 2)

VO2 VOLTAGE

(V) (Note 2)

TEMP RANGE

(°C)

PACKAGE

(Pb-Free)

PKG

DWG. #

ISL9016IRUWCZ-T N7 1.2 1.8 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUWGZ-T N6 1.2 2.7 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUWJZ-T N2 1.2 2.8 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUWKZ-T N1 1.2 2.85 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUBWZ-T R7 1.5 1.2 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUBBZ-T R6 1.5 1.5 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUCWZ-T R5 1.8 1.2 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUCBZ-T R4 1.8 1.5 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUCCZ-T U7 1.8 1.8 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUFWZ-T R3 2.5 1.2 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUFBZ-T N8 2.5 1.5 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUFCZ-T N9 2.5 1.8 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUFFZ-T P0 2.5 2.5 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUGWZ-T P1 2.7 1.2 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUGCZ-T R2 2.7 1.8 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUGGZ-T N3 2.7 2.7 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUJWZ-T P2 2.8 1.2 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUJBZ-T P3 2.8 1.5 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUJCZ-T N4 2.8 1.8 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUJJZ-T N0 2.8 2.8 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUKWZ-T P5 2.85 1.2 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUKFZ-T P4 2.85 2.5 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUKKZ-T N5 2.85 2.85 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUMWZ-T P6 3.0 1.2 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUMBZ-T P7 3.0 1.5 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUMCZ-T P8 3.0 1.8 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUMKZ-T P9 3.0 2.85 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUNWZ-T R0 3.3 1.2 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

ISL9016IRUNCZ-T R1 3.3 1.8 -40 to +85 6 Ld µTDFN L6.1.6x1.6A

NOTES:

1. Please refer to TB347 for details on reel specifications.

2. For other output voltages, contact Intersil marketing or local sales office.

3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and Tin Bismuth plate - e6

termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified

at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

4. For Moisture Sensitivity Level (MSL), please see device information page for ISL9016. For more information on MSL please see techbrief TB363.

ISL9016

4FN6832.1

May 16, 2011

Absolute Maximum Ratings Thermal Information

VIN to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +7.1V

All Other Pins to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (VIN +0.3)V

Recommended Operating Conditions

Supply Voltage (VIN). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8V to 6.5V

Each LDO Load Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . up to 150mA

Ambient Temperature Range (TA) . . . . . . . . . . . . . . . . . . . .-40°C to +85°C

Thermal Resistance θJA (°C/W)

6 Ld µTDFN Package (Note 5) . . . . . . . . . . . . . . . . . . . . 117.5

Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C

Operating Temperature Range . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C

Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C

Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product

reliability and result in failures not covered by warranty.

NOTE:

5. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech

Brief TB379.

Electrical Specifications Typical specifications are measured at the following conditions: TA = +25°C; VIN = (VO+ 0.5V) to 6.5V with a

minimum VIN of 1.8V; CIN = 1µF; CO = 1µF. Boldface limits apply over the operating temperature range, -40°C to +85°C.

PARAMETER SYMBOL TEST CONDITIONS

MIN

(Note 8) TYP

MAX

(Note 8) UNITS

DC CHARACTERISTICS

Supply Voltage VIN 1.8 6.5 V

UVLO Threshold VUV+ 1.710 1.775 V

VUV- 1.55 1.62

Input Quiescent Current Quiescent condition: IO1 = 0µA; IO2 = 0µA

IDD1 One LDO active 49 67 µA

IDD2 Both LDO active 80 100 µA

Shutdown Current IDDS @ +25°C 0.1 1.0 µA

Regulation Voltage Accuracy VIN = VO+ 0.5V to 6.5V, IO = 10µA to 150mA, TA = +25°C -0.8 +0.8 %

VIN = VO+ 0.5V to 6.5V, IO = 10µA to 150mA, TA = -40°C to +85°C -1.8 +1.8 %

Maximum Output Current IMAX Each LDO, Continuous 150 mA

Internal Current Limit ILIM 175 265 355 mA

Dropout Voltage (Note 6) VDO1 IO = 150mA; 1.2V ≤ VO ≤ 2.1V 250 425 mV

VDO2 IO = 150mA; 2.1V ≤ VO ≤ 2.8V 200 325 mV

VDO3 IO = 150mA; 2.8V ≤ VO 120 200 mV

Thermal Shutdown Temperature TSD+ 145 °C

TSD- 110 °C

AC CHARACTERISTICS

Ripple Rejection IO = 10mA, VIN = 3.7V(min), VO = 2.7V, TA = +25°C

@ 1kHz 80 dB

@ 10kHz 60 dB

@ 100kHz 50 dB

@ 1MHz 45 dB

Output Noise Voltage VIN = 4.2V, IO = 10mA, TA = +25°C, BW = 10Hz to 100kHz 25 µVRMS

DEVICE START-UP CHARACTERISTICS

Device Enable Time tEN Time from assertion of the ENx pin to when the output voltage

reaches 95% of the VO(nom)

400 600 µs

LDO Soft-Start Ramp Rate tSSR Slope of linear portion of LDO output voltage ramp during start-up 30 60 µs/V

ISL9016

5FN6832.1

May 16, 2011

EN PIN CHARACTERISTICS

Input Low Voltage VIL TA = -20°C to +85° -0.3 0.4 V

Input High Voltage VIH 1.1 VIN + 0.3 V

Input Leakage Current IIL, IIH 0.1 µA

REVERSE CURRENT CHARACTERISTICS

Output Reverse Leakage Current

(Note 7)

IORLC VIN = 0V, VOUT = 5.5V 8 15 µA

NOTES:

6. VOx = 0.98*VOx(NOM); Valid for VOx greater than 1.80V.

7. Output reverse leakage current is measured with VIN pin grounded and VOUT pin connected to 5.5V.

8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization

and are not production tested.

Electrical Specifications Typical specifications are measured at the following conditions: TA = +25°C; VIN = (VO+ 0.5V) to 6.5V with a

minimum VIN of 1.8V; CIN = 1µF; CO = 1µF. Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)

PARAMETER SYMBOL TEST CONDITIONS

MIN

(Note 8) TYP

MAX

(Note 8) UNITS

ISL9016

6FN6832.1

May 16, 2011

Typical Operating Performance

FIGURE 2. QUIESCENT CURRENT vs INPUT VOLTAGE (VOUT1 =2.1V,

ONLY LDO1 ENABLED)

FIGURE 3. QUIESCENT CURRENT vs INPUT VOLTAGE (VOUT2 =2.1V,

ONLY LDO2 ENABLED)

FIGURE 4. QUIESCENT CURRENT vs INPUT VOLTAGE

(VOUT1 =V

OUT2 = 2.1V, LDO1 AND LDO2 ENABLED)

FIGURE 5. QUIESCENT CURRENT vs INPUT VOLTAGE (VOUT1 =3.3V,

ONLY LDO1 ENABLED)

FIGURE 6. QUIESCENT CURRENT vs INPUT VOLTAGE (VOUT2 =3.3V,

ONLY LDO2 ENABLED)

FIGURE 7. QUIESCENT CURRENT vs INPUT VOLTAGE

(VOUT1 =V

OUT2 = 3.3V, LDO1 AND LDO2 ENABLED)

2.4 3.6 4.8 6.0

INPUT VOLTAGE (V)

QUIESCENT CURRENT (µA)

T = +85°C

T = +50°C

T = +25°C

T = 0°C

T = -25°C

T = -40°C

2.4 3.6 4.8 6.0

INPUT VOLTAGE (V)

QUIESCENT CURRENT (µA)

T = +85°C

T = +50°C

T = +25°C

T = 0°C

T = -25°C

T = -40°C

2.4 3.6 4.8 6.0

INPUT VOLTAGE (V)

QUIESCENT CURRENT (µA)

T = +85°C

T = +50°C

T = +25°C

T = 0°C

T = -25°C

T = -40°C

3.6 4.4 5.2 6.0

INPUT VOLTAGE (V)

QUIESCENT CURRENT (µA)

T = +85°C

T = +50°C

T = +25°C

T = 0°C

T = -25°C

T = -40°C

3.6 4.4 5.2 6.0

INPUT VOLTAGE (V)

QUIESCENT CURRENT (µA)

T = +85°C

T = +50°C

T = +25°C

T = 0°C

T = -25°C

T = -40°C

3.6 4.4 5.2 6.0

INPUT VOLTAGE (V)

QUIESCENT CURRENT (µA)

T = +85°C

T = +50°C

T = +25°C

T = 0°C

T = -25°C

T = -40°C

ISL9016

7FN6832.1

May 16, 2011

FIGURE 8. ΔVOUT vs INPUT VOLTAGE (VOUT_NOMINAL =1.2V,

IOUT = 50mA)

FIGURE 9. ΔVOUT vs INPUT VOLTAGE (VOUT_NOMINAL =1.2V,

IOUT = 150mA)

FIGURE 10. LOAD REGULATION (VIN = 1.8V, VOUT = 1.2V) FIGURE 11. LOAD REGULATION (VIN = 4.5V, VOUT = 3.3V)

FIGURE 12. ENABLE OPERATION (VIN = 3.6V, VOUT1 = VOUT1 = 1.2V) FIGURE 13. LOAD TRANSIENT RESPONSE (VIN = 3.6V,

VOUT1 = VOUT2 = 1.2V, IOUT1 0.01mA TO 150mA)

Typical Operating Performance (Continued)

-15

-10

-5

1.5 3.0 4.5 6.0

INPUT VOLTAGE (V)

ΔVO (mV)

T = +85°C

T = +25°C

T = -40°C -20

-15

-10

-5

1.5 2.5 3.5 4.5 5.5

INPUT VOLTAGE (V)

ΔVO (mV)

T = +85°C T = +25°C

T = -40°C

1.18

1.19

1.20

1.21

1.22

0 30 60 90 120 150

LOAD CURRENT (mA)

OUTPUT VOLTAGE (V)

T = +85°C

T = +25°C

T = -40°C

3.25

3.26

3.27

3.28

3.29

3.30

3.31

3.32

0 30 60 90 120 150

LOAD CURRENT (mA)

OUTPUT VOLTAGE (V)

T = +85°C

T = +25°C

T = -40°C

5V/DIV

EN1 = EN2

1V/DIV

VOUT1

VOUT2 100µs/DIV

5V/DIV

50mV/DIV

200mA/DIV

VOUT2 (AC COUPLED)

VOUT1 (AC COUPLED)

IOUT1

VIN

1ms/DIV

ISL9016

8FN6832.1

May 16, 2011

FIGURE 14. LOAD TRANSIENT RESPONSE (VIN = 3.6V,

VOUT1 = VOUT2 = 1.2V, IOUT2 0.01mA TO 150mA)

FIGURE 15. LOAD TRANSIENT RESPONSE (VIN = 3.6V,

VOUT1 = VOUT2 = 3.3V, IOUT1 0.01mA TO 150mA)

FIGURE 16. LOAD TRANSIENT RESPONSE (VIN = 1.8V,

VOUT1 = VOUT2 = 1.2V, IOUT1 0.01mA TO 150mA)

FIGURE 17. LOAD TRANSIENT RESPONSE (VIN = 3.3V,

VOUT1 = VOUT2 = 1.2V, IOUT1 0.01mA TO 150mA)

Typical Operating Performance (Continued)

VOUT2 (AC COUPLED)

VOUT1 (AC COUPLED)

IOUT1

VIN

5V/DIV

50mV/DIV

200mA/DIV

1ms/DIV

VOUT2 (AC COUPLED)

VOUT1 (AC COUPLED)

IOUT1

VIN

5V/DIV

50mV/DIV

200mA/DIV

1ms/DIV

VOUT2 (AC COUPLED)

VOUT1 (AC COUPLED)

IOUT1

50mV/DIV

20mV/DIV

100mA/DIV 1ms/DIV

di/dt = 150mA/µs

VOUT (AC COUPLED)

IOUT

100mV/DIV

100mA/DIV 1ms/DIV

di/dt = 150mA/µs

ISL9016

9FN6832.1

May 16, 2011

Block Diagram

Functional Description

ISL9016 contains two high performance LDO’s. High

performance is achieved through a circuit which delivers fast

transient response to varying load conditions. In a quiescent

condition, the ISL9016 adjusts its biasing to achieve the lowest

standby current consumption.

The device also integrates current limit protection, thermal

shutdown protection, reverse current protection and soft-start.

Thermal shutdown protects the device against overheating.

Soft-start limits the start-up input current surges. In some certain

application circuits, the output voltage may be externally held up,

meanwhile, the input voltage could be connected to ground, or

connected to some voltage lower than the output side, or be left

open circuit. ISL9016 features the reverse current protection; it

can limit the current flow from output to input. This protection will

automatically initiate when VOUT is detected to be higher than VIN.

When VIN is pulled to ground and VOUT is held at 5.5V, the current

flow from VOUT to VIN is typically less than 8µA.

Enable Control

The ISL9016 has two separate enable pins, EN1 and EN2, which

independently enable/disable each of the LDO outputs. When both

EN1 and EN2 are low, the whole device is in shutdown mode. In this

condition, all on-chip circuits are off, and the device draws minimum

current, typically less than 0.1mA. When one or both the EN pins go

high, the LDO1 and/or LDO2 will be enabled accordingly based on

the voltage signal applied on its related EN pin and start from the

soft-start. Likewise, when one or both EN pins go low, LDO1 and/or

LDO2 will be disabled based on the signal applied on its related EN

pin. A 100kΩ (or above) pull-up resistor should be connected

between ENx pin and the external control voltage (as shown in the

“Typical Application Diagram” on page 1).

LDO Protections

ISL9016 offers several protections which make it ideal for using

in battery-powered application circuits.

ISL9016 provides short-circuit protection by limiting the output

current to typical 265mA. When short circuit happens, the circuit

is limited at 265mA (typical). If the short circuit lasts long enough,

the die temperature increases, and the over-temperature

protection circuit will turn off the output.

When the die temperature reaches about +145°C, the thermal

protection starts working. Under the overheat condition, only the

LDO sourcing more than 50mA will be shut off. This does not

affect the operation of the other LDO. If both LDOs source more

than 50mA and an overheat condition occurs, both LDO outputs

will be disabled. Once the die temperature falls back to about

+110°C, the disabled LDO(s) are re-enabled and soft-start

automatically takes place.

In certain applications, the following input/output situations may

occur, with output voltage externally held up higher than the input

voltage:

1. Input is pulled to ground;

2. Input is left open circuit; and

3. Input is pulled to some intermediate voltage

ISL9016 provides the reverse current protection to limit the current

flow from output to input under these situations. When input is

pulled to ground and output is held to 5.5V, the typical reverse

current from output to input side is less than 8µA.

CONTROL

LOGIC

SHORT CIRCUIT

THERMAL PROTECTION

SOFT-START

UNDERVOLTAGE

LOCKOUT

BANDGAP

TEMP-SENSOR

REFERENCE

VOLTAGES

VREF1

VREF2

VREF3

VOUT1

EN1

VIN

EN1

EN2

VOUT2 VOUT1

GND

VREF1

REVERSE CURRENT

PROTECTION

LDO-2

LDO-1

ISL9016

Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted

in the quality certifications found at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time

without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be

accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third

parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN6832.1

May 16, 2011

For additional products, see www.intersil.com/product_tree

Input and Output Capacitors

The ISL9016 provides a linear regulator that has low quiescent

current, fast transient response, and overall stability across the

recommended operating conditions. A ceramic capacitor (X5R or

X7R) with a capacitance of 1µF to 4.7µF with an ESR up to 200mΩ

is suitable for the ISL9016 to maintain its output stability. The

ground connection of the output capacitor should be connected

directly to the GND pin of the device, and also placed close to the

device. Similarly for the input capacitor, usually a 1µF ceramic

capacitor (X5R or X7R) is suitable for most cases, but if large, fast

rising-time load transient condition is expected, a higher value

input capacitor may be necessary to achieve better performance.

Board Layout Recommendations

A good PCB layout will be an important step to achieve good

performance. It is recommended to design the board with

separate ground planes for input and output, and connect both

ground planes at the GND pin of the device. Consideration should

be taken when placing the components and route the trace to

minimize the ground impedance, as well as keep the parasitic

inductance low. Usually the input/output capacitors should be

placed close to the device with good ground connection.

Products

Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products

address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks.

Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a

complete list of Intersil product families.

*For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page

on intersil.com: ISL9016

To report errors or suggestions for this datasheet, please go to: www.intersil.com/askourstaff

FITs are available from our website at: http://rel.intersil.com/reports/sear

Revision History

The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make

sure you have the latest revision.

DATE REVISION CHANGE

April 26, 2011 FN6832.1 Added ISL9016IRUCCZ-T to Ordering Information table.

January 22, 2009 FN6832.0 Initial release.

ISL9016

11 FN6832.1

May 16, 2011

Ultra Thin Dual Flat No-Lead Plastic Package (UTDFN)

0.15 C

PIN 1

TOP VIEW

0.15 C

REFERENCE

DETAIL A

0.10 C

0.08 C

A3 C

SEATING

PLANE

BOTTOM VIEW

SIDE VIEW

0.10 CAB

b6X

DETAIL A

0.127 +0.058

0.127±0.008

CO.2

1.00 REF

DAP SIZE 1.30 x 0.76

-0.008

TERMINAL THICKNESS

0.30

1.00 0.45

0.50

0.25

1.25

2.00

1.00

LAND PATTERN

L6.1.6x1.6A

6 LEAD ULTRA THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE

SYMBOL

MILLIMETERS

NOTESMIN NOMINAL MAX

0.45 0.50 0.55

- - 0.05

0.127 REF

0.15 0.20 0.25

1.55 1.60 1.65

D2 0.40 0.45 0.50 -

1.55 1.60 1.65

0.95 1.00 1.05

0.50 BSC

0.25 0.30 0.35

Rev. 1 6/06

NOTES:

1. Dimensions are in mm. Angles in degrees.

2. Coplanarity applies to the exposed pad as well as the terminals.

Coplanarity shall not exceed 0.08mm.

3. Warpage shall not exceed 0.10mm.

4. Package length/package width are considered as special

characteristics.

5. JEDEC Reference MO-229.

6. For additional information, to assist with the PCB Land Pattern

Design effort, see Intersil Technical Brief TB389.