24LC16B Data Sheet - Microchip Technology

 2001 Microchip Technology Inc. DS20070M-page 1

M24LC16B

FEATURES

• Single supply with operation down to 2.5V

• Low power CMOS technology

- 1 mA active current typical

-10µA standby current typical at 5.5V

-5µA standby current typical at 3.0V

• Organized as 8 blocks of 256 bytes (8 x 256 x 8)

• 2-wire serial interface bus, I2C™ compatible

• Schmitt trigger inputs for noise suppression

• Output slope control to eliminate ground bounce

• 100 kHz (E-temp.) and 400 kHz (C/I-temp.)

compatibility

• Self-timed write cycle (including auto-erase)

• Page-write buffer for up to 16 bytes

• 2 ms typical write cycle time for page-write

• Hardware write protect for entire memory

• Can be operated as a serial ROM

• Factory programming (QTP) available

• ESD protection > 4,000V

• 1,000,000 erase/write cycles

• Data retention > 20 0 years

• 8-pin PDIP, SOIC, TSSOP and MSOP packages

• Available for extended temperature ranges:

DESCRIPTION

The Microchip Technology Inc. 24LC16B is a 16 Kbit

Electrically Erasable PROM. The device is organized

as eight blocks of 256 x 8-bit memory with a 2-wire

serial interface. Low voltage design permits operation

down to 2.5V with standby and active currents of only

5µA and 1 mA r especti vely. The 24 LC16B als o ha s a

page-write capability for up to 16 bytes of data. The

24LC16 B is available in t he stan dard 8-pin DIP, surface

mount SOIC, TSSOP and MSOP packages.

BLOCK DIAGRAM

PACKAGE TYPES

- Industrial (I): -40°C to +85°C

- Automotive (E): -40°C to +125°C

HV GENERATOR

EEPROM

ARRAY

PAGE LATCHES

YDEC

XDEC

SENSE AMP

MEMORY

CONTROL

LOGIC

I/O

CONTROL

LOGIC

I/O

SDA

SCL

VCC

VSS R/W CONTROL

24LC16B

VSS

VCC

SCL

SDA

PDIP

24LC16B

VSS

VCC

SCL

SDA

SOIC

24LC16B

TSSOP MSOP

24LC16B

VSS

VCC

SCL

SDA

VSS

VCC

SCL

SDA

Note: Pins A0, A1 and A2 are not used by the 24LC16B. (No internal connections).

16K 2.5V I2C™ Serial EEPROM

I2C™ is a trademark of the Philips Corporation

24LC16B

DS20070M-page 2  2001 Microchip Technology Inc.

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings†

VCC.............................................................................................................................................................................7.0V

All inputs and outputs w.r.t. VSS ......................................................................................................... -0.3V to VCC +1.0V

Storage temperature ...............................................................................................................................-65°C to +150°C

Ambient temp. with powe r appli ed...... ...... ..... ................. ...... ..... ...... ................. ..... ...... ...... ..... ..... ...........-65°C to +125°C

Soldering temperature of leads (10 seconds) .......................................................................................................+300°C

ESD protection on all pins .....................................................................................................................................................≥ 4KV

1.1 DC Characteristics

† NOTICE: S tresse s above those listed under “Maxi mum ratin gs” m ay caus e permane nt damage to the dev ice.

This is a stress rating only and functional operation of the device at those or any other conditions above those

indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions

for extended periods may affect device reliability.

DC CHARACTERISTICS VCC = +2.5V to +5.5V

Industrial (I): TAMB = -40°C to +85°C

Automotive (E): TAMB = -40°C to +125°C

Param.

No. Sym. Characteristic Min. Max. Units Conditions

D1 VIH WP, SCL and SDA pins ————

D2 —High level inpu t voltage .7 VCC — V —

D3 VIL Low level input voltage —.3 VCC V —

D4 VHYS Hysteresis of Schmitt

trigger inputs .05 VCC — V (Note)

D5 VOL Low level output voltag e —.40 V IOL = 3.0 mA, VCC = 2.5V

D6 ILI Input leakage current -10 10 µAVIN = .1V to VCC

D7 ILO Output leakage current -10 10 µAVOUT = .1V to VCC

D8 CIN,

COUT Pin capacitance

(all inputs/outpu ts) —10 pF VCC = 5.0V (Note)

TAMB = 25°C, FCLK = 1 MHz

D9 ICC write Operating current —3mAVCC = 5.5V, S CL = 400 kHz

D10 ICC read —1mA—

D11 ICCS Standby current —

—30

100 µΑ

µΑ

VCC = 3.0V, SDA = SCL = VCC

VCC = 5.5V, SDA = SCL = VCC

WP = VSS

Note: This parameter is periodically sampled and not 100% tested.

 2001 Microchip Technology Inc. DS20070M-page 3

24LC16B

1.2 AC Characteristics

AC CHARACTERISTICS VCC = +2.5V to +5.5V

Industrial (I): TAMB = -40°C to +85°C

Automotive (E): TAMB = -40°C to +125°C

Param.

No. Sym. Characteristic. Min. Max. Units Conditions

CLK Clock frequency —

—400

100 kHz 2.5V ≤ VCC ≤ 5.5V

2.5V ≤ VCC ≤ 5.5V (E-temp. range)

2THIGH Clock high time 600

4000 —

—ns 2.5V ≤ VCC ≤ 5.5V

2.5V ≤ VCC ≤ 5.5V (E-temp. range)

LOW Clock low time 1300

4700 —

—ns 2.5V ≤ VCC ≤ 5.5V

2.5V ≤ VCC ≤ 5.5V (E-temp. range)

RSDA and SCL rise time

(Note 1) —

—300

1000 ns 2.5V ≤ VCC ≤ 5.5V (Note 1)

2.5V ≤ VCC ≤ 5.5V (E-temp. range)

(Note 1)

FSDA and SCL fall time —300 ns (Note 1)

HD:STA START condition hold

time 600

4000 —

—ns 2.5V ≤ VCC ≤ 5.5V

2.5V ≤ VCC ≤ 5.5V (E-temp. range)

SU:STA START condition setup

time 600

4700 —

—ns 2.5V ≤ VCC ≤ 5.5V

2.5V ≤ VCC ≤ 5.5V (E-temp. range)

8THD:DAT Data input hold time 0 —ns (Note 2)

SU:DAT Data input setup time 100

250 —

—ns 2.5V ≤ VCC ≤ 5.5V

2.5V ≤ VCC ≤ 5.5V (E-temp. range)

10 TSU:STO STOP condition setup

time 600

4000 —

—ns 2.5V ≤ VCC ≤ 5.5V

2.5V ≤ VCC ≤ 5.5V (E-temp. range)

11 TAA Output valid from clock

(Note 2) —

—900

3500 ns 2.5V ≤ VCC ≤ 5.5V

2.5V ≤ VCC ≤ 5.5V (E-temp. range)

12 TBUF Bus free time: Time the

bus must be free before a

new transmi ssion can

start

1300

4700 —

—ns 2.5V ≤ VCC ≤ 5.5V

2.5V ≤ VCC ≤ 5.5V (E-temp. range)

13 TOF Output fall time from VIH

minimum to VIL maximum 20+0.1CB

—250

250 ns 2.5V ≤ VCC ≤ 5.5V

2.5V ≤ VCC ≤ 5.5V (E-temp. range)

14 TSP Input filter spike

suppression

(SDA and SCL pins)

—50 ns (Notes 1 and 3)

15 TWC Writ e cycle time (byte o r

page) —5ms—

16 —Endurance 1M —cycles 25°C, VCC = 5.0V, Block Mode

(Note 4)

Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.

2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum

300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.

3: The combined TSP and VHYS specifications are due to new Sc hmitt trigger inputs which provide improved noise spike

suppression. This eliminates the need for a T I specification for standard operation.

4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please

consult the Total Endurance Model which can be obtained on Microchip’s website: www.microchip.com.

24LC16B

DS20070M-page 4  2001 Microchip Technology Inc.

FIGURE 1-1: BUS TIMING DATA

FIGURE 1-2: BUS TIMING START/STOP

524

8910

SCL

SDA

OUT

START STOP

SCL

SDA

 2001 Microchip Technology Inc. DS20070M-page 5

24LC16B

2.0 FUNCTIONAL DESCRIPTION

The 24LC16B supports a bi-directional 2-wire bus and

data transmission protocol. A device that sends data

onto the bus is defined as transmitter, and a device

receivi ng dat a as receiver. The bu s has to be co ntrolled

by a master device which generates the serial clock

(SCL), controls the bus access and generates the

START and STOP conditions, while the 24LC16B

works as slave. Both master and slave can operate as

transmitter or receiver, but the master device deter-

mines which mode is ac tivated.

3.0 BUS CHARACTERISTICS

The following bus protocol has been defined:

•Data transfer may be initiated only when the bus

is not busy.

•During data transfer, the data line must remain

stab le whe never th e cloc k line i s HIGH . Chang es

in th e dat a line whi le the clock line i s HI GH w ill be

interpreted as a START or STOP condition.

Accordingly, the following bus conditions have been

defined (Figure 3 -1).

3.1 Bus not Busy (A)

Both data and clock lines remain HIGH.

3.2 Start Data Transfer (B)

A HIGH to LOW transition of the SDA line while the

clock (SCL) is HIGH determines a START condition.

All commands must be preceded by a START condi-

tion.

3.3 S top Data Transfer (C)

A LOW to HIGH transition of the SDA line while the

clock (SCL) is HIGH determines a STOP condition. All

operati ons must be ende d with a STOP c ondition.

3.4 Data Valid (D)

The state of the data line represents valid data when,

after a START condition, the data line is stable for the

duration of the HIGH period of the clock signal.

The data on the line must be changed during the LOW

period o f th e clock sign al. Th ere is one c lock pu lse p er

bit of data.

Each data transfer is initiated with a START condition

and term ina t ed with a STOP c ond iti on. Th e n um ber of

the data bytes transferred between the START and

STOP conditions is determined by the master device

and is theo retically u nlimited , alth ough onl y the l ast six -

teen wi ll be stored when doing a write oper ation. When

an overwrite does occur it will replace data in a first-in

first-out (FIFO ) fash ion.

3.5 Acknowledge

Each receiving device, when addressed, is obliged to

generate an acknowledge after the reception of each

byte. The mast er device mus t ge nera te a n ext ra c lock

pulse which is associated with this acknowledge bit.

The device that acknowledges, has to pull down the

SDA line d uring th e ackn owledge clock pulse in such a

way that the SDA line is stable LOW during the HIGH

period of the acknowledge related clock pulse. Of

course, setup and hold times must be taken into

account. During reads, a master must signal an end of

dat a to the sl av e b y n ot generat ing an ac kn ow le dg e b it

on the las t by te tha t has be en c loc ke d ou t of th e sl av e.

In this case, the slave (24LC16B) will leave the data

line HIGH to enable the master to generate the STOP

condition.

FIGURE 3-1: DATA TRANSFER SEQUENCE ON THE SERIAL BUS

Note: The 24LC16B does not generate any

acknowledge bits if an internal pro-

gramming cycle is in progress.

SCL

SDA

(A) (B) (D) (D) (A)(C)

START

CONDITION ADDRESS OR

ACKNOWLEDGE

VALID

DATA

ALLOWED

TO CHANGE

STOP

CONDITION

24LC16B

DS20070M-page 6  2001 Microchip Technology Inc.

3.6 Device Addressing

A control byte is the first byte received following the

start conditi on from t he mast er devic e. The c ontrol by te

consis ts of a fou r bit con trol co de, for th e 24LC16 B this

is set as 1010 binary for read and write operations.

The next three bits of the control byte are the block

select bits (B2, B1, B0). They are used by the master

device to select which of the eight 256 word blocks of

memory are to be accessed. These bits are in effect the

three most significant bits of the word address. It

should be noted that the protocol limits the size of the

memory to eight blocks of 256 words, therefo re the pro-

tocol can support only one 24LC16B per system.

The last bit of the control byte defines the operation to

be performed. When set to ‘1’ a read operation is

selected, when set to ‘0’ a write operation is selected.

Follow ing the START condi tion, the 24LC16B monito rs

the SDA bus checking the device type identifier being

transmitted, upon a 1010 code the slave device out-

puts an acknowledge signal on the SDA line. Depend-

ing on the s tate of the R/W bit, th e 24L C 16B wil l se lec t

a read or write operation.

FIGURE 3-2: CONTROL BYTE

ALLOCATION

Operation Control

Code Block Select R/W

Read 1010 Block Addre ss 1

Write 1010 Block Address 0

1010B2 B1 B0

R/W A

START READ/WRITE

SLAVE ADDRESS

X = Don’t care

 2001 Microchip Technology Inc. DS20070M-page 7

24LC16B

4.0 WRITE OPERATION

4.1 Byte Write

Following the START condition from the master, the

dev ice code (4 bits), th e block address (3 bits) and the

R/W bit whic h i s a log ic LO W i s p lac ed ont o the bus by

the master transmitter. This indicates to the addressed

slave receiver that a byte with a word address will fol-

low after it has generated an acknowledge bit during

the nint h clock cycl e. Therefor e, the next byt e transmit-

ted by the master is the word address and will be writ-

ten into the address pointer of the 24LC16B. After

receiving another acknowledge signal from the

24LC1 6B, the master devi ce will tran smit the dat a word

to be written into the addressed memory location. The

24LC16B acknowledges again and the master gener-

ates a STOP condition. This initiates the internal write

cycle, and during this tim e the 24LC16 B will not gener-

ate acknowledge signals (Figure 4-1).

4.2 Page Write

The write control byte, word address and the first data

byte are transmitted to the 24LC16B in the same way

as in a byte write. But instead of generating a STOP

condition the master transmits up to 16 data bytes to

the 24LC16B, which are temporarily stored in the on-

chip page buffer and will be written into the memory

after the master has transmitted a STOP condition.

After the receipt of each word, the four lower order

address pointer bits are internally incremented by ‘1’.

The higher order 7 bits of the word address remains

constant. If the master should transmit more than 16

words prior to generating the STOP condition, the

address counter will roll over and the previously

receive d dat a will be overwri tten. As w ith the byte w rite

operation, once the STOP condition is received an

internal write cycle will begin (Figure 4-2).

FIGURE 4-1: BYTE WRI TE

FIGURE 4-2: PAGE WRITE

Note: Page w rite opera tions ar e limited to writ-

ing bytes within a single physical page,

regardless of the numbe r of by tes ac tu-

ally being written. Physical page bound-

aries start at addresses that are integer

multiples of the page buffer size (or

‘page size’) and end at addresses that

are int eger mul tiples of [pa ge size - 1]. If

a page write command attempts to w rite

across a physical page boundary, the

result is that the data wraps around to

the beginning of the current page (over-

writing data previously stored there),

instea d of being written to th e n ex t p a ge

as might be expected. It is therefore

necessary for the application software to

prevent page write operations that

would attempt to cross a page bo undary .

S P

BUS ACTIVITY

MASTER

SDA LINE

BUS ACT IV IT Y

CONTROL

BYTE WORD

ADDRESS DATA

S P

BUS ACTIVITY

MASTER

SDA LINE

BUS ACTIVITY

CONTROL

BYTE WORD

ADDRESS (n) DATA (n) DATA (n + 15)

DATA (n + 1)

24LC16B

DS20070M-page 8  2001 Microchip Technology Inc.

5.0 ACKNOWLEDGE POLLING

Since the device will not acknowledge during a write

cycle, this can be used to determine when the cycle is

complete (this feature can be used to maximize bus

throughp ut). Once th e STOP condition for a write com -

mand has been issued from the master, the device ini-

tiates the internally timed write cycle. ACK polling can

be initi ated immediately . This involves the master send-

ing a start condition followed by the control byte for a

write c ommand (R/W = 0). If the d evice is sti ll busy with

the write cycle, then no ACK will be returned. If the

cycle is complete, then the device will return the ACK

and the master can then proceed with the next read or

write command. See Figure 5-1 for flow diagram.

FIGURE 5-1: ACKNOWLEDGE POLLING

FLOW

6.0 WRITE PROTECTION

The 24LC16B can be used as a serial ROM when the

WP pin is connected to VCC. Programming will be

inhibit ed and the en tire m emory will b e write-p rotecte d.

Send

Write Command

Send St op

Condition to

Initia te Wr ite Cy c l e

Send Start

Send Control Byte

with R/W = 0

Did Device

Acknowledge

(ACK = 0)?

Operation

Yes

 2001 Microchip Technology Inc. DS20070M-page 9

24LC16B

7.0 READ OPERATION

Read operations are initiated in the same way as write

operations with the exception that the R/W bit of the

slave a ddress is se t to ‘1’. There a re three ba sic ty pes

of read op erations: current add ress read , random read

and sequential read.

7.1 Current Address Read

The 24LC16B contains an address counter that main-

tains the address of the last word accessed, internally

incremented by ‘1’. Therefore, if the previous access

(either a read or write operation) was to address n, the

next curren t address read operati on would access dat a

from address n + 1. Upon receipt of the slave add ress

with R/W bit set to ‘1’, the 24 LC16B issues an acknowl-

edge and tran smits the 8-bit dat a word. The maste r will

not acknowledge the transfer but does generate a

STOP condition and the 24LC16B discontinues trans-

mission (Fig ure 7-1).

7.2 Random Read

Random read operations allow the master to access

any memory location in a random manner. To perform

this typ e of re ad ope ration, first the w o rd ad dres s must

be set. This is done b y sending the word address to the

24LC16B as part of a write operation. After the word

address is sent, the master generates a START condi-

tion following the acknowledge. This terminates the

write operation, but not before the internal address

pointer is set. Then the master issues the control byte

again but with the R/W bit set to a ‘1’. The 24 LC16B will

then iss ue an acknowle dge and transm its the 8-bi t data

word. Th e master w ill n ot acknowl edge th e trans fer but

does ge nerate a STO P condition a nd the 24LC16 B dis-

continues transmission (Figure 7-2).

7.3 Sequentia l Read

Sequential reads are initiated in the same way as a ran-

dom read except that after the 24LC16B transmits the

first data byte, the master issues an acknowledge as

opposed to a STOP condition in a random read. This

directs the 24LC16B to transmit the next sequentially

addressed 8-bit word (Figure 7-3).

To provide sequential reads the 24LC16B contains an

internal address poin ter which is inc remented by o ne at

the com ple tio n o f each ope rati on. Thi s a ddre ss po int er

allows the entire memory contents to be serially read

during one operation.

7.4 Noise Protection

The 24 LC16 B employ s a VCC threshold detector circuit

which disables the internal erase/write logic if the VCC

is below 1.5V at nominal conditions.

The SCL and SDA input s have Schmitt trig ger and filter

circuits which suppress noise spikes to assure proper

device operation even on a noisy bus.

FIGURE 7-1: CURRENT ADDRESS READ

BUS ACTIVITY

MASTER

SDA LINE

BUS ACTIVITY

CONTROL

BYTE DATA (n)

24LC16B

DS20070M-page 10  2001 Microchip Technology Inc.

FIGURE 7-2: RANDOM READ

FIGURE 7-3: SEQUENTIAL READ

S P

BUS ACTIVITY

MASTER

SDA LINE

BUS ACTIVITY

CONTROL

BYTE

WORD

ADDRESS (n) CONTROL

BYTE

TDATA (n)

BUS ACT I VITY

MASTER

SDA LINE

BUS ACT I VITY

CONTROL

BYTE

DATA (n) DATA (n + 1) DATA (n + 2) DATA (n + X)

 2001 Microchip Technology Inc. DS20070M-page 11

24LC16B

8.0 PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 8-1.

TABLE 8-1: PIN FUNCTION TABLE

8.1 Serial Address/Data Input/Output

(SDA)

This is a bi-directional pin used to transfer addresses

and data into and data out of the device. It is an open

drain te rminal. Therefore, the SDA bus requires a pull-

up re sisto r to VCC (typical 10 kΩ fo r 1 00 kH z, 2 kΩ for

400 kHz).

For norma l data trans fer SDA is all owed to change only

during SCL LOW. Changes during SCL HIGH are

reserved for indicating the START and STOP condi-

tions.

8.2 Serial Clock (SCL)

This i nput is u sed t o sy nchron ize the d ata trans fer fro m

and to the device.

8.3 Write-Protect (WP)

This pin must be connected to either VSS or VCC.

If tied to VSS normal memory operation is enabled

(read/ write the ent ire me mo ry 000-7FF).

If tied to VCC, WRITE operations are inhibited. The

entir e memory will be write-prot ected. Re ad operation s

are not affected.

This feature allows the user to use the 24LC16B as a

serial ROM when WP is enabled (tied to VCC).

8.4 A0, A1, A2

These pi ns are not used by the 24LC16B. They m ay be

left floating or tied to either VSS or VCC.

Name PDIP SOIC TSSOP MSOP Description

A0 1 1 1 1 Not Connected

A1 2 2 2 2 Not Connected

A2 3 3 3 3 Not Connected

VSS 4 4 4 4 Ground

SDA 5 5 5 5 Serial Address/Data I/O

SCL 6 6 6 6 Serial Clock

WP 7 7 7 7 Write Protect Input

VCC 8 8 8 8 +2.5V to 5.5V Power Supply

24LC16B

DS20070M-page 12  2001 Microchip Technology Inc.

9.0 PACKAGING INFORMATION

9.1 Package Marking Information

XXXXXXXX

XXXXXNNN

YYWW

8-Lead PDIP (300 mil) Example:

8-Lead SOIC (150 mil) Example:

XXXXXXXX

XXXXYYWW

NNN

8-Lead TSSOP Example:

24LC16B

/PNNN

YYWW

24LC16B

SNYYWW

NNN

8-Lead MSOP Example:

XXXX

XYWW

NNN

XXXXXX

YWWNNN

4L16

YWW

NNN

4L16I

YWWNNN

Legend: XX...X Customer specific information*

Y Year code (last digit of calendar year)

YY Year code (last 2 digits of calendar year)

WW Week code (week of January 1 is week ‘01’)

NNN Alphanumeric traceability code

Note: In the event the full Mi croch ip p art numb er canno t be mark ed on one l ine, it will

be carried o ver to the n ext line thus li miting the nu mb er of ava ila ble cha rac ters

for customer specific information.

*Standard PICmicro device marking consists of Microchip part number, year code, week code, and

traceability code. For PICmicro device marking beyond this, certain price adders apply. Please check

with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP

price.

 2001 Microchip Technology Inc. DS20070M-page 13

24LC16B

8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)

Units INCHES* MILLIMETERS

Dime nsion Limits MIN NOM MAX MIN NOM MAX

Number of Pins n88

Pitch p.100 2.54

Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32

Molded Package Thickness A2 .115 .130 .145 2.92 3.30 3.68

Base to Seating Plane A1 .015 0.38

Shoulder to Shoulder Width E .300 .313 .325 7.62 7.94 8.26

Molded Package Width E1 .240 .250 .260 6.10 6.35 6.60

Overall Length D .360 .373 .385 9.14 9.46 9.78

Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43

Lead Thickness c.008 .012 .015 0.20 0.29 0.38

Upper Lead Width B1 .045 .058 .070 1.14 1.46 1.78

Lower Lead Width B .014 .018 .022 0.36 0.46 0.56

Overall Row S pacing §eB .310 .370 .430 7.87 9.40 10.92

Mold Draft Angle Top α51015 51015

Mold Draft Angle Bottom β51015 51015

* Controlling Parameter

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

JEDEC Equivalent: MS-001

Drawing No. C04-018

.010” (0.254mm) per side.

§ Significant Characteristic

24LC16B

DS20070M-page 14  2001 Microchip Technology Inc.

8-Lead Plastic Small Outline (SN) –Na rrow, 150 mil (SOIC)

Foot A ngle f048048

1512015120

Mold Draft Angle Bottom 1512015120

Mold Draft Angle Top 0.510.420.33.020.017.013BLead Width 0.250.230.20.010.009.008

Lead Thickness

0.760.620.48.030.025.019LFoot Length 0.510.380.25.020.015.010hChamfer Distance 5.004.904.80.197.193.189DOverall Length 3.993.913.71.157.154.146E1Molded Pa ckag e Width 6.206.025.79.244.237.228EOverall Width 0.250.180.10.010.007.004A1Standoff §1.551.421.32.061.056.052A2Molded Packag e Thickness 1.751.551.35.069.061.053AOverall Height 1.27.050

Pitch 88

Numb er of Pin s MAXNOMMINMAXNOMMINDimension Limits MILLIMETERSINCHES*Units

45×

* Controlling Parameter

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

.010” (0.254mm) per side.

JEDEC Equivalent: MS-012

Drawing No. C04-057

§ Significant Characteristic

 2001 Microchip Technology Inc. DS20070M-page 15

24LC16B

8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)

10501050

Mold Draft Angle Bottom 10501050

Mold Draft Angle Top 0.300.250.19.012.010.007BLead Width 0.200.150.09.008.006.004

Lead Thickness

0.700.600.50.028.024.020LFoot Length 3.103.002.90.122.118.114DMolded Package Length 4.504.404.30.177.173.169E1Molded Pa ckag e Width 6.506.386.25.256.251.246EOverall Width 0.150.100.05.006.004.002A1Standoff §0.950.900.85.037.035.033A2Mold ed Packag e Thick ness 1.10.043AOverall Height 0.65.026

Pitch 88

Number of Pins MAXNOMMINMAXNOMMINDimension Limi ts MILLIMETERS*INCHESUnits

Foot A ngle f048048

* Controlling Parameter

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

.005” (0.127mm) per side.

JEDEC Equivalent: MO-153

Drawing No. C04-086

§ Significant Characteristic

24LC16B

DS20070M-page 16  2001 Microchip Technology Inc.

8-Lead Plastic Micro Small Outline Package (MSOP)

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not

.037.035FFootprint (Reference)

exceed .010" (0.254mm) per side.

Notes:

*Controlling Parameter

Mold Draft Angle Top

Mold Draft Angle Bottom

Foot Angle

Lead Width

Lead Thickness

.005

.010

.006

.012

Dimension Limits

Overall Height

Molded Package Thickness

Molded Package Width

Overall Length

Foot Length

Standoff

Overall Width

Number of Pins

Pitch

.016

.116

.022

.118

.002

.032

.193 TYP.

.034

MIN

Units

.026 TYP.

NOM

INCHES

1.000.950.90.039

0.15

0.30

.007

.016

0.13

0.25

0.18

0.40

MILLIMETERS*

0.65 TYP.

0.86

3.00

0.55

4.90 TYP.

.043

.120

.028

.120

.036

.006

0.40

2.95

0.05

0.81

MINMAX NOM

1.10

0.70

3.05

0.15

0.91

MAX

n 1

 2001 Microchip Technology Inc. DS20070M-page 17

24LC16B

ON-LINE SUPPORT

Microchip provides on-line support on the Microchip

World Wide Web (WWW) site.

The web site is used b y Micr ochip as a me ans to mak e

files and information easily available to customers. To

view t he site, the user must have acce ss to the In ternet

and a web browser, such as Netscape® or Microsoft®

Explorer. Files are also available for FTP download

from our FTP site.

Connecting to the Microchip Internet Web Site

The Microchip web site is available by using your

fa vorite Internet browser to attach to:

www.microchip.com

The file transfer site is available by using an FTP ser-

vice to connect to:

ftp://ftp.microchip.com

The web site and file transfer site provide a variety of

services. Users may download files for the latest

Development Tools, Data Sheets, Application Notes,

User’s Guides, Articles and Sample Programs. A v ari-

ety of Microchip specific business information is also

available, including listings of Microchip sales offices,

distributors and factory representatives. Other data

available for consideration is:

•Latest Microchip Press Releases

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Questions

•Design Tips

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•Job Postin gs

•Microchip Consultant Program Member Listing

•Links to other useful web sites related to

Microchip Products

•Confere nces for prod ucts, Dev elopment Systems,

technical information and more

•Listing of seminars and events

Systems Information and Upgrade Hot Line

The Systems Information and Upgrade Line provides

system users a listing of the latest versions of all of

Microchip's development systems software products.

Plus, this line provides information on how customers

can receive any currently available upgrade kits.The

Hot Line Numbers are:

1-800-755-2345 for U.S. and most of Canada, and

1-480-792-7302 for the rest of the world.

24LC16B

DS20070M-page 18  2001 Microchip Technology Inc.

READER RESPONSE

It is ou r intentio n to pro vi de you w it h th e best document a tion po ss ible to e ns ure suc c es sful use of you r M icr oc hip pro d-

uct. If you wi sh to prov ide you r comment s on org anizatio n, clar ity, subj ect matte r , a nd ways i n whic h our doc umenta tion

can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-7578.

Please list the following information, and use this outline to provide us with your comments about this Data Sheet.

To: Technical Publications Manager

RE: Reader Response Total Pages Sent

From: Name

Company

Address

City / State / ZIP / Country

Telephone: (_______) _________ - _________

Applicati on (opt ional):

Would you like a reply? Y N

Device: Literature Number:

Questions:

FAX: (______) _________ - _________

DS20070M

24LC16B

1. What are the best feat ures of thi s document?

2. How does this document meet your hardware and software development needs?

3. Do you find the organization of this data sheet easy to follow? If not, why?

4. What additions to the data sheet do you think would enhance the structure and subject?

5. What deletions from the data sheet could be made without affecting the overall usefulness?

6. Is there any incorrect or misleading information (what and where)?

7. How would you improve this document?

8. How would you improve our software, systems, and silicon products?

 2001 Microchip Technology Inc. DS20070M-page 19

24LC16B

NOTES:

24LC16B

DS20070M-page 20  2001 Microchip Technology Inc.

NOTES:

 2001 Microchip Technology Inc. DS20070M-page 21

24LC16B

NOTES:

24LC16B

DS20070M-page 22  2001 Microchip Technology Inc.

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

Sales and Support

PART NO. X/XX

PackageTemperature

Range

Device

Device: 24LC16B: = 16 Kbit I2C Serial EEPROM

24LC16BT: = 16 Kbit I2C Serial EEPROM

(Tape and Reel)

Temperature

Range: I=-40°C to +85°C

E=-40°C to +125°C

Package: P = Plastic DIP (300 mil body), 8-lead

SN = Plastic SOIC (150 mil body), 8-lead

ST = Plas tic TSSO P (4.4 mm ), 8-lead

MS = Plastic Micro Small Outline (MSOP), 8-lead

Examples:

a) 24LC16B-E/P: Extended Temp.,

PDIP package

b) 24LC16B-E/SN: Extended Temp.,

SOIC pack ag e

c) 24LC16BT-E/SN: Tape and Reel,

Extended Temp., SO IC package

d) 24LC16B-I/P: Industrial Temp.,

PDIP package

e) 24LC16B-I/SN: Industrial Temp.,

SOIC pack ag e

f) 24LC16BT-I/SN: Tape and Reel,

Industrial Temp., SOIC packag e

g) 24LC16B-I/ST: Industrial Temp.,

TSSOP package

h) 24LC16BT-I/ST: Tape and Reel,

Industrial Temp., TSS OP package

Data Sheets

Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences

and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of

the following:

1. Your local Microchip sales office

2. The Microchip Corporate Literature Center U.S. Fax: (480) 792-7277

3. The Microchip Worldwide Site (www.microchip.com)

Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.

New Customer Notification System

 2001 Microchip Technology Inc. DS20070M-page 23

24LC16B

Technology Incorporated, USA. Information contained

in this publication regard ing device ap plications and the

like is intended through suggestion only and may be

superse ded by updates . No repr esent ati on or warrant y

is given and no liabil ity is assume d by Microchip

Technology Incorporated with respect to the accuracy

or use of such information, or infringement of paten ts or

other intellectual property rights arising from such use

or otherwise. Use of Microchip’s products as critical

components in life support systems is not authorized

except with express written approval by Microchip. No

licenses are conveyed, implicitly or otherwise, under

any int ell ectual pro per ty righ ts. The Mi croch ip log o and

name are registered trademarks of Microchip

Technology Inc. in the U.S.A. and other countries. All

rights rese rve d. Al l ot her t r ade ma rks m enti one d h erei n

are the property of their respective companies. No

licenses are conveyed, implicitly or otherwise, under

any intellectual property rights.”

Trademarks

The Microchip name, logo, PIC, PICmicro,

PICMASTER, PICSTART, PRO MATE, KEELOQ,

SEEVAL, MPLAB and The Embedd ed Control

Solutions Company are registered trademarks of

Microchip Technology Incorporated in the U.S.A. and

other countries.

Total Endurance, ICSP, In-Circuit Serial Programming,

FilterLab, MXDEV, microID, FlexROM, fuzzyLAB,

MPASM, MPLINK, MPLIB, PICDEM, ICEPIC,

Migratable Memory, FanSense, ECONOMONITOR,

Select Mode and microPort are trademarks of

Microchip Technology Incorporated in the U.S.A.

Serializ ed Q ui ck Term Programm in g (SQ TP) is a

service mark of Microchip Technology Incorporated in

the U.S.A.

All other trademarks mentioned herein are property of

their respec tiv e com p a ni es.

Microchip received QS-9000 quality system

certification for its worldwide headquarters,

design and wafer fabrication f acilities in

Chandler and T empe, Arizona in July 1999. The

Company’s quality system processes and

procedures are QS-9000 compliant for its

PICmicro® 8-bit MCUs, KEELOQ® code hopping

devices, Serial EEPROMs and microperipheral

products. In addition, Microchip’s quality

system for the design and manufacture of

development systems is ISO 9001 certified.

Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by

update s. It i s your respo nsibilit y to en sure t hat you r app licatio n mee ts with y our sp ecifica tions. N o re presen tation or warra nty is given and n o liability is

assumed by M icroc hip Techno logy In corpor ated with respe ct to the a ccuracy or u se of such i nfor mation, or infringem ent of paten ts or other intel lectua l

property rights arising from such use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with

express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, except as maybe explicitly expressed herein, under any intellec-

tual p roperty rights. The M icrochip logo an d name are reg istered tradema rks of Microchip Technolo gy Inc. in the U.S.A . and other countries. All rights

reserved. All other trademarks mentioned herein are the property of their respective companies.

DS20070M-page 24  2001 Microchip Technology Inc.

AMERICAS

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