1/9March 2001
STD6NC40
N-CHANNEL 400V - 0.75Ω - 5A - DPAK / IPAK
PowerMesh™II MOSFET
(1)ISD ≤5A, di/dt ≤100A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX.
■TYPICAL RDS(on) = 0.75Ω
■EXTREMELY HIGH dv /d t CAPABILIT Y
■100% AVALANCHE TESTED
■GATE CHARGE MINIMIZED
■ADD SUFFIX “T4” FOR ORDERING IN TAPE &
REEL
■ADD SUFFIX “-1” FOR ORDERING IN IPAK
DESCRIPTION
The PowerMESH™II is the evolution of the first
generation of MESH OVERLAY™. The layout re-
finements introduced greatly improve t he Ron*area
figure of merit while keeping the device at t he lea d-
ing edge for what concerns swithing speed, gate
charge and ruggedne ss.
APPLICATIONS
■SWITH MODE LOW POWER SUPPLIES
(SMPS)
■CFL
ABSOLUTE MAXIMUM RATINGS
(•) Pulse width li m i ted by safe operat i ng area
TYPE VDSS RDS(on) ID
STD6NC40 400V < 1 Ω5A
Symbol Parameter Value Unit
VDS Drain-source Voltage (VGS = 0) 400 V
VDGR Drain-gate Voltage (RGS = 20 kΩ)400 V
VGS Gate- source Voltage ±30 V
IDDrain Current (continuos) at TC = 25°C 5A
I
D
Drain Current (continuos) at TC = 100°C 3A
I
DM (■)Drain Current (pulsed) 20 A
PTOT Total Dissipation at TC = 25°C 55 W
Derating Factor 0.44 W/°C
dv/dt(1) Peak Diode Recovery voltage slope 3 V/ns
Tstg Storage Temperature –65 to 150 °C
TjMax. Operating Junction Temperature 150 °C
DPAK
13
3
2
1
IPAK
INTERNAL SCHEMAT IC DIAGRAM
STD6NC40
2/9
THE RMAL DA TA
AVALANCHE CHARACTERISTICS
ELECTRICAL CHARACT ERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
ON (1)
DYNAMIC
Rthj-case Thermal Resistance Junction-case Max 2.27 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 100 °C/W
Rthc-sink Thermal Resistance Case-sink Typ 1.5 °C/W
TlMaximum Lead Temperature For Soldering Purpose 275 °C
Symbol Paramet er Max Value Unit
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max) 6A
E
AS Single Pulse Avalanche Energy
(starting Tj = 25 °C, ID = IAR, VDD = 50 V) 320 mJ
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V(BR)DSS Drain-source
Breakdown Voltage ID = 250 µA, VGS = 0 400 V
IDSS Zero Gate Voltage
Drain Current (VGS = 0) VDS = Max Rating 1µA
V
DS = Max Rating, TC = 125 °C 50 µA
IGSS Gate-body Leakage
Current (VDS = 0) VGS = ±30V ±100 nA
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA 234V
R
DS(on) Static Drain-source On
Resistance VGS = 10V, ID = 3 A 0.75 1 Ω
ID(on) On State Drain Current VDS > ID(on) x RDS(on)max,
VGS =10V 6A
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (1) Forward Transconductance VDS > ID(on) x RDS(on)max,
ID=3A 5.1 S
Ciss Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 530 pF
Coss Output Capacitance 90 pF
Crss Reverse Transfer
Capacitance 15 pF
3/9
STD6NC40
ELECTRICAL CHARACT ERISTICS (CONTINUED)
SWITCHIN G ON
SWITCHIN G OFF
SOURCE DRAIN DI ODE
Note: 1. Pul sed: Pul se duration = 300 µs , duty cyc l e 1. 5 %.
2. Pulse width li m i ted by safe operat i ng area.
Symbol Parameter Test Conditions Min. Typ. Max. Unit
td(on) Turn-on Delay Time VDD = 200V, ID = 3A,
RG= 4.7Ω VGS = 10V
(see test circuit, Figure 3)
11 ns
trRise Time 15 ns
Qg
Qgs
Qgd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD = 320V, ID = 6A,
VGS = 10V 18
4
8.5
23 nC
nC
nC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross -over Time
VDD = 320V, ID = 6A,
RG=4.7
Ω, VGS = 10V
(see test circuit, Figure 5)
8
12
23
ns
ns
ns
Symbol Parameter Test Conditions Min. Typ. Max. Unit
ISD Source-drain Current 6 A
ISDM (1) Source-drain Current (pulsed) 24 A
VSD (2) Forward On Voltage ISD = 6A, VGS = 0 1.6 V
trr
Qrr
IRRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 6A, di/dt = 100A/µs,
VDD = 100V, Tj = 150°C
(see test circuit, Figure 5)
280
1.4
10
ns
µC
A
Thermal ImpedenceSafe Operating Area
STD6NC40
4/9
Gate Charge vs Gate-so urc e Voltage
Transco nductan ce Static Drain-so urce On Resistance
Transfer Characteri stics
Output Characteri stics
Capacitance Va ria tions
5/9
STD6NC40
Norma lized Gate Thresh ol d Voltage vs
Temperature
Source-drain Diode Forward Characteri stics
Normalized On Resistance vs Temp eratu re
STD6NC40
6/9
Fig. 5: Test Circuit For Inductive Lo ad Swi tching
And Diode Recovery Ti m es
Fig. 4: Gate Charge test Circuit
Fig. 2: Unclamped Induc tive WaveformFig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
7/9
STD6NC40
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 2.2 2.4 0.086 0.094
A1 0.9 1.1 0.035 0.043
A3 0.7 1.3 0.027 0.051
B 0.64 0.9 0.025 0.031
B2 5.2 5.4 0.204 0.212
B3 0.85 0.033
B5 0.3 0.012
B6 0.95 0.037
C 0.45 0.6 0.017 0.023
C2 0.48 0.6 0.019 0.023
D 6 6.2 0.236 0.244
E 6.4 6.6 0.252 0.260
G 4.4 4.6 0.173 0.181
H 15.9 16.3 0.626 0.641
L 9 9.4 0.354 0.370
L1 0.8 1.2 0.031 0.047
L2 0.8 1 0.031 0.039
A
C2
C
A3
H
A1
DL
L2
L1
1 3
= =
B3
B
B6
B2
E
G
= =
= =
B5
2
TO-251 (I PA K) ME CH ANI CAL DAT A
0068771-E
STD6NC40
8/9
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 2.20 2.40 0.087 0.094
A1 0.90 1.10 0.035 0.043
A2 0.03 0.23 0.001 0.009
B 0.64 0.90 0.025 0.035
B2 5.20 5.40 0.204 0.213
C 0.45 0.60 0.018 0.024
C2 0.48 0.60 0.019 0.024
D 6.00 6.20 0.236 0.244
E 6.40 6.60 0.252 0.260
G 4.40 4.60 0.173 0.181
H 9.35 10.10 0.368 0.398
L2 0.8 0.031
L4 0.60 1.00 0.024 0.039
V2 0
o
8
o
0
o
0
o
P032P_B
TO-252 (DPAK) MECHANICAL DATA
9/9
STD6NC40
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