LP3947 www.ti.com SNVS298B - NOVEMBER 2004 - REVISED APRIL 2013 LP3947 USB/AC Adaptor, Single Cell Li-Ion Battery Charger IC Check for Samples: LP3947 FEATURES DESCRIPTION * * * * * * * * * * The LP3947 is a complete charge management system that safely charges and maintains a Li-Ion battery from either USB power source or AC adaptor. In USB mode, the LP3947 supports charging in low power or high power mode. Alternatively, the LP3947 can take charge from AC adaptor. In both USB and AC adaptor modes, charge current, battery regulation voltage, and End of Charge (EOC) point can be selected via I2CTM interface. The LP3947 can also operate on default values that are pre-programmed in the factory. The battery temperature is monitored continuously at the Ts pin to safeguard against hazardous charging conditions. The charger also has under-voltage and over-voltage protection as well as an internal 5.6 hr timer to protect the battery. The pass transistor and charge current sensing resistor are all integrated inside the LP3947. 1 23 Supports USB Charging Scheme Integrated Pass Transistor Near-Depleted Battery Preconditioning Monitors Battery Temperature Built-In 5.6 Hour Timer Under Voltage and Over Voltage Lockout Charge Status Indicators Charge Current Monitor Analog Output LDO Mode Operation can source 1 Amp Continuous Over Current/Temperature Protection APPLICATIONS * * * * * Cellular Phones PDAs Digital Cameras USB Powered Devices Programmable Current Sources The LP3947 operates in four modes: pre-qualification, constant current, constant voltage and maintenance modes. There are two open drain outputs for status indication. An internal amplifier readily converts the charge current into a voltage. Also, the charger can operate in an LDO mode providing a maximum of 1.2 Amp to the load. KEY SPECIFICATIONS * * * * * 1% Charger Voltage Accuracy Over 0C TJ 85C 4.3V to 6V Input Voltage Range 100 mA to 750 mA Charge Current Range, in Charger Mode 100 mA to 500 mA Charge Current Range, in USB Mode WSON Package Power Dissipation: 2.7W at TA = 25C TYPICAL APPLICATION CIRCUIT USB Power Source 4.3V to 5.5V CHG-IN To System Supply BATT 1 PF Li-Ion 10 PF VBSense LP3947 CHG RT TS VT RS EOC Diff-Amp ISEL SCL MODE SDA EN GND More Application Circuit can be found in APPLICATION NOTES. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. I C is a trademark of Philips Semiconductor Corporation. All other trademarks are the property of their respective owners. 2 2 3 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2004-2013, Texas Instruments Incorporated LP3947 SNVS298B - NOVEMBER 2004 - REVISED APRIL 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. CONNECTION DIAGRAMS AND PACKAGE MARK INFORMATION 14 13 12 11 10 9 8 1 2 3 4 5 6 7 Figure 1. Package Number NHL0014B (Top View) PIN DESCRIPTIONS Pin # Name Description 1 EN Charger Enable Input. Internally pulled high to CHG-IN pin. A HIGH enables the charger and a LOW disables the charger. 2 SCL I2C serial Interface Clock input. 3 SDA I2C serial Interface Data input/out. 4 BATT Battery supply input terminal. Must have 10 F ceramic capacitor to GND 5 VT Regulated 2.78V output used for biasing the battery temperature monitoring thermistor. 6 VBSENSE Battery Voltage Sense connected to the positive terminal of the battery. 7 MODE Select pin between AC adaptor and USB port. A LOW sets the LP3947 in USB port and a HIGH sets it in the AC adaptor. 8 Diff-Amp Charge current monitoring differential amplifier output. Voltage output representation of the charge current. 9 Ts Multi function pin. Battery temperature monitoring input and LDO/Charger mode. Pulling this pin to VT, or removing the thermistor by physically disconnecting the battery, sets the device in LDO mode. 10 EOC Active Low Open Drain Output. Active when USB port or AC adaptor is connected and battery is fully charged. For more information, refer to "LED Charge Status Indicators" section. 11 GND Ground 12 CHG Active Low Open Drain Output. Active when USB port or AC adaptor is connected and battery is being charged. For more information, refer to "LED Charge Status Indicators" section. 13 ISEL Control pin to switch between low power (100 mA) mode and high power (500 mA) mode in USB mode. This pin is pulled high internally as default to set the USB in 100 mA mode. This pin has to be externally pulled low to go into 500 mA mode. 14 CHG-IN Charger input from a regulated, current limited power source. Must have a 1 F ceramic capacitor to GND Table 1. ORDERING INFORMATION Part Number Default Options Top-Side Markings LP3947ISD-09 ICHG = 500 mA L00061B VBATT = 4.1V EOC = 0.1C LP3947ISD-51 ICHG = 500 mA L00062B VBATT = 4.2V EOC = 0.1C 2 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP3947 LP3947 www.ti.com SNVS298B - NOVEMBER 2004 - REVISED APRIL 2013 LP3947 FUNCTIONAL BLOCK DIAGRAM ISEL Mode SDA CHG ON/OFF 2 I C and Digital Control SCL LED Driver EOC EN RSENSE CHG-IN BATT + Diff Amp Power FET Control VT Charger control LDO Mode Vref + - TS UTLO LDO Error Amp + OTLO + - ABSOLUTE MAXIMUM RATINGS (1) (2) If Military/Aerospace specified devices are required, contact the Texas Instruments Semiconductor Sales Office/ Distributors for availability and specifications. -0.3V to +6.5V CHG-IN All pins except GND and CHG-IN (3) -0.3V to +6V Junction Temperature 150C Storage Temperature -40C to +150C (4) 1.89W Power Dissipation ESD (5) Human Body Model Machine Model (1) (2) (3) (4) (5) 2 kV 200V All voltages are with respect to the potential at the GND pin. Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is ensured. Operating Ratings do not imply verified performance limits. For specified performance limits and associated test conditions, see the Electrical Characteristics tables. Caution must be taken to avoid raising pins EN and VT 0.3V higher than VCHG-IN and raising pins ISEL, MODE, SCL and SDA 0.3V higher than VBATT. The Absolute Maximum power dissipation depends on the ambient temperature and can be calculated using the formula MM P = (TJ - TA)JA, where TJ is the junction temperature, TA is the ambient temperature, and JA is the junction-to-ambient thermal resistance. The 1.89W rating appearing under Absolute Maximum Ratings results from substituting the Absolute Maximum junction temperature, 150C, for TJ, 80C for TA, and 37C/W for JA. More power can be dissipated safely at ambient temperatures below 80C. Less power can be dissipated safely at ambient temperatures above 80C. The Absolute Maximum power dissipation can be increased by 27 mW for each degree below 80C, and it must be de-rated by 27 mW for each degree above 80C. The human-body model is used. The human-body model is 100 pF discharged through 1.5 k. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP3947 3 LP3947 SNVS298B - NOVEMBER 2004 - REVISED APRIL 2013 www.ti.com RECOMMENDED OPERATING CONDITIONS (1) (2) CHG-IN 0.3V to 6.5V EN, ISEL, MODE, SCL, SDA, VT (3) 0V to 6V -40C to +125C Junction Temperature -40C to +85C Operating Temperature Thermal Resistance JA Maximum Power Dissipation (1) 37C/W (4) 1.21W Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is ensured. Operating Ratings do not imply verified performance limits. For specified performance limits and associated test conditions, see the Electrical Characteristics tables. All voltages are with respect to the potential at the GND pin. Caution must be taken to avoid raising pins EN and VT 0.3V higher than VCHG-IN and raising pins ISEL, MODE, SCL and SDA 0.3V higher than VBATT. Like the Absolute Maximum power dissipation, the maximum power dissipation for operation depends on the ambient temperature. The 1.21W rating appearing under Operating Ratings results from substituting the maximum junction temperature for operation, 125C, for TJ, 80C for TA, and 37C/W for JA into (1) above. More power can be dissipated at ambient temperatures below 80C. Less power can be dissipated at ambient temperatures above 80C. The maximum power dissipation for operation can be increased by 27 mW for each degree below 80C, and it must be de-rated by 27 mW for each degree above 80C. (2) (3) (4) ELECTRICAL CHARACTERISTICS Unless otherwise noted, VCHG-IN = 5V, VBATT = 4V, CCHG-IN = 1 F, CBATT = 10 F. Typical values and limits appearing in normal type apply for TJ = 25C. Limits appearing in boldface type apply over the entire junction temperature range for operation, TJ = -40C to +85C. (1) (2) (3) Symbol Parameter Conditions Typ Limit Min Max 4.5 6 4.3 6 Units VCC SUPPLY VCHG-IN Input Voltage Range VUSB ICC Quiescent Current VOK-TSHD Adaptor OK Trip Point (CHG-IN) VUVLO-TSHD Under Voltage Lock-Out Trip Point VCHG-IN 4V 2 20 EOC = Low, adaptor connected, VBATT = 4.1V 50 150 VCHG-IN -VBATT (Rising) 60 VCHG-IN -VBATT (Falling) VOVLO-TSHD Over Voltage Lock-Out Trip Point Thermal Shutdown Temperature V A mV 50 mV VCHG-IN (Rising) 3.95 3.6 4.3 V VCHG-IN (Falling) 3.75 3.4 4.1 V VCHG-IN (Rising) 5.9 VCHG-IN (Falling) 5.7 (2) Thermal Shutdown Hysteresis V 160 C 20 BATTERY CHARGER ICHG Fast Charge Current Range Fast Charge Current Accuracy IPRE-CHG (1) (2) (3) 4 Pre-Charge Current ISEL = High, In USB Mode 100 ISEL = Low, In USB Mode 500 mA In AC Adaptor Mode 100 750 ICHARGE = 100 mA or 150 mA -20 +20 ICHARGE 200 mA -10 +10 % VBATT = 2V 45 70 mA mA All limits are specified. All electrical characteristics having room-temperature limits are tested during production with TJ = 25C. All hot and cold limits are specified by correlating the electrical characteristics to process and temperature variations and applying statistical process control. Specified by design. LP3947 is not intended as a Li-Ion battery protection device, any battery used in this application should have an adequate internal protection. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP3947 LP3947 www.ti.com SNVS298B - NOVEMBER 2004 - REVISED APRIL 2013 ELECTRICAL CHARACTERISTICS (continued) Unless otherwise noted, VCHG-IN = 5V, VBATT = 4V, CCHG-IN = 1 F, CBATT = 10 F. Typical values and limits appearing in normal type apply for TJ = 25C. Limits appearing in boldface type apply over the entire junction temperature range for operation, TJ = -40C to +85C. (1) (2) (3) Symbol Parameter Conditions 100 mA to 450 mA, 0.1C EOC Only Typ (4) Limit Max -10 +10 mA % IEOC End of Charge Current Accuracy -20 +20 VBATT Battery Regulation Voltage (For 4.1V Cell) TJ = 0C to +85C 4.1 4.059 4.141 TJ = -40C to +85C 4.1 4.038 4.162 Battery Regulation Voltage (For 4.2V Cell) TJ = 0C to +85C 4.1 4.158 4.242 TJ = -40C to +85C 4.2 4.137 4.263 VCHG-Q Full Charge Qualification Threshold VBATT Rising, Transition from Pre-Charge to Full Current 3.0 VBAT-RST Restart Threshold Voltage (For 4.1V Cell) VBATT Falling, Transition from EOC, to PreQualification State 3.9 3.77 4.02 Restart Threshold Voltage (For 4.2V Cell) VBATT Falling, Transition from EOC, to PreQualification State 4.00 3.86 4.12 500 mA to 750 mA, All EOC Points RSENSE Internal Current Sense Resistance (2) tOUT Diff-Amp Output Charger Time Out VOL Low Level Output Voltage V 120 m 1.2 ICHG = 50 mA 0.583 ICHG = 100 mA 0.663 ICHG = 750 mA 1.790 TJ = 0C to 85C 5.625 4.78 6.42 TJ = -40C to +85C 5.625 4.5 6.75 EOC, CHG Pins each at 9 mA V V Internal Current Sense Resistor Load Current ICHGMON Units Min A V 100 Hrs mV TEMPERATURE SENSE COMPARATORS VUTLO VOTLO Low Voltage Threshold High Voltage Threshold VLDO LDO Mode Voltage Threshold VT Voltage Output Voltage at Ts Pin, Rising 2.427 Voltage at Ts Pin, Falling 2.369 Voltage at Ts Pin, Rising 1.470 Voltage at Ts Pin, Falling 1.390 Voltage at Ts Pin, % of VT V V 97 % 2.787 V LDO MODE (Ts = HIGH) VOUT Output Voltage Regulation ILOAD = 50 mA 4.10 ILOAD = 750 mA 4.06 V LOGIC LEVELS VIL Low Level Input Voltage EN, ISEL, MODE VIH High Level Input Voltage EN, ISEL, MODE 2.0 IIL Input Current EN, ISEL = LOW IIH Input Current (4) 0.4 V -10 +10 A MODE = LOW -5 +5 A EN, ISEL, MODE = HIGH -5 +5 A V The 10 mA limits apply to all charge currents from 100 mA to 450 mA, to 0.1C End Of Charge (EOC). The limits increase proportionally with higher EOC points. For example, at 0.2C, the End Of Charge current accuracy becomes 20 mA. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP3947 5 LP3947 SNVS298B - NOVEMBER 2004 - REVISED APRIL 2013 www.ti.com ELECTRICAL CHARACTERISTICS, I2C INTERFACE Unless otherwise noted, VCHG-IN = VDD = 5V, VBATT = 4V. Typical values and limits appearing in normal type apply for TJ = 25C. Limits appearing in boldface type apply over the entire junction temperature range for operation, TJ = -40C to +125C. (1) (2) (3) Symbol VIL Parameter Conditions Low Level Input Voltage Typ Limit Min Max Units SDA & SCL (2) 0.4 0.3 VDD V VIH High Level Input Voltage SDA & SCL (2) 0.7 VDD VDD +0.5 V VOL Low Level Output Voltage SDA & SCL (2) 0 0.2 VDD V VHYS Schmitt Trigger Input Hysteresis SDA & SCL (2) 0.1 VDD V FCLK Clock Frequency (2) tHOLD Hold Time Repeated START Condition (2) 0.6 s tCLK-LP CLK Low Period (2) 1.3 s tCLK-HP CLK High Period (2) 0.6 s Set-Up Time Repeated START Condition (2) 0.6 s Data Hold Time (2) 300 ns tDATA-SU Data Set-Up Time (2) 100 ns tSU Set-Up Time for STOP Condition (2) 0.6 s tTRANS Maximum Pulse Width of Spikes that must be Suppressed by the Input Filter of both DATA & CLK Signals. (2) tSU tDATA-HOLD (1) (2) (3) 400 50 kHz ns All limits are specified. All electrical characteristics having room-temperature limits are tested during production with TJ = 25C. All hot and cold limits are specified by correlating the electrical characteristics to process and temperature variations and applying statistical process control. Specified by design. LP3947 is not intended as a Li-Ion battery protection device, any battery used in this application should have an adequate internal protection. Prequalification to Fast Charge transition CC to CV transition 4.1V 0r 4.2V 1C 4.1V Battery Voltage Charge Current 3.9V 3V Battery Voltage Battery Current End of Charge Current 0.1C (Default) 50 mA Time RLED GLED ON OFF OFF ON Figure 2. Li-Ion Charging Profile 6 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP3947 LP3947 www.ti.com SNVS298B - NOVEMBER 2004 - REVISED APRIL 2013 APPLICATION NOTES LP3947 CHARGER OPERATION The LP3947 charge cycle is initiated with AC adaptor or USB power source insertion. If the voltage on the CHGIN pin meets under-voltage (VUVLO-TSHD), over-voltage (VOVLO-TSHD) requirements, and the Adaptor OK signal is detected, then pre-qualification cycle begins (see Figure 2). In this cycle, a safe current level, less than 70mA, is pumped into the battery while the voltage across the battery terminals is measured. Once this voltage exceeds 3.0V, the controller will initiate constant current fast charge cycle. If the CHG-IN pin is connected to an AC adaptor, the default charge current is 500 mA and I2C interface can be used to program this parameter. If the CHG-IN pin is connected to the USB port, constant current cycle will start with a default of 100 mA. During this cycle, the 5.6 hr safety timer starts counting. If the 5.6 hr safety timers times out during constant current cycle, charging is terminated. As the battery is charged during constant current mode, the voltage across pack terminal increases until it reaches 4.2V (or 4.1V). As soon as pack terminal reaches 4.2V (or 4.1V), the controller starts operating in constant voltage mode by applying regulated VBATT voltage across the battery terminals. During this cycle, the charge current, ICHG, continues to decrease with time and when it drops below 0.1C (default value), the EOC signal is activated indicating successful completion of the charge cycle. The EOC current can be programmed to 0.1C, 0.15C, or 0.2C. The default value is 0.1C. After completing the full charge cycle, the controller will start the maintenance cycle where battery pack voltage is monitored continuously. During the maintenance cycle, if the pack voltage drops 200 mV below the termination voltage, charge cycle will be initiated providing that the wall adaptor is plugged in and is alive. Charging terminates when the battery temperature is out of range. For more explanation, please refer to Ts PIN. The LP3947 with I2C interface allows maximum flexibility in selecting the charge current, battery regulation voltage and EOC current. The LP3947 operates in default mode during power up. See I2C INTERFACE for more detail. When charging source comes from the USB port, charging starts with 100 mA (low power mode, ISEL = high). The USB controller can set the ISEL pin low to charge the battery at 500 mA. A simple external circuit selects between an AC adaptor or the USB port. The circuit is designed with priority given to the AC adaptor. P-Ch MOSFET USB Port CHG-IN To System Supply BATT 1 PF Li-Ion 10 PF VBSense RS Wall Adaptor LP3947 1k 10k CHG TS RT VT EOC Diff-Amp EN SCL ISEL SDA GND Mode Figure 3. LP3947 with External Switch Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP3947 7 LP3947 SNVS298B - NOVEMBER 2004 - REVISED APRIL 2013 4.3V < VCHG-IN < 6.0V and VBATT < VCHG-IN www.ti.com 4.3V < VCHG-IN < 6V VBATT > VCHG-IN Ts t 2.7V Charger Off LED's Off 1.39V < Ts < 2.42V LDO Mode ICHG = 1.2A VBATT = 4.1V* RLED = On GLED = Off LED's Off Pre-Qualification Charge Current = 50 mA 1.39V<Ts<2.42V ? N Y VBATT > 3.0V? N Y Set Fast Charge Current = I Start 5.6 hr Timer Timer time out Timer = 5.6 hr? Charger = Off Timer resets RLED = ON GLED = ON Y Disconnect power at CHG-IN pin to restart charger Maintenance Mode Charger = Off RLED = Off GLED = On N 1.39V<Ts<2.42V ? N 1.39V<Ts<2.42V ? Y EN pin = low? VBATT < 3.9V and EN pin = High? N Battery Temp violation Charger = Off Timer resets RLED = ON GLED = ON Y N N Y VBATT > = 4.1V*? Y N N 1.39V<Ts<2.42V ? Y Y Y Constant Voltage Mode VBATT = 4.1V * 1.39V<Ts<2.42V ? N VBATT > 3.0V? N Y 1.39V<Ts<2.42V ? N Y Timer = 5.6 hr? or EN pin = low? Y N 2 * Default Value. See "I C Interface" section. N IEOC < (0.1 x ICHG)*? Y Figure 4. LP3947 Charger Flow Chart 8 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP3947 LP3947 www.ti.com SNVS298B - NOVEMBER 2004 - REVISED APRIL 2013 CHARGE CURRENT SELECTION IN CONSTANT CURRENT MODE In the AC adaptor mode, the LP3947 is designed to provide a charge current ranging from 100 mA to 750 mA, in steps of 50 mA, to support batteries with different capacity ratings. The default value is 500 mA. No external resistor is required to set the charge current in the LP3947. In the USB mode, the LP3947 will initially charge with 100 mA (ISEL = high). By setting the ISEL pin low, charge current can be programmed to 500 mA. In addition, with ISEL = low, the charge current can be programmed to different values via the I2C interface. Table 2. Charge Current Selection in AC Adaptor/USB Mode MODE Pin AC Adaptor Mode USB Mode ISEL Pin Functions HIGH HIGH ISEL polarity is irrelevant. Default 500 mA charge current. Can be reprogrammed via I2C. HIGH LOW LOW HIGH 100 mA charge current LOW LOW Default 500 mA charge current. Can be reprogrammed via I2C. BATTERY VOLTAGE SELECTION The battery voltage regulation can be set to 4.1V or 4.2V by default. Please refer to Ordering Information for more details. END OF CHARGE (EOC) CURRENT SELECTION The EOC thresholds can be programmed to 0.1C, 0.15C or 0.2C in the LP3947. The default value is 0.1C, which provides the highest energy storage, but at the expense of longer charging time. On the other hand, 0.2C takes the least amount of charging time, but yields the least energy storage. CHARGE CURRENT SENSE DIFFERENTIAL AMPLIFIER The charge current is monitored across the internal 120 m current sense resistor. The differential amplifier provides the analog representation of the charge current. Charge current can be calculated using the following equation: ICHG = (VDIFF - 0.497) 1.655 (1) Where voltage at Diff Amp output (VDIFF) is in volt, and charge current (ICHG) is in amps. CHG-IN 1.74V Batt Diff-Amp Output RSense 120 m: Diff-Amp 0.583V 750 mA 50 mA Charge Current Figure 5. Charge Current Monitoring Circuit (Diff-Amp) Monitoring the Diff Amp output during constant voltage cycle can provide an accurate indication of the battery charge status and time remaining to EOC. This feature is particularly useful during constant voltage mode. The current sense circuit is operational in the LDO mode as well. It can be used to monitor the system current consumption during testing. LED CHARGE STATUS INDICATORS The LP3947 is equipped with two open drain outputs to drive a green LED and a red LED. These two LEDs work together in combinations to indicate charge status or fault conditions. Table 3 shows all the conditions. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP3947 9 LP3947 SNVS298B - NOVEMBER 2004 - REVISED APRIL 2013 www.ti.com Table 3. LED Indicator Summary RED LED (CHG) GREEN LED (EOC) OFF OFF Charger Off Charging Li Ion Battery (1) ON OFF Maintenance Mode OFF ON Charging Li Ion Battery after Passing Maintenance Mode OFF ON EN Pin = LOW OFF ON LDO Mode OFF OFF 5.6 Hr Safety Timer Flag/Battery Temperature Violation ON ON (1) Charging Li Ion battery for the first time after VCHG-IN insertion. Ts PIN The LP3947 continuously monitors the battery temperature by measuring the voltage between the Ts pin and ground. Charging stops if the battery temperature is outside the permitted temperature range set by the battery's internal thermistor RT and the external bias resistor RS. A 1% precision resistor should be used for RS. A curve 2 type thermistor is recommended for RT. The voltage across RT is proportional to the battery temperature. If the battery temperature is outside of the range during the charge cycle, the LP3947 will suspend charging. As an example, for a temperature range of 0C to 50C, a 10k for the thermistor and a 4.1k for Rs should be used. When battery temperature returns to the permitted range, charging resumes from the beginning of the flow chart and the 5.6 hr safety timer is reset. Refer to Figure 4. LP3947 Charger Flow Chart for more information. In absence of the thermistor, Ts pin will be pulled high to VT and the LP3947 goes into LDO mode. In this mode, the internal power FET provides up to 1.2 amp of current at the BATT pin. The LDO output is set to 4.1V or 4.2V, depending on the programmed battery regulation voltage. When operating at higher output currents, care must be taken not to exceed the package power dissipation rating. See "Thermal Performance of WSON Package" section for more detail. Table 4. Charger Status in Relation to Ts Voltage Voltage on the Ts Pin Charger Status Ts 2.7V LDO Mode 2.427v Ts < 2.7V 0V Ts 1.39V Charger Off 1.39V < Ts < 2.427V Charger On LDO MODE The charger is in the LDO mode when the Ts pin is left floating. This mode of operation is used primarily during system level testing of the handset to eliminate the need for battery insertion. CAUTION: battery may be damaged if device is operating in LDO mode with battery connected. The internal power FET provides up to 1.2 amp of current at BATT pin in this mode. The LDO output is set to 4.1V. When operating at higher output currents, care must be taken not to exceed the package power dissipation rating. See "Thermal Performance of WSON Package" section for more detail. EN PIN The Enable pin is used to enable/disable the charger, in both the charger mode and the LDO mode, see Figure 6 Figure 7. The enable pin is internally pulled HIGH to the CHG-IN pin. When the charger is disabled, it draws less than 4 A of current. 10 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP3947 LP3947 www.ti.com SNVS298B - NOVEMBER 2004 - REVISED APRIL 2013 VCHG-IN CHG-IN CHG-IN VCHG-IN 0 VCHG-IN VCHG-IN EN EN 0 0 4.1V 3.0V Load < 50 mA VBATT VBATT 0 3.0V 0 Load > 50 mA 0 0 0 Time Time Figure 6. Power Up Timing Diagram in Charger Mode (1.39V < Ts < 2.427V) VCHG-IN CHG-IN CHG-IN VCHG-IN 0 VCHG-IN 0 EN EN VCHG-IN 0 4.1V 4.1V VBATT VBATT 0 0 0 0 0 Time Time Figure 7. Power Up Timing Diagram in LDO Mode (Ts 2.7V) MODE PIN The mode pin toggles the LP3947 between the AC adaptor mode and the USB mode. When CHG-IN is connected to a USB port, this pin must be set low. When CHG-IN is connected to an AC adaptor, this pin must be tied high to either the BATT pin or to the wall adaptor input. Caution: MODE pin should never be tied to CHGIN pin directly, as it will turn on an internal diode. 5.6 HR SAFETY TIMER IN CHARGER MODE The LP3947 has a built-in 5.6 hr back up safety timer to prevent over-charging a Li Ion battery. The 5.6 hr timer starts counting when the charger enters the constant current mode. It will turn the charger off when the 5.6 hr timer is up while the charger is still in constant current mode. In this case, both LEDs will turn on, indicating a fault condition. When the battery temperature is outside the specified temperature range, the 5.6 hr safety timer will reset upon recovery of the battery temperature. I2C INTERFACE I2C interface is used in the LP3947 to program various parameters as shown in Table 5. The LP3947 operates on default settings following power up. Once programmed, the LP3947 retains the register data as long as the battery voltage is above 2.85V. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP3947 11 LP3947 SNVS298B - NOVEMBER 2004 - REVISED APRIL 2013 www.ti.com Table 5. LP3947 Serial Port Communication address code 7h'47 LP3947 Control and Data Codes (1) (1) Addrs Register 8h00 7 6 5 4 3 2 1 0 Charger Register -1 Batt Voltage (0) = 4.1V 1 = 4.2V AC Adaptor Charge Current Code 3 (1) AC Adaptor Charge Current Code 2 (0) AC Adaptor Charge Current Code 1 (0) AC Adaptor Charge Current Code 0 (0) 8h01 Charger Register -2 EOC (Green LED) R/O Charging (Red LED) R/O EOC SEL-1 (0) EOC SEL-0 (1) 8h02 Charger Register -3 USB Charge Current Code 3 (1) USB Charge Current Code 2 (0) USB Charge Current Code 1 (0) USB Charge Current Code 0 (0) Numbers in parentheses indicate default setting. "0" bit is set to low state, and "1" bit is set to high state. R/O -Read Only, All other bits are Read and Write. Table 6. Charger Current and EOC Current Programming Code Data Code Charger Current Selection Code ISET (mA) 4h00 100 4h01 150 0.1C 4h02 200 0.15C 4h03 250 0.2C 4h04 300 4h05 350 4h06 400 4h07 450 4h08 500 4h09 550 4h0A 600 4h0B 650 4h0C 700 4h0D 750 ack from slave start msb ID lsb End of Charge Current Selection Code ack from slave w ack msb ADDRESS lsb ack ack from slave lsb ack address h00 data ack msb DATA stop scl sda start id = h47 w ack addr = h00 ack w = write (sda = "0") r = read (sda = "1") ack = acknowledge (sda pulled low by either master or slave) Nack = No Acknowledge rs = repeated start Figure 8. LP3947 (Slave) Register Write 12 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP3947 LP3947 www.ti.com SNVS298B - NOVEMBER 2004 - REVISED APRIL 2013 ack from slave start msb ID lsb ack from slave w ack msb ADDRESS lsb ack repeated start rs msb ID ack from slave lsb data from slave Nack from master r ack msb DATA lsb NA stop r ack address h00 data Nack stop scl sda start id = h47 w ack addr = h00 ack rs id = h47 w = write (sda = "0") r = read (sda = "1") ack = acknowledge (sda pulled low by either master or slave) Nack = No Acknowledge rs = repeated start Figure 9. LP3947 (Slave) Register Read THERMAL PERFORMANCE OF WSON PACKAGE The LP3947 is a monolithic device with an integrated pass transistor. To enhance the power dissipation performance, the Leadless Lead frame Package, or WSON, is used. The WSON package is designed for improved thermal performance because of the exposed die attach pad at the bottom center of the package. It brings advantage to thermal performance by creating a very direct path for thermal dissipation. Compared to the traditional leaded packages where the die attach pad is embedded inside the mold compound, the WSON reduces a layer of thermal path. The thermal advantage of the WSON package is fully realized only when the exposed die attach pad is soldered down to a thermal land on the PCB board and thermal vias are planted underneath the thermal land. Based on a WSON thermal measurement, junction to ambient thermal resistance (JA) can be improved by as much as two times if a WSON is soldered on the board with thermal land and thermal vias than if not. An example of how to calculate for WSON thermal performance is shown below: TJA = TJ - TA PD (2) By substituting 37C/W for JA, 125C for TJ and 70C for TA, the maximum power dissipation allowed from the chip is 1.48W. If VCHG-IN is at 5.0V and a 3.0V battery is being charged, then 740 mA of ICHG can safely charge the battery. More power can be dissipated at ambient temperatures below 70C. Less power can be dissipated at ambient temperatures above 70C. The maximum power dissipation for operation can be increased by 27 mW for each degree below 70C, and it must be de-rated by 27 mW for each degree above 70C. LAYOUT CONSIDERATION The LP3947 has an exposed die attach pad located at the bottom center of the WSON package. It is imperative to create a thermal land on the PCB board when designing a PCB layout for the WSON package. The thermal land helps to conduct heat away from the die, and the land should be the same dimension as the exposed pad on the bottom of the WSON (1:1 ratio). In addition, thermal vias should be added inside the thermal land to conduct more heat away from the surface of the PCB to the ground plane. Typical pitch and outer diameter for these thermal vias are 1.27 mm and 0.33 mm respectively. Typical copper via barrel plating is 1oz although thicker copper may be used to improve thermal performance. The LP3947 bottom pad is connected to ground. Therefore, the thermal land and vias on the PCB board need to be connected to ground. For more information on board layout techniques, refer to Application Note 1187 (SNOA401) "Leadless Leadframe Package (LLP)." The application note also discusses package handling, solder stencil, and assembly. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP3947 13 LP3947 SNVS298B - NOVEMBER 2004 - REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision A (April 2013) to Revision B * 14 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 13 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP3947 PACKAGE OPTION ADDENDUM www.ti.com 8-Oct-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) LP3947ISD-09/NOPB ACTIVE WSON NHL 14 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 L00061B LP3947ISD-51/NOPB ACTIVE WSON NHL 14 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 L00062B (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 8-Oct-2015 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 2-Sep-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LP3947ISD-09/NOPB WSON NHL 14 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 LP3947ISD-51/NOPB WSON NHL 14 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 2-Sep-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP3947ISD-09/NOPB WSON NHL 14 1000 210.0 185.0 35.0 LP3947ISD-51/NOPB WSON NHL 14 1000 210.0 185.0 35.0 Pack Materials-Page 2 MECHANICAL DATA NHL0014B SDA14B (Rev A) www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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