June 2001
FDS6670A
Single N-Channel, Logic Level, PowerTrench MOSFET
General Description Features
Absolute Maximum Ratings TA = 25oC unless other wise noted
Symbol Parameter FDS6670AUnits
VDSS Drain-Source Voltage 30 V
VGSS Gate-Source Voltage ±20 V
IDDrain Current - Continuous (Note 1a) 13 A
- Pulsed 50
PDPower Dissipation for Single Operation (Note 1a) 2.5 W
(Note 1b) 1.2
(Note 1c) 1
TJ,TSTG Operating and Storage Temperature Range -55 to 150 °C
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a)50 °C/W
RθJC Thermal Resistance, Junction-to-Case (Note 1) 25 °C/W
FDS6670A Rev.E
13 A, 30 V. RDS(ON) = 0.008 @ VGS = 10 V
RDS(ON) = 0.010 @ VGS = 4.5 V.
Fast switching speed.
Low gate charge (35 nC tyical).
High performance trench technology for
extremely low RDS(ON).
High power and current handling capability.
SOT-23 SuperSOTTM-8 SOIC-16
SO-8 SOT-223SuperSOTTM-6
This N-Channel Logic Level MOSFET is produced
using Fairchild Semiconductor's advanced PowerTrench
process that has been especially tailored to minimize
the on-state resistance and yet maintain superior
switching performance.
These devices are well suited for low voltage and battery
powered applications where low in-line power loss and
fast switching are required.
1
6
7
8
2
4
3
5
© 2001 Fairchild Semiconductor Corporation
Electrical Characteristics (TA = 25 OC unless otherwise noted )
Symbol Parameter Conditions Min Typ Max Units
OFF CHARACTERISTICS
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, I D = 250 µA 30 V
BVDSS/TJBreakdown Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 oC20 mV / oC
IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 1µA
TJ = 55°C 10 µA
IGSSF Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA
IGSSR Gate - Body Leakage, Reverse VGS = -20 V, VDS = 0 V -100 nA
ON CHARACTERISTICS (Note 2)
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA11.6 3V
VGS(th)/TJGate Threshold Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 oC-4.5 mV /oC
RDS(ON) Static Drain-Source On-Resistance VGS = 10 V, I D = 13 A0.0063 0.008
TJ =125°C 0.009 0.014
VGS = 4.5 V, I D = 10.5 A0.0082 0.01
ID(ON) On-State Drain Current VGS = 10 V, VDS = 5 V 50 A
gFS Forward Transconductance VDS = 15 V, I D = 13 A 20 50 S
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance VDS = 15 V, VGS = 0 V,
f = 1.0 MHz 3200 pF
Coss Output Capacitance 820 pF
Crss Reverse Transfer Capacitance 400 pF
SWITCHING CHARACTERISTICS (Note 2)
tD(on)
Turn - On Delay Time VDS = 10 V, I D= 1 A 15 27 ns
tr
Turn - On Rise Ti
VGS = 10 V , RGEN = 6 15 27 ns
tD(off) Turn - Off Delay Time 85 105 ns
tfTurn - Off Fall Time 42 68 ns
QgTotal Gate Charge VDS = 15 V, I D = 13 A, 35 50 nC
Qgs Gate-Source Charge VGS = 5 V 9nC
Qgd
Gate-Drain Charge 16 nC
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
ISMaximum Continuous Drain-Source Diode Forward Current 2.1 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 2.1 A (Note 2)0.71 1.2 V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is
guaranteed by design while RθCA is determined by the user's board design.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
FDS6670A Rev.E
c. 125OC/W on a 0.006 in2 pad
of 2oz copper.
b. 105OC/W on a 0.04 in2
pad of 2oz copper.
a. 50OC/W on a 1 in2 pad
of 2oz copper.
FDS6670A Rev.E
00.5 11.5 2
0
10
20
30
40
50
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAIN-SOURCE CURRENT (A)
DS
D
2.5V
3.5V
3.0V
V =10V
GS
5.5V
4.5V
Typical Electrical Characteristics
Figure 1. On-Region Characteristics.Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
-50 -25 0 25 50 75 100 125 150
0.6
0.8
1
1.2
1.4
1.6
T , JUNCTION TEMPERATURE (°C)
DRAIN-SOURCE ON-RESISTANCE
J
R , NORMALIZED
DS(ON)
V = 10V
GS
I = 13A
D
Figure 3. On-Resistance Variation with
Temperature.
11.5 22.5 33.5 4
0
10
20
30
40
50
60
V , GATE TO SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
V = 5.0V
DS
GS
D
25°C -55°C
T =125°C
J
Figure 5 . Transfer Characteristics. Figure 6 . Body Diode Forward Voltage
Variation with Source Current
and Temperature.
2 4 6 8 10
0
0.005
0.01
0.015
0.02
0.025
0.03
V , GATE TO SOURCE VOLTAGE (V)
GS
R , ON-RESISTANCE (OHM)
DS(ON)
25°C
I = 6.5A
D
T = 125°C
A
Figure 4 . On Resistance Variation with
Gate-to-Source Voltage.
0 10 20 30 40 50
0.5
1
1.5
2
2.5
I , DRAIN CURRENT (A)
DRAIN-SOURCE ON-RESISTANCE
V = 3.0V
GS
D
R , NORMALIZED
DS(ON)
10V
4.5 V
4.0 V
3.5 V
6.0 V
00.2 0.4 0.6 0.8 11.2
0.0001
0.001
0.01
0.1
1
5
40
V , BODY DIODE FORWARD VOLTAGE (V)
I , REVERSE DRAIN CURRENT (A)
25°C
-55°C
V = 0V
GS
SD
S
T = 125°C
J
FDS6670A Rev.E
Figure 10. Single Pulse Maximum Power
Dissipation.
Figure 8. Capacitance Characteristics.
Figure 7. Gate Charge Characteristics.
Figure 9. Maximum Safe Operating Area.
Typical Electrical Thermal Characteristics
0.0001 0.001 0.01 0.1 110 100 300
0.001
0.002
0.005
0.01
0.02
0.05
0.1
0.2
0.5
1
t , TIME (sec)
TRANSIENT THERMAL RESISTANCE
r(t), NORMALIZED EFFECTIVE
1
Single Pulse
D = 0.5
0.1
0.05
0.02
0.01
0.2
Duty Cycle, D = t /t
12
R (t) = r(t) * R
R = 125°C/WθJA
θJA
θJA
T - T = P * R (t)
θJA
A
J
P(pk)
t
1 t
2
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
0 10 20 30 40 50 60 70 80
0
2
4
6
8
10
Q , GATE CHARGE (nC)
V , GATE-SOURCE VOLTAGE (V)
g
GS
I = 13A
DV = 5V
DS 10V
15V
0.1 0.2 0.5 1 2 5 10 30
100
200
500
1000
2000
4000
7000
V , DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
DS
C
iss
f = 1 MHz
V = 0 V
GS
C
oss
C
rss
0.05 0.1 0.5 1 2 5 10 30 50
0.01
0.05
0.1
0.5
1
2
5
10
30
100
V , DRAIN-SOURCE VOLTAGE (V)
I , DRAIN CURRENT (A)
RDS(ON) LIMIT
D
A
DC
DS
1s
100ms
10ms
1ms
10s
V =10V
SINGLE PULSE
R = 125°C/W
T = 25°C
θJA
GS
A
100us
0.001 0.01 0.1 1 10 100 300
0
10
20
30
40
50
SINGLE PULSE TIME (SEC)
POWER (W)
SINGLE PULSE
R =125°C/W
T = 25°C
θJA
A
SOIC(8ld s) Packaging
Configuration: Figure 1.0
Components Leader Tape
1680mm minimum or
210 empty poc kets
Tr ailer Tape
640mm min imum or
80 empty poc kets
SOIC(8ld s) Tape Leader and Trailer
Configuration: Figure 2.0
Cover Tape
Carrier Tape
Note/Comments
Packaging Option
SOIC (8lds) Packaging Information
Standard
(no flow code) L86Z F011
Packaging type
Reel Size
TNR
13" Dia
Rail/Tube
-
TNR
13" Dia
Qty per Reel/Tube/Bag 2,500 95 4,000
Box Dimension (mm) 355x333x40 530x130x83 355x333x40
Max qty per Box 5,000 30,000 8,000
D84Z
TNR
7" Dia
500
193x183x80
2,000
Weig ht pe r un it (gm) 0.0774 0.0774 0.0774 0.0774
Weig ht pe r Reel (kg) 0.6060 -0.9696 0.1182
F63TNR Label sample
LOT: CBVK741B019
FSID: FDS9953A
D/C1: Z9842AB QTY1: SPEC REV:
SPEC:
QTY: 2500
D/C2: QTY2: CPN: N/F: F (F63TNR)3
F
852
NDS
9959
SOIC-8 Unit Orientation
F
852
NDS
9959
Pi n 1
Static Dissipative
Embossed Carrier Tape
F63TNR
Label
Antis tati c Cover Tape
Customized
Label
Packaging Description:
SOIC-8 parts are shipped in tape. The carrier tape is
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
2,5 00 uni t s pe r 13" o r 33 0c m d ia met er re el . Th e re el s are
dark blue in color and is made of polystyrene plastic (anti-
static coated). Other option comes in 500 units per 7" or
177cm diameter reel. This and some other options are
further described in the Packaging Information table.
These full reels are individually barcode labeled and
placed inside a standard intermediate box (illustrated in
figure 1.0) made of recyclable corrugated brown paper.
One box contains two reels maximum. And these boxes
are placed inside a barcode labeled shipping box which
com e s in di ffe re nt s iz es depe ndin g on th e nu mbe r of part s
shipped.
F
852
NDS
9959
F
852
NDS
9959
F
852
NDS
9959
Embossed ESD Marking
ATTENTION
OBSERVE PRECAUTIONS
FOR HANDLING
ELECTROSTATIC
SENSITIVE
DEVICES
Embossed ESD Marking
ATTENTION
OBSERVE
FOR HANDLING
ELECTROSTATIC
SENSITIVE
DEVICES
ATTENTION
OBSERVE
FOR HANDLING
ELECTROSTATIC
SENSITIVE
DEVICES
ATTENTION
OBSERVE
FOR HANDLING
ATTENTION
OBSERVE
FOR HANDLING
ATTENTION
OBSERVE PRECAUTIONS
FOR HANDLING
ELECTROSTATIC
SENSITIVE
DEVICES
193mm x 183mm x 80mm
Pizza Box for Standard Option
Barcode
Label
Barcode
Label
Barcode Label
355mm x 333mm x 40mm
Intermediate container for 13” reel option
SOIC-8 Tape and Reel Data
January 2001, Rev. C
©2001 Fairchild Semiconductor Corporation
1998 Fairchild Semiconductor Corporation
Dimensions are in millimeter
Pkg type
A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc
SOIC(8lds)
(12mm)
5.30
+/-0.10 6.50
+/-0.10 12.0
+/-0.3 1.55
+/-0.05 1.60
+/-0.10 1.75
+/-0.10 10.25
min 5.50
+/-0.05 8.0
+/-0.1 4.0
+/-0.1 2.1
+/-0.10
0.450
+/-
0.150
9.2
+/-0.3 0.06
+/-0.02
P1
A0 D1
P0
F
W
E1
D0
E2
B0
Tc
Wc
K0
T
Dimensions are in inches and millimeters
Tape Siz e Reel
Option Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)
12m m 7" Dia 7.00
177.8 0.059
1.5 512 +0.020/-0.008
13 +0.5/-0.2 0.795
20.2 2.165
55 0.488 +0.078/-0.000
12.4 +2/0 0.724
18.4 0.469 – 0.606
11.9 – 15.4
12m m 13" Dia 13.00
330 0.059
1.5 512 +0.020/-0.008
13 +0.5/-0.2 0.795
20.2 7.00
178 0.488 +0.078/-0.000
12.4 +2/0 0.724
18.4 0.469 – 0.606
11.9 – 15.4
See detail AA
Dim A
max
13" Diameter Option
7" Diameter Option
Dim A
Max
See detail AA
W3
W2 max Measured at Hub
W1 Measured at Hub
Dim N
Dim D
min
Dim C
B Min
DETAIL AA
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
20 deg maximum component rotation
0.5mm
maximum
0.5mm
maximum
Sketch C (Top View)
Component lateral movement
Typical
component
cavity
center line
20 deg maximum
Typical
component
center line
B0
A0
Sketch B (Top View)
Component Rotation
Sketch A (Side or Front Sectional View)
Component Rotation
User Direction of Feed
SOIC(8ld s) Embossed Carrier Tape
Configuration: Figure 3.0
SOIC(8ld s) Reel Confi gu rat ion: Figure 4.0
SOIC-8 Tape and Reel Data, continued
January 2001, Rev. C
SOIC-8 (FS PKG Code S1)
1 : 1
Scale 1:1 on letter size paper
D i m ensio ns shown bel ow ar e in:
inches [m illimet ers]
Part Weight per unit (gram): 0.0774
SOIC-8 Package Dimensions
September 1998, Rev. A
9
©2000 Fairchild Semiconductor International
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PRODUCT ST A TUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
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that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
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STAR*POWER is used under license