LM3710YQMM-232/NOPB - NATIONAL SEMICONDUCTOR

VIN1

GND GND

NMI

VCC

PFI

VCC

PFO

INT

LLO

Reset

VIN2

bus

WDI

LM3710, LM3711

www.ti.com

SNVS150E –NOVEMBER 2000–REVISED MARCH 2013

LM3710/LM3711 Microprocessor Supervisory Circuits with Power Fail Input, Low Line

Output, Manual Reset and Watchdog Timer

Check for Samples: LM3710,LM3711

1FEATURES DESCRIPTION

The LM3710/LM3711 series of microprocessor

2• Standard Reset Threshold Voltage: 3.08V supervisory circuits provide the maximum flexibility for

• Custom Reset Threshold Voltages: For other monitoring power supplies and battery controlled

voltages between 2.2V and 5.0V in 10mV functions in systems without backup batteries. The

increments, contact TI LM3710/LM3711 series are available in VSSOP-10

and 9-bump DSBGA packages.

• No External Components Required

• Manual-Reset Input Built-in features include the following:

• RESET (LM3710) or RESET (LM3711) Outputs Reset: Reset is asserted during power-up, power-

• Precision Supply Voltage Monitor down, and brownout conditions. RESET is ensured

down to VCC of 1.0V.

• Factory Programmable Reset and Watchdog

Timeout Delays Manual Reset Input: An input that asserts reset when

pulled low.

• Separate Power Fail Comparator

• Available in DSBGA Package for Minimum Power-Fail Input: A 1.225V threshold detector for

Footprint power fail warning, or to monitor a power supply other

than VCC.

• ±0.5% Reset Threshold Accuracy at Room

Temperature Low Line Output: This early power failure warning

indicator goes low when the supply voltage drops to a

• ±2% Reset Threshold Accuracy Over value which is 2% higher than the reset threshold

Temperature Extremes voltage.

• Reset Assertion Down to 1V VCC (RESET Watchdog Timer: The WDI (Watchdog Input)

Option Only) monitors one of the µP's output lines for activity. If no

• 28 µA VCC Supply Current output transition occurs during the watchdog timeout

period, reset is activated.

APPLICATIONS

• Embedded Controllers and Processors

• Intelligent Instruments

• Automotive Systems

• Critical µP Power Monitoring

Typical Application

1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Reset VCC

GND WDI

NC PFI

LLO

PFO

C B A

VCC

PFI

WDI

GND

LLO

PFO

Reset

LM3710, LM3711

SNVS150E –NOVEMBER 2000–REVISED MARCH 2013

www.ti.com

Connection Diagram

Figure 1. VSSOP-10

Figure 2. Top View

(looking from the coating side)

DSBGA 9 Bump Package

PIN DESCRIPTIONS

Pin No. Name Function

DSBGA VSSOP

A1 2 MR Manual-Reset input. When MR is less than VMRT (Manual Reset Threshold) RESET/RESET is

engaged.

B1 1 VCC Power Supply input.

C1 10 RESET Reset Logic Output. Pulses low for tRP (Reset Timeout Period) when triggered, and stays low

whenever VCC is below the reset threshold or when MR is below VMRT. It remains low for tRP after

either VCC rises above the reset threshold, or after MR input rises above VMRT (LM3710 only).

RESET Reset Logic Output. RESET is the inverse of RESET (LM3711 only).

C2 8 PFO Power-Fail Logic Output. When PFI is below VPFT, PFO goes low; otherwise, PFO remains high.

C3 7 LLO Low-Line Logic Output. Early Power-Fail warning output. Low when VCC falls below VLLOT (Low-

Line Output Threshold). This output can be used to generate an NMI (Non-Maskable Interrupt) to

provide an early warning of imminent power-failure.

B3 5 GND Ground reference for all signals.

A3 4 WDI Watchdog Input Transition Monitor: If no transition activity occurs for a period exceeding tWD

(Watchdog Timeout Period), reset is engaged.

A2 3 PFI Power-Fail Comparator Input. When PFI is less than VPFT (Power-Fail Reset Threshold), the PFO

goes low; otherwise, PFO remains high.

B2 6, 9 NC No Connect. Test input used at factory only. Leave floating.

Product Folder Links: LM3710 LM3711

LM3710, LM3711

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SNVS150E –NOVEMBER 2000–REVISED MARCH 2013

Block Diagram

Table Of Functions

Part Active Active Output Reset Watchdog Manual Power Fail Low Line

Number Low High (X = totem-pole) Timeout Timeout Reset Comparator Output

Reset Reset (Y = open-drain) Period Period

LM3710 x X, Y(1) Customized Customized x x x

LM3711 x X Customized Customized x x x

(1) Available upon request. Contact TI.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Product Folder Links: LM3710 LM3711

LM3710, LM3711

SNVS150E –NOVEMBER 2000–REVISED MARCH 2013

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Absolute Maximum Ratings(1)(2)

Supply Voltage (VCC)−0.3V to 6.0V

All Other Inputs −0.3V to VCC + 0.3V

ESD Ratings (3)

Human Body Model 1.5kV

Machine Model 150V

Power Dissipation (4)

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for

which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test

conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance

characteristics may degrade when the device is not operated under the listed conditions.

(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and

specifications.

(3) The Human Body model is a 100 pF capacitor discharged through a 1.5 kΩresistor into each pin. The machine model is a 200pF

capacitor discharged directly into each pin.

(4) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal

resistance, θJ-A, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperture is calculated

using:

Where the value of θJ-A for the VSSOP-10 package is 195°C/W in a typical PC board mounting and the DSBGA package is 220°C/W.

Operating Ratings(1)

Temperature Range −40°C ≤TJ≤85°C

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for

which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test

conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance

characteristics may degrade when the device is not operated under the listed conditions.

LM3710/LM3711 Series Electrical Characteristics

Limits in the standard typeface are for TJ= 25°C and limits in boldface type apply over full operating range. Unless otherwise

specified: VCC = +2.2V to 5.5V.

Symbol Parameter Conditions Min Typ Max Units

POWER SUPPLY

VCC Operating Voltage LM3710 1.0 5.5 V

Range: VCC LM3711 1.2 5.5

ICC VCC Supply Current All inputs = VCC; all outputs floating 28 50 µA

RESET THRESHOLD

VRST Reset Threshold VCC falling −0.5 +0.5

−2 +2

VRST %

VCC falling: TA= 0°C to 70°C −1.5 +1.5

VRSTH Reset Threshold 0.0032•VRST mV

Hysteresis

tRP Reset Timeout Period Reset Timeout Period = E, J, N, S 11.4 2

Reset Timeout Period = F, K, P, T 20 28 40 ms

Reset Timeout Period = G, L, Q, U 140 200 280

Reset Timeout Period = H, M, R, V 1120 1600 2240

tRD VCCto Reset Delay VCCfalling at 1mV/µs 20 µs

RESET (LM3711)

VOL RESET VCC > 2.25V, ISINK = 900µA 0.3

VCC > 2.7V, ISINK = 1.2mA 0.3 V

VCC > 4.5V, ISINK = 3.2mA 0.4

VOH RESET VCC > 1.2V, ISOURCE = 50µA 0.8 VCC

VCC > 1.8V, ISOURCE = 150µA 0.8 VCC

VCC > 2.25V, ISOURCE = 300µA 0.8 VCC V

VCC > 2.7V, ISOURCE = 500µA 0.8 VCC

VCC > 4.5V, ISOURCE = 800µA VCC −1.5V

Product Folder Links: LM3710 LM3711

LM3710, LM3711

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SNVS150E –NOVEMBER 2000–REVISED MARCH 2013

LM3710/LM3711 Series Electrical Characteristics (continued)

Limits in the standard typeface are for TJ= 25°C and limits in boldface type apply over full operating range. Unless otherwise

specified: VCC = +2.2V to 5.5V.

Symbol Parameter Conditions Min Typ Max Units

ILKG Output Leakage VRESET = 5.5V 1.0 µA

Current

RESET (LM3710)

VOL RESET VCC > 1.0V, ISINK = 50µA 0.3

VCC > 1.2V, ISINK = 100µA 0.3

VCC > 2.25V, ISINK = 900µA 0.3

VCC > 2.7V, ISINK = 1.2mA 0.3 V

VCC > 4.5V, ISINK = 3.2mA 0.4

VOH RESET VCC > 2.25V, ISOURCE = 300µA 0.8 VCC

VCC > 2.7V, ISOURCE = 500µA 0.8 VCC

VCC > 4.5V, ISOURCE = 800µA VCC −1.5V

WDI

WDI Watchdog Input −1 +1 µA

Current

WDITWatchdog Input 0.2•VCC 1.225 0.8•VCC V

Threshold

tWD Watchdog Timeout Watchdog Timeout Period = E, F, G, H 4.3 6.2 9.3

Period Watchdog Timeout Period = J, K, L, M 71 102 153 ms

Watchdog Timeout Period = N, P, Q, R 1120 1600 2400

Watchdog Timeout Period = S, T, U, V 17900 25600 38400

PFI/MR

VPFT PFI Input Threshold 1.200 1.225 1.250 V

VMRT MR Input Threshold MR, Low 0.8 V

MR, High 2.0

VPFTH/ PFI/MR Threshold PFI/MR falling: VCC = VRST MAX to 5.5V 0.0032•VRST mV

VMRTH Hysteresis

IPFI Input Current −75 75 nA

(PFI only)

RMR MR Pull-up 35 56 75 kΩ

Resistance

tMD MR to Reset Delay 12 µS

tMR MR Pulse Width 25 µS

PFO, LLO

VOL PFO, LLO Output VCC > 2.25V, ISINK = 900µA 0.3

Voltage VCC > 2.7V, ISINK = 1.2mA 0.3

VCC > 4.5V, ISINK = 3.2mA 0.4 V

VOH VCC > 2.25V, ISOURCE = 300µA 0.8 VCC

VCC > 2.7V, ISOURCE = 500µA 0.8 VCC

VCC > 4.5V, ISOURCE = 800µA VCC −1.5V

LLO OUTPUT

VLLOT LLO Output 1.01•VRST 1.02•VRST 1.03•VRST V

Threshold

(VLLO −VRST, VCC

falling)

VLLOTH Low-Line Comparator 0.0032•VRST mV

Hysteresis

tCD Low-Line Comparator VCC falling at 1mV/µs 20 µs

Delay

Product Folder Links: LM3710 LM3711

10 1000

Maximum Transient Duration (Ps)

Reset Comparator Overdrive (mV)

VRST - VCC

100

190

195

200

205

210

215

-40 Temperature (°C)

Reset Timeout Period (ms)

25 85

Reset Timeout Period (ms)

Supply Voltage (V)

180

185

190

195

200

205

210

215

220

3.0 3.5 44.5 55.5 6

Normalized Threshold Voltage (%)

Temperature (°C)

0.5

0.3

0.1

-0.5

-40 25 85

-0.3

-0.1

-0.4

-0.2

0.2

0.4

Supply Voltage (V)

Supply Current (PA)

12345

-40 025 70 85

Temperature (°C)

Supply Current (PA)

LM3710, LM3711

SNVS150E –NOVEMBER 2000–REVISED MARCH 2013

www.ti.com

Typical Performance Characteristics

Supply Current vs Supply Voltage 3.3V Supply Current vs Temperature

Figure 3. Figure 4.

Normalized Reset Threshold Voltage vs Temperature Reset Timeout Period vs VCC

Figure 5. Figure 6.

Max. Transient Duration vs Reset Comparator Overdrive

Reset Timeout Period vs Temperature (VCC = 3.3V)

Figure 7. Figure 8.

Product Folder Links: LM3710 LM3711

5.2

5.4

5.6

5.8

6.2

6.4

6.6

6.8

-40 25 85

Temperature (RC)

Watchdog Timeout Period (ms)

-40 -20 020 40 60 80

Temperature (oC)

Propagation Delay (Ps)

LM3710, LM3711

www.ti.com

SNVS150E –NOVEMBER 2000–REVISED MARCH 2013

Typical Performance Characteristics (continued)

Watchdog Timeout Period vs Temperature

(tWD programmed as 6.2ms) Low-Line Comparator Propagation Delay vs Temperature

Figure 9. Figure 10.

Product Folder Links: LM3710 LM3711

LM3710, LM3711

SNVS150E –NOVEMBER 2000–REVISED MARCH 2013

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CIRCUIT INFORMATION

RESET OUTPUT

The Reset input of a µP initializes the device into a known state. The LM3710/LM3711 microprocessor

supervisory circuits assert a forced reset output to prevent code execution errors during power-up, power-down,

and brownout conditions.

RESET is ensured valid for VCC > 1V. Once VCC exceeds the reset threshold, an internal timer maintains the

output for the reset timeout period. After this interval, reset goes high. The LM3710 offers an active-low RESET;

The LM3711 offers an active-high RESET.

Any time VCC drops below the reset threshold (such as during a brownout), the reset activates. When VCC again

rises above the reset threshold, the internal timer starts. Reset holds until VCC exceeds the reset threshold for

longer than the reset timeout period. After this time, reset releases.

The Manual Reset input (MR) will initiate a forced reset also. See the MANUAL RESET INPUT (MR) section.

RESET THRESHOLD

The LM3710/LM3711 family is available with a reset voltage of 3.08V. Other reset thresholds in the 2.20V to

5.0V range, in steps of 10 mV, are available; contact Texas Instruments for details.

MANUAL RESET INPUT (MR)

Many µP-based products require a manual reset capability, allowing the operator to initiate a reset. The MR input

is fully debounced and provides an internal 56 kΩpull-up. When the MR input is pulled below VMRT (1.225V) for

more than 25 µs, reset is asserted after a typical delay of 12 µs. Reset remains active as long as MR is held low,

and releases after the reset timeout period expires after MR rises above VMRT. Use MR with digital logic to assert

or to daisy chain supervisory circuits. It may be used as another low-line comparator by adding a buffer.

POWER-FAIL COMPARATOR (PFI/PFO)

The PFI is compared to a 1.225V internal reference, VPFT. If PFI is less than VPFT, the Power Fail Output PFO

drops low. The power-fail comparator signals a falling power supply, and is driven typically by an external voltage

divider that senses either the unregulated supply or another system supply voltage. The voltage divider generally

is chosen so the voltage at PFI drops below VPFT several milliseconds before the main supply voltage drops

below the reset threshold, providing advanced warning of a brownout.

The voltage threshold is set by R1and R2and is calculated as follows:

(1)

Note this comparator is completely separate from the rest of the circuitry, and may be employed for other

functions as needed.

LOW-LINE OUTPUT (LLO)

The low-line output comparator is typically used to provide a non-maskable interrupt to a µP when VCC begins

falling. LLO monitors VCC and goes low when VCC falls below VLLOT (typically 1.02 • VRST) with hysteresis of

0.0032 • VRST.

WATCHDOG TIMER INPUT (WDI)

The watchdog timer input monitors one of the microprocessor's output lines for activity. Each time a transition

occurs on this monitored line, the watchdog counter is reset. However, if no transition occurs and the timeout

period is reached, the LM3710/LM3711 assumes that the microprocessor has locked up and the reset output is

activated.

WDI is a high impedance input.

Product Folder Links: LM3710 LM3711

LM3710, LM3711

www.ti.com

SNVS150E –NOVEMBER 2000–REVISED MARCH 2013

SPECIAL PRECAUTIONS FOR THE DSBGA PACKAGE

As with most integrated circuits, the LM3710 and LM3711 are sensitive to exposure from visible and infrared (IR)

light radiation. Unlike a plastic encapsulated IC, the DSBGA package has very limited shielding from light, and

some sensitivity to light reflected from the surface of the PC board or long wavelength IR entering the die from

the side may be experienced. This light could have an unpredictable affect on the electrical performance of the

IC. Care should be taken to shield the device from direct exposure to bright visible or IR light during operation.

DSBGA MOUNTING

The DSBGA package requires specific mounting techniques which are detailed in TI Application Note AN-1112

(SNVA009). Referring to the section Surface Mount Assembly Considerations, it should be noted that the pad

style which must be used with the 9-pin package is the NSMD (non-solder mask defined) type.

For best results during assembly, alignment ordinals on the PC board may be used to facilitate placement of the

DSBGA device.

Timing Diagrams

Figure 11. LM3710/LM3711 Reset Time with MR and WDI

Figure 12. LLO Output

Product Folder Links: LM3710 LM3711

GND GND

VCC

PFI PP

INT

RESET

LLO

PFO

VIN1

VIN2

Active Data Line

WDI

+ 1Power-Fail Reset Threshold, VPFT = 1.225 (

(

. R1

LM3710, LM3711

SNVS150E –NOVEMBER 2000–REVISED MARCH 2013

www.ti.com

Figure 13. PFI Comparator Timing Diagram

Typical Application Circuits

Figure 14. Monitoring Two Critical Supplies And Dataline

Product Folder Links: LM3710 LM3711

System

Regulator 0.1Pceramic

3.3V

VCC

GND

PFI

RESET

PFO

RESET

INT

+ 1Power-Fail Reset Threshold, VPFT = 1.225 (

(

Raw Supply

(Battery)

Active Data

Line

WDI

VCC

RESET

3.3V

1.8

107k

332k

VI/O VCORE

FAULT (Normally High)

GND

PFI

PFO

RESET

Active Data Line

WDI

GND

VCC

PFI

MR PFO

RESET

3.3V

1.8V

107k

332k

VI/O Vcore

3.3k

WDI

Active Data Line

LM3710, LM3711

www.ti.com

SNVS150E –NOVEMBER 2000–REVISED MARCH 2013

Figure 15. Monitoring Two Supplies plus Manual Reset And Dataline

Figure 16. Monitoring Dual Supplies plus External Fault Input And Dataline

Note: MR input with its 1.225V nominal threshold, may monitor an additional supply voltage. An internal 56 kΩpull-up

resistor is included on this input.

Figure 17. Microprocessor Supervisor with Early Warning Detector

Product Folder Links: LM3710 LM3711

VCC

GND

PFI

RESET

WDI

OUTPUT

+3.3 to 5V

tRP

tWD

Period = tRP + tWD

LM3710, LM3711

SNVS150E –NOVEMBER 2000–REVISED MARCH 2013

www.ti.com

Figure 18. LM3710 Long Period oscillator

Product Folder Links: LM3710 LM3711

LM3710, LM3711

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SNVS150E –NOVEMBER 2000–REVISED MARCH 2013

REVISION HISTORY

Changes from Revision D (March 2013) to Revision E Page

• Changed layout of National Data Sheet to TI format .......................................................................................................... 12

Product Folder Links: LM3710 LM3711

PACKAGE OPTION ADDENDUM

www.ti.com 6-Feb-2020

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

LM3710XKMM-463/NOPB ACTIVE VSSOP DGS 10 1000 Green (RoHS

& no Sb/Br) SN Level-1-260C-UNLIM R74B

LM3710XQMM-308/NOPB ACTIVE VSSOP DGS 10 1000 Green (RoHS

& no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 R37B

LM3710YQMM-232/NOPB ACTIVE VSSOP DGS 10 1000 Green (RoHS

& no Sb/Br) SN Level-1-260C-UNLIM R77B

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish

value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

PACKAGE OPTION ADDENDUM

www.ti.com 6-Feb-2020

Addendum-Page 2

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

LM3710XKMM-463/NOPB VSSOP DGS 10 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM3710XQMM-308/NOPB VSSOP DGS 10 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

LM3710YQMM-232/NOPB VSSOP DGS 10 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 2-Sep-2015

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

LM3710XKMM-463/NOPB VSSOP DGS 10 1000 210.0 185.0 35.0

LM3710XQMM-308/NOPB VSSOP DGS 10 1000 210.0 185.0 35.0

LM3710YQMM-232/NOPB VSSOP DGS 10 1000 210.0 185.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 2-Sep-2015

Pack Materials-Page 2

www.ti.com

PACKAGE OUTLINE

TYP

5.05

4.75

1.1 MAX

8X 0.5

10X 0.27

0.17

0.15

0.05

TYP

0.23

0.13

0 - 8

0.25

GAGE PLANE

0.7

0.4

NOTE 3

3.1

2.9

NOTE 4

3.1

2.9

4221984/A 05/2015

VSSOP - 1.1 mm max heightDGS0010A

SMALL OUTLINE PACKAGE

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not

exceed 0.15 mm per side.

4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.

5. Reference JEDEC registration MO-187, variation BA.

110

0.1 C A B

PIN 1 ID

AREA

SEATING PLANE

0.1 C

SEE DETAIL A

DETAIL A

TYPICAL

SCALE 3.200

www.ti.com

EXAMPLE BOARD LAYOUT

(4.4)

0.05 MAX

ALL AROUND 0.05 MIN

ALL AROUND

10X (1.45)

10X (0.3)

8X (0.5)

(R )

TYP

0.05

4221984/A 05/2015

VSSOP - 1.1 mm max heightDGS0010A

SMALL OUTLINE PACKAGE

SYMM

LAND PATTERN EXAMPLE

SCALE:10X

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

METAL

SOLDER MASK

OPENING

NON SOLDER MASK

DEFINED

SOLDER MASK DETAILS

NOT TO SCALE

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

DEFINED

www.ti.com

EXAMPLE STENCIL DESIGN

(4.4)

8X (0.5)

10X (0.3)

10X (1.45)

(R ) TYP0.05

4221984/A 05/2015

VSSOP - 1.1 mm max heightDGS0010A

SMALL OUTLINE PACKAGE

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

9. Board assembly site may have different recommendations for stencil design.

SYMM

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

SCALE:10X

IMPORTANT NOTICE AND DISCLAIMER

TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE

DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”

AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY

IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD

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