tm
74VHC157 Quad 2-Input Multiplexer
May 2007
©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC157 Rev. 1.2
74VHC157
Quad 2-Input Multiplexer
Features
High Speed: t
PD
=
4.1ns (Typ.) at V
CC
=
5V
Low power dissipation: I
CC
=
4µA (Max.) at T
A
=
25°C
High noise immunity: V
NIH
=
V
NIL
=
28% V
CC
(Min.)
Power down protection is provided on all inputs
Low noise: V
OLP
=
0.8V (Max.)
Pin and function compatible with 74HC157
General Description
The VHC157 is an advanced high speed CMOS Quad
2-Channel Multiplexer fabricated with silicon gate CMOS
technology. It achieves the high speed operation similar
to equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation.
It consists of four 2-input digital multiplexers with com-
mon select and enable inputs. When the ENABLE input
is held “H” level, selection of data is inhibited and all the
outputs become “L” level. The SELECT decoding deter-
mines whether the I
0x
or I
1x
inputs get routed to their cor-
responding outputs.
An Input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and on two supply systems such as battery
back up. This circuit prevents device destruction due to
mismatched supply and input voltages.
Ordering Information
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number.
Connection Diagram Pin Description
Order Number
Package
Number Package Description
74VHC157M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150”
Narrow
74VHC157SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC157MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
Pin Names Description
I
0a
–I
0d
Source 0 Data Inputs
I
1a
–I
1d
Source 1 Data Inputs
EEnable Input
S Select Input
Z
a
–Z
d
Outputs
74VHC157 Quad 2-Input Multiplexer
©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC157 Rev. 1.2 2
Logic Symbols
IEEE/IEC
Truth Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Functional Description
The VHC157 is a quad 2-input multiplexer. It selects four
bits of data from two sources under the control of a
common Select input (S). The Enable input (E) is active-
LOW. When E is HIGH, all of the outputs (Z) are forced
LOW regardless of all other inputs. The VHC157 is the
logic implementation of a 4-pole, 2-position switch where
the position of the switch is determined by the logic
levels supplied to the Select input. The logic equations
for the outputs are shown below:
Z
a
=
E • (I
1a
• S + I
0a
• S)
Z
b
=
E • (I
1b
• S + I
0b
• S)
Z
c
=
E • (I
1c
• S + I
0c
• S)
Z
d
=
E • (I
1d
• S + I
0d
• S)
A common use of the VHC157 is the moving of data from
two groups of registers to four common output busses.
The particular register from which the data comes is
determined by the state of the Select input. A less obvi-
ous use is as a function generator. The VHC157 can
generate any four of the sixteen different functions of two
variables with one variable common. This is useful for
implementing gating functions.
Inputs Outputs
ESI
0
I
1
Z
HX X X L
LH X L L
LH X H H
LL L X L
LL H X H
74VHC157 Quad 2-Input Multiplexer
©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC157 Rev. 1.2 3
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to
estimate propagation delays.
74VHC157 Quad 2-Input Multiplexer
©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC157 Rev. 1.2 4
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Recommended Operating Conditions
(1)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Note:
1. Unused inputs must be held HIGH or LOW. They may not float.
Symbol Parameter Rating
V
CC
Supply Voltage –0.5V to +7.0V
V
IN
DC Input Voltage –0.5V to +7.0V
V
OUT
DC Output Voltage –0.5V to V
CC
+ 0.5V
I
IK
Input Diode Current –20mA
I
OK
Output Diode Current ±20mA
I
OUT
DC Output Current ±25mA
I
CC
DC V
CC
/ GND Current ±50mA
T
STG
Storage Temperature –65°C to +150°C
T
L
Lead Temperature (Soldering, 10 seconds) 260°C
Symbol Parameter Rating
V
CC
Supply Voltage 2.0V to +5.5V
V
IN
Input Voltage 0V to +5.5V
V
OUT
Output Voltage 0V to V
CC
T
OPR
Operating Temperature –40°C to +85°C
t
r
, t
f
Input Rise and Fall Time,
V
CC
=
3.3V ± 0.3V
V
CC
=
5.0V ± 0.5V
0ns/V
100ns/V
0ns/V
20ns/V
74VHC157 Quad 2-Input Multiplexer
©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC157 Rev. 1.2 5
DC Electrical Characteristics
Noise Characteristics
Note:
2. Parameter guaranteed by design.
Symbol Parameter V
CC
(V) Conditions
T
A
=
25°C
T
A
=
–40°C to
+85°C
UnitsMin. Typ. Max. Min. Max.
V
IH
HIGH Level Input
Voltage
2.0 1.50 1.50 V
3.0–5.5 0.7 x V
CC
0.7 x V
CC
V
IL
LOW Level Input
Voltage
2.0 0.50 0.50 V
3.0–5.5 0.3 x V
CC
0.3 x V
CC
V
OH
HIGH Level
Output Voltage
2.0 V
IN
=
V
IH
or V
IL
I
OH
=
–50µA 1.9 2.0 1.9 V
3.0 2.9 3.0 2.9
4.5 4.4 4.5 4.4
3.0 I
OH
=
–4mA 2.58 2.48
4.5 I
OH
=
–8mA 3.94 3.80
V
OL
LOW Level
Output Voltage
2.0 V
IN
=
V
IH
or V
IL
I
OL
=
50µA 0.0 0.1 0.1 V
3.0 0.0 0.1 0.1
4.5 0.0 0.1 0.1
3.0 I
OL
=
4mA 0.36 0.44
4.5 I
OL
=
8mA 0.36 0.44
I
IN
Input Leakage
Current
0–5.5 V
IN
= 5.5V or GND ±0.1 ±1.0 µA
ICC Quiescent
Supply Current
5.5 VIN = VCC or GND 4.0 40.0 µA
Symbol Parameter VCC (V) Conditions
TA = 25°C
UnitsTyp. Limits
VOLP(3) Quiet Output Maximum
Dynamic VOL
5.0 CL = 50pF 0.3 0.8 V
VOLV(3) Quiet Output Minimum
Dynamic VOL
5.0 CL = 50pF –0.3 –0.8 V
VIHD(3) Minimum HIGH Level
Dynamic Input Voltage
5.0 CL = 50pF 3.5 V
VILD(3) Maximum LOW Level
Dynamic Input Voltage
5.0 CL = 50pF 1.5 V
74VHC157 Quad 2-Input Multiplexer
©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC157 Rev. 1.2 6
AC Electrical Characteristics
Note:
3. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load. Average operating current can be obtained by the equation:
ICC (opr.) = CPD • VCC • fIN + ICC
Symbol Parameter
VCC
(V) Conditions
TA = 25°C
TA = –40°C
to +85°C
UnitsMin. Typ. Max. Min. Max.
tPLH, tPHL Propagation Delay,
In to Zn
3.3 ± 0.3 CL = 15pF 6.2 9.7 1.0 11.5 ns
CL = 50pF 8.7 13.2 1.0 15.0
5.0 ± 0.5 CL = 15pF 4.1 6.4 1.0 7.5 ns
CL = 50pF 5.6 8.4 1.0 9.5
tPLH, tPHL Propagation Delay,
S to Zn
3.3 ± 0.3 CL = 15pF 8.4 13.2 1.0 15.5 ns
CL = 50pF 10.9 16.7 1.0 19.0
5.0 ± 0.5 CL = 15pF 5.3 8.1 1.0 9.5 ns
CL = 50pF 6.8 10.1 1.0 11.5
tPLH, tPHL Propagation Delay,
E to Zn
3.3 ± 0.3 CL = 15pF 8.7 13.6 1.0 16.0 ns
CL = 50pF 11.2 17.1 1.0 19.5
5.0 ± 0.5 CL = 15pF 5.6 8.6 1.0 10.0 ns
CL = 50pF 7.1 10.6 1.0 12.0
CIN Input Capacitance VCC = Open 4 10 10 pF
CPD Power Dissipation
Capacitance
(3) 20 pF
74VHC157 Quad 2-Input Multiplexer
©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC157 Rev. 1.2 7
Physical Dimensions
Dimensions are in millimeters unless otherwise noted.
Figure 1. 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M16A
74VHC157 Quad 2-Input Multiplexer
©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC157 Rev. 1.2 8
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 2. 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
74VHC157 Quad 2-Input Multiplexer
©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC157 Rev. 1.2 9
Physical Dimensions (Continued)
Dimensions are in millimeters unless otherwise noted.
Figure 3. 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC16
0.65
4.4±0.1
MTC16rev4
0.11
4.55
5.00
5.00±0.10
12°
7.354.45
1.45
5.90
74VHC157 Quad 2-Input Multiplexer
©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com
74VHC157 Rev. 1.2 10
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when properly used in accordance with instructions for use
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PRODUCT STATUS DEFINITIONS
Definition of Terms
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Advance Information Formative or In Design This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
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published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
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This datasheet contains final specifications. Fairchild Semiconductor
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Rev. I26