2004-2013 Microchip Technology Inc. DS21906C-page 1
MCP102/103/121/131
Features
• Ultra low supply current: 1.75 µA
(steady-state max.)
• Precis ion monitoring opti ons of:
- 1.90V, 2.32V, 2.63 V, 2.93V, 3.08V, 4.38V an d
4.63V
• Resets microcontroller in a power-loss event
•RST
pin (Active-lo w) :
-MCP121: Active-low, open-drain
-MCP131: Active-low, open-drain with interna l
pull-up res is tor
-MCP102 and MCP103: Active-low, push-pull
• Reset Delay Timer (120 ms delay, typ.)
• Available in SOT23-3, TO-92 and SC-70
packages
• Temperature Ra nge:
- Extended: -40°C to +125°C
(except MCP1XX-195)
- Industrial: -40°C to +85°C (MCP1XX-195 only)
• Pb-free devices
Applications
• Critical Microcontroller and Microprocessor
Power-moni tori ng Appl ic ati ons
• Computers
• Intelligent Instruments
• Portable Battery-powered Equipment
General Description
The MCP102/103/121/131 are voltage supervisor
devices designed to keep a microcontroller in reset
until the system voltage has reached and stabilized at
the proper level for reliable system operation. Table 1
shows the available features for these devices.
Package Types
Block Diagram
TABLE 1: DEVICE FEATURES
SOT23-3/SC-70
VSS
RST
MCP102/121/131
1
2
3
VDD
RST
TO-92
SOT23-3/SC-70
VDD
VSS
MCP103
1
2
3
RST
VDD VSS
VDD
Comparator
+
–Output
Driver RST
Band Gap
Reference
VSS
Reset
Delay
Circuit
R (1)
Note 1: MCP131 Only
Device Output Reset
Delay (typ) Package Pinout
(Pin # 1, 2, 3) Comment
Type Pull-up Resistor
MCP102 Push-pull No 120 ms RST, VDD, VSS
MCP103 Push-pull No 120 ms VSS, RST, VDD
MCP121 Open-drain External 120 ms RST, VDD, VSS
MCP131 Open-drain Internal (~95 k)120ms RST
, VDD, VSS
MCP111 Open-drain External No VOUT, VSS, VDD See MCP111/112 Data Sheet
(DS21889)
MCP112 Push-Pull No No VOUT, VSS, VDD See MCP111/112 Data Sheet
(DS21889)
Micr opower Voltage Supervisors
MCP102/103/121/131
DS21906C-page 2 2004-2013 Microchip Technology Inc.
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings†
VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0V
Input current (VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 m A
Output current (RST) . . . . . . . . . . . . . . . . . . . . . . . . . .10 m A
Rated Rise Time of VDD . . . . . . . . . . . . . . . . . . . . . . 100V/µs
All inputs and outputs (except RST) w.r.t. VSS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0 .6V to (VDD + 1.0V)
RST output w.r.t. VSS . . . . . . . . . . . . . . . . . . . -0 .6V to 1 3 .5V
Storage temperature . . . . . . . . . . . . . . . . . . -65°C to + 150°C
Ambient temp. with power applied . . . . . . . -40°C to + 125°C
Maximum Junction temp. with power applied . . . . . . . .150°C
ESD protection on all pins2kV
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied.
Exposure to m aximum rating conditions for extended periods
may affect device reliability.
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 k (MCP121 only),
TA = -40°C to +125°C.
Parameters Sym Min Typ Max Units Conditions
Operating Voltage Range VDD 1.0 — 5.5 V
Specified VDD Value to RST low VDD 1.0 — V IRST = 10 uA, VRST < 0.2V
Operating Current MCP 102,
MCP103, IDD — < 1 1.75 µA Reset Power-up Timer (tRPU) Inactive
MCP121 — — 20.0 µA Reset Power-up Timer (tRPU) Active
MCP131 IDD —< 11.75µAV
DD > VTRIP and Reset Power-up
T imer (tRPU) Inactive
——75µAV
DD < VTRIP and Reset Power-up
T imer (tRPU) Inactive (Note 3)
— — 90 µA Reset Power-up Timer (tRPU) Active
(Note 4)
Note 1: Trip point is ±1.5% from typical value.
2: Trip point is ±2.5% from typical value.
3: RST output is forced low. There is a current through the internal pull-up resistor.
4: This includes the current through the internal pull- up resistor and the reset power-up timer.
5: This specification allows this device to be used in PIC® microcontroller applications that require In-Circuit Serial Pro-
gramming™ (ICSP™) (see device-specific programming specifications for voltage requirements). This specification
DOES NOT allow a continuos high voltage to be present on the open-drain output pin (VOUT). The total time that the
VOUT pin can be above the maximum device operational voltage (5.5V) is 100s. Current into the VOUT pin should be
limited to 2 mA and it is recommended that the device operational temperature be maintained between 0°C to 70°C
(+25°C preferred). For additional information, please refer to Figure 2-33.
6: This parameter is established by characterization and not 100% tested.
2004-2013 Microchip Technology Inc. DS21906C-page 3
MCP102/103/121/131
VDD Trip Point MCP1XX-195 VTRIP 1.872 1.900 1.929 V TA = +25°C (Note 1)
1.853 1.900 1.948 V TA = -40°C to +85°C (Note 2)
MCP1XX-240 2.285 2.320 2.355 V TA = +25°C (Note 1)
2.262 2.320 2.378 V Note 2
MCP1XX-270 2.591 2.630 2.670 V TA = +25°C (Note 1)
2.564 2.630 2.696 V Note 2
MCP1XX-300 2.886 2.930 2.974 V TA = +25°C (Note 1)
2.857 2.930 3.003 V Note 2
MCP1XX-315 3.034 3.080 3.126 V TA = +25°C (Note 1)
3.003 3.080 3.157 V Note 2
MCP1XX-450 4.314 4.380 4.446 V TA = +25°C (Note 1)
4.271 4.380 4.490 V Note 2
MCP1XX-475 4.561 4.630 4.700 V TA = +25°C (Note 1)
4.514 4.630 4.746 V Note 2
VDD Trip Point Tempco TTPCO — ±100 — ppm/°C
Threshold
Hysteresis
min. = 1%,
max = 6%)
MCP1XX-195 VHYS 0.019 — 0.114 V TA = +25°C
MCP1XX-240 0.023 — 0.139 V
MCP1XX-270 0.026 — 0.158 V
MCP1XX-300 0.029 — 0.176 V
MCP1XX-315 0.031 — 0.185 V
MCP1XX-450 0.044 — 0.263 V
MCP1XX-475 0.046 — 0.278 V
RST Low-level Output Voltage VOL ——0.4VI
OL = 500 µ A, VDD = VTRIP(MIN)
RST High-level Output Voltage
(MCP102 and MCP103 only ) VOH VDD – 0.6 — — V IOH = 1 mA, For MCP102/MCP103
only (push-pull output)
Internal Pull-up Resistor
(MCP131 only) RPU —95—k V
DD = 5.5V
Open-drain High Voltage on Output
(MCP121 only) VODH — — 13.5
(5) VV
DD = 3.0V, Ti me volt age > 5.5V
applied 100s,
current into pin limited to 2 mA, 25°C
operation recommended
(Note 5, Note 6)
Open-drain Output Leakage Current
(MCP121 only) IOD —0.1—µA
DC CHARACTERISTICS (CONTINUE D)
Electrical Specifications: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 k (MCP121 only),
TA = -40°C to +125°C.
Parameters Sym Min Typ Max Units Conditions
Note 1: Trip point is ±1.5% from typical value.
2: Trip point is ±2.5% from typical value.
3: RST output is forced low. There is a current through the internal pull-up resistor.
4: This includes the current through the internal pull-up resistor and the reset power-up timer.
5: This specification allows this device to be used in PIC® microcontroller applications that require In-Circuit Serial Pro-
gramming™ (ICSP™) (see device-specific programming specifications for voltage requirements). This specification
DOES NOT allow a continuos high voltage to be present on the open-drain output pin (VOUT) . Th e to ta l ti m e th at the
VOUT pin can be above the maximum device operational voltage (5.5V) is 100s. Current into the VOUT pin should be
limited to 2 mA and it is recommended that the device operational temperature be maintained between 0°C to 70°C
(+25°C preferred). For additional information, please refer to Figure 2-33.
6: This parameter is established by characterization and not 100% tested.
MCP102/103/121/131
DS21906C-page 4 2004-2013 Microchip Technology Inc.
FIGURE 1-1: Timing Diagram.
AC CHARACTERISTICS
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 k (MCP121 only),
TA = -40°C to +125°C.
Parameters Sym Min Typ Max Units Conditions
VDD Detec t to R ST Inactive tRPU 80 120 180 ms Figure 1-1 and CL = 50 pF
VDD Detec t to R ST Active tRPD —130 — µsV
DD ramped from VTRIP(MAX) +
250 mV down to VTRIP(MIN) –
250 mV, per Figure 1-1,
CL = 50 pF (Note 1)
RST Rise Time After RST Active
(MCP102 and MCP103 only) tRT —5 —µsFor RST 10% to 90% of final value
per Figure 1-1, CL = 50 pF
(Note 1)
Note 1: These parameters are for design guidance only and are not 100% tested.
1V
1V
VTRIP
VDD
RST
tRPU
VOH
tRT
tRPD
VOL
Electrical Specifications: Unless otherwise noted, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 k (MCP121 only),
TA = -40°C to +125°C.
Parameters Sym Min Typ Max Units Conditions
Temperature Ranges
Specified Temperature Range TA-40 — +85 ºC MCP1XX-195
Specified Temperature Range TA-40 — +125 ºC Except MCP1XX-195
Maximum Junction Temperature TJ— — +150 ºC
Storage Temperature Range TA-65 — +150 ºC
Package Thermal Resistances
Thermal Resistance, 3L-SOT23 JA — 336 — ºC/W
Thermal Resistance, 3L-SC-70 JA — 340 — ºC/W
Thermal Resistance, 3L-TO-92 JA — 131.9 — ºC/W
2004-2013 Microchip Technology Inc. DS21906C-page 5
MCP102/103/121/131
2.0 TYPICAL PE RFORMANCE CURVES
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 k (MCP121 only;
see Figure 4-1), TA = -40°C to +125°C.
FIGURE 2-1: IDD vs. Temperature
(Reset Power-up Timer Inactive) (MCP102-195).
FIGURE 2-2: IDD vs. Temperature
(Reset Power-up Timer Inactive) (MCP131-315).
FIGURE 2-3: IDD vs. Temperature
(Reset Power-up Timer Inactive) (MCP121-450).
FIGURE 2-4: IDD vs. Temperature
(Reset Power-up Timer Active) (MCP102-195).
FIGURE 2-5: IDD vs. Temperature
(Reset Power-up Timer Active) (MCP131-315).
FIGURE 2-6: IDD vs. Temperature
(Reset Power-up Timer Active) (MCP121-450).
Note: The g r ap hs and t ables provided following thi s n ote are a statistic al s umm ar y b as ed on a limited num ber of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
-40
-20
0
20
40
60
80
100
120
140
Temperature (°C)
IDD (uA)
1.7V
1.0V
2.1V
2.8V
4.0V
5.0V
5.5V
MCP102-195
0
5
10
15
20
25
30
35
-40
-20
0
20
40
60
80
100
120
140
Temperature (°C)
IDD (uA)
1.0V
2.9V
MCP131-315
3.3V, 4.0V, 5.0V, 5.5V
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
-40
-20
0
20
40
60
80
100
120
140
Temperature (°C)
IDD (uA)
3.0V
1.0V
4.6V
4.1V
5.0V
5.5V
MCP121-450
4.8V
0
2
4
6
8
10
12
14
16
-40
-20
0
20
40
60
80
100
120
140
Temperature (°C)
IDD (uA)
2.1V
2.8V
4.0V
5.0V
5.5V
MCP102-195
0
10
20
30
40
50
60
70
80
-40
-20
0
20
40
60
80
100
120
140
Temperature (°C)
IDD (uA)
3.3V
4.0V
4.5V
5.0V
MCP131-315
5.5V
0
2
4
6
8
10
12
14
16
-40
-20
0
20
40
60
80
100
120
140
Temperature (°C)
IDD (uA)
4.6V
5.0V
5.5V
MCP121-450
4.8V
MCP102/103/121/131
DS21906C-page 6 2004-2013 Microchip Technology Inc.
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 k (MCP121 only;
see Figure 4-1), TA = -40°C to +125°C.
FIGURE 2-7: IDD vs. VDD
(Reset Power-up Timer Inactive) (MCP102-195).
FIGURE 2-8: IDD vs. VDD
(Reset Power-up Timer Inactive) (MCP131-315).
FIGURE 2-9: IDD vs. VDD
(Reset Power-up Timer Inactive) (MCP121-450).
FIGURE 2-10: IDD vs.VDD
(Reset Power-up Timer Active) (MCP102-195).
FIGURE 2-11: IDD vs.VDD
(Reset Power-up Timer Active) (MCP131-315).
FIGURE 2-12: IDD vs.VDD
(Reset Power-up Timer Active) (MCP121-450).
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
1.0 2.0 3.0 4.0 5.0 6.0
VDD (V)
IDD (uA)
-40°C
+25°C
+85°C
+125°C
MCP102-195
0°C
-5
0
5
10
15
20
25
30
35
1.0 2.0 3.0 4.0 5.0 6.0
VDD (V)
IDD (uA)
MCP131-315 -40°C
+85°C
+125°C
0°C, +25°C
+70°
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0 2.0 3.0 4.0 5.0 6.0
VDD (V)
IDD (uA)
MCP121-450
-40°C
+25°C
+85°C
+125°C
0°C
+70°C
0
2
4
6
8
10
12
14
16
1.0 2.0 3.0 4.0 5.0 6.0
VDD (V)
IDD (uA )
0°C
+25°C
+70°C
+85°C
+125°C
-40°C
MCP102-195
Device in Reset
tRPU inactive
Device in Reset
tRPU inactive
0
10
20
30
40
50
60
70
80
1.0 2.0 3.0 4.0 5.0 6.0
VDD (V)
IDD (uA)
MCP131-315 -40°C, 0°C +25°C
+85°C
+125°C
+70°C
Device in Reset
tRPU inactive
-2
0
2
4
6
8
10
12
14
16
1.0 2.0 3.0 4.0 5.0 6.0
VDD (V)
IDD (uA)
MCP121-450 -40°C
+25°C
+85°C
+125°C
0°C
+70°C
Device in Reset
tRPU inactive
2004-2013 Microchip Technology Inc. DS21906C-page 7
MCP102/103/121/131
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 k (MCP121;
see Figure 4-1), TA = -40°C to +125°C.
FIGURE 2-13: VTRIP vs. Temperature vs.
Hysteresis (MCP102-195).
FIGURE 2-14: VTRIP vs. Temperature vs.
Hysteresis (MCP131-315).
FIGURE 2-15: VTRIP vs. Temperature vs.
Hysteresis (MCP121-450).
FIGURE 2-16: VOL vs. IOL
(MCP102-195 @ VDD = 1.7V).
FIGURE 2-17: VOL vs. IOL
(MCP131-315 @ VDD = 2.9V).
FIGURE 2-18: VOL vs. IOL
(MCP121-450 @ VDD = 4.1V).
1.895
1.900
1.905
1.910
1.915
1.920
1.925
1.930
1.935
1.940
1.945
-60 -10 40 90 140
Temperature (°C)
VTRIP (V)
0.000
0.005
0.010
0.015
0.020
0.025
0.030
0.035
0.040
0.045
0.050
Hyst (V)
VTRIP, decreasing VDD
VHYS, Hysteresis
MCP102-195
VTRIP, increasing VDD
3.060
3.080
3.100
3.120
3.140
3.160
3.180
3.200
-60 -10 40 90 140
Temperature (°C)
VTRIP (V)
0.090
0.092
0.094
0.096
0.098
0.100
0.102
0.104
0.106
0.108
Hyst (V)
MCP131-315
VTRIP, decreasing VDD
VTRIP, increasing V
DD
VHYS, Hysteresis
4.300
4.350
4.400
4.450
4.500
4.550
-60 -20 20 60 100 140
Temperature (°C)
VTRIP (V)
0.100
0.110
0.120
0.130
0.140
0.150
0.160
0.170
0.180
0.190
Hyst (V)
MCP121-450
VTRIP, decreasing VDD
VTRIP, increasing VDD
VHYS, Hysteresis
-0.020
0.000
0.020
0.040
0.060
0.080
0.100
0.120
0.00 0.25 0.50 0.75 1.00
IOL (mA)
VOL (V)
-40°C0°C
+85°C
+125°C
MCP102-195
VDD = 1.7V +70°C
+25°C
0.000
0.010
0.020
0.030
0.040
0.050
0.060
0.070
0.00 0.25 0.50 0.75 1.00
IOL (mA)
VOL (V)
MCP131-315
VDD = 2.9V
-40°C
+25°C
+85°C
+125°C
+70°C
0°C
0.000
0.010
0.020
0.030
0.040
0.050
0.060
0.00 0.25 0.50 0.75 1.00
IOL (mA)
VOL (V)
MCP121-450
VDD = 4.1V
-40°C
+25°C
+85°C
+125°C
+70°C
0°C
MCP102/103/121/131
DS21906C-page 8 2004-2013 Microchip Technology Inc.
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 k (MCP121 only;
see Figure 4-1), TA = -40°C to +125°C.
FIGURE 2-19: VOL vs. Temperature
(MCP102-195 @ VDD = 1.7V).
FIGURE 2-20: VOL vs. Temperature
(MCP131-315 @ VDD = 2.9V).
FIGURE 2-21: VOL vs. Temperature
(MCP121-450 @ VDD = 4.1V).
FIGURE 2-22: VOH vs. IOL
(MCP102-195 @ VDD = 2.1V).
0.000
0.020
0.040
0.060
0.080
0.100
0.120
0.140
-40 0 40 80 120
Temperature (°C)
VOL (V)
IOL = 0.00 mA
MCP102-195
VDD = 1.7 V
IOL = 0.25 mA
IOL = 0.50 mA
IOL = 0.75 mA
IOL = 1.00 mA
0.000
0.010
0.020
0.030
0.040
0.050
0.060
0.070
-40 0 40 80 120
Temperature (°C)
VOL (V)
MCP131-315
VDD = 2.9V
IOL = 0.00 mA
IOL = 0.25 mA
IOL = 0.50 mA
IOL = 0.75 mA
IOL = 1.00 mA
0.000
0.010
0.020
0.030
0.040
0.050
0.060
-40 0 40 80 120
Temperature (°C)
VOL (V)
IOL = 0.00 mA
IOL = 0.25 mA
IOL = 0.50 mA
IOL = 0.75 mA
IOL = 1.00 mA
MCP121-450
VDD = 4.1V
1.950
1.970
1.990
2.010
2.030
2.050
2.070
2.090
2.110
0.00 0.25 0.50 0.75 1.00
IOL (mA)
VOH (V)
MCP102-195
VDD = 2.1V
-40°C
+25°C
+85°C
+125°C
+70°C
0°C
2004-2013 Microchip Technology Inc. DS21906C-page 9
MCP102/103/121/131
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 k (MCP121 only;
see Figure 4-1), TA = -40°C to +125°C.
FIGURE 2-23: tRPD vs. Temperature
(MCP102-195).
FIGURE 2-24: tRPD vs. Temperature
(MCP131-315).
FIGURE 2-25: tRPD vs. Temperature
(MCP121-450).
FIGURE 2-26: tRPU vs. Temperature
(MCP102-195).
FIGURE 2-27: tRPU vs. Temperature
(MCP131-315).
FIGURE 2-28: tRPU vs. Temperature
(MCP121-450).
0
50
100
150
200
250
300
-40 -15 10 35 60 85 110
Temperatu re (°C)
tRPD (µs)
VDD decreasing from:
VTRIP(max) + 0.25V to VTRIP(min) - 0.25V
VDD decreasing
from: 5V - 1.7V
VDD decreasing
from: 5V - 0V
MCP102-195
0
50
100
150
200
250
-40 -15 10 35 60 85 110
Temperature (°C)
tRPD (µ s )
VDD decreasing from:
VTRIP(max) + 0.25V to VTRIP(min) - 0.25V
VDD decreasing from:
5V - 2.7V
VDD decreasing from:
5V - 0V
MCP131-315
35
35.5
36
36.5
37
37.5
38
-40 -15 10 35 60 85 110
Temperature (°C)
tRT (µs)
VDD increasing from:
0V - 5.0V VDD increasing from:
0V - 5.5V
VDD increasing from:
0V - 4.6V VDD increasing from:
0V - 4.8V
MCP121-450
100
110
120
130
140
150
160
-40 -15 10 35 60 85 110
Temperature (°C)
tRPU (µs )
VDD increasing from:
0V - 2.1V
VDD increasing
from: 0V - 5.5V
VDD increasing from:
0V - 2.8V
VDD increasing
from: 0V - 4.0V
MCP102-195
100
110
120
130
140
150
160
-40 -15 10 35 60 85 110
Temperature (°C)
tRPU (µs)
VDD increasing from:
0V - 4.5V
VDD increasing from:
0V - 5.5V
VDD increasing from:
0V - 3.3V
VDD increasing from:
0V - 4.0V
MCP131-315
110
115
120
125
130
135
140
145
-40 -15 10 35 60 85 110
Temperature (°C)
tRPU (µs)
VDD increasing from:
0V - 4.8V
VDD increasing from:
0V - 5.0V
VDD increasing from:
0V - 5.5V
MCP121-450
MCP102/103/121/131
DS21906C-page 10 2004-2013 Microchip Technology Inc.
Note: Unless otherwise indicated, all limits are specified for: VDD = 1V to 5.5V, RPU = 100 k (MCP121 only;
see Figure 4-1), TA = -40°C to +125°C.
FIGURE 2-29: tRT vs. Temperature
(MCP102-195).
FIGURE 2-30: tRT vs. Temperature
(MCP131-315).
FIGURE 2-31: tRT vs. Temperature
(MCP121-450).
FIGURE 2-32: Transient Duration vs.
VTRIP (min) - VDD.
FIGURE 2-33: Open-Drain Leakage
Current vs. Voltage Applied to VOUT Pin
(MCP121-195).
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
-40 -15 10 35 60 85 110
Temperature (°C)
tRT (µs)
VDD increasing from:
0V - 2.1V
VDD increasing from:
0V - 5.5V
VDD increasing from:
0V - 2.8V
VDD increasing from:
0V - 4.0V
MCP102-195
VDD increasing from:
0V - 5.0V
25
27
29
31
33
35
37
39
41
43
45
-40 -15 10 35 60 85 110
Temperature (°C)
tRT (µs)
VDD increasing from:
0V - 5.0V
VDD increasing from:
0V - 4.0V
VDD increasing from:
0V - 5.5V
VDD increasing from:
0V - 3.3V
VDD increasing from:
0V - 4.5V
MCP131-315
35
35.5
36
36.5
37
37.5
38
-40 -15 10 35 60 85 110
Temperature (°C)
tRT (µs)
VDD increasing from:
0V - 5.0V VDD increasing from:
0V - 5.5V
VDD increasing from:
0V - 4.6V VDD increasing from:
0V - 4.8V
MCP121-450
0
200
400
600
800
1000
1200
1400
0.001 0.01 0.1 1 10
VTRIP(Min) - VDD
Transient Duration (µS)
MCP121-450
MCP102-195
MCP131-315
1.00E-13
1.00E-12
1.00E-11
1.00E-10
1.00E-09
1.00E-08
1.00E-07
1.00E-06
1.00E-05
1.00E-04
1.00E-03
1.00E-02
01234567891011121314
Pull-Up Voltage (V)
Open-Drain Leakage (A)
+125°C
+25°C - 40°C
10m
100µ
1m
10µ
1µ
10n
100n
1n
100p
1p
10p
100f
2004-2013 Microchip Technology Inc. DS21906C-page 11
MCP102/103/121/131
3.0 PIN DESCRIPTION
The descriptions of the pins are li sted in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
Pin No.
Symbol Function
MCP102
MCP121
MCP131 MCP103
11RST
Output S tate
VDD Falling:
H = VDD > VTRIP
L = VDD < VTRIP
VDD Rising:
H = VDD > VTRIP + VHYS
L = VDD < VTRIP + VHYS
23V
DD Positive power supply
32V
SS Ground refe renc e
MCP102/103/121/131
DS21906C-page 12 2004-2013 Microchip Technology Inc.
4.0 APPLICATION INFORMATION
For many of today’s microcontroller applications, care
must be taken to pre vent low-pow er conditions tha t can
cause many different system problems. The most
common causes are brown-out conditions, where the
system supply drop s belo w the operatin g level mome n-
tarily. The second most common cause is when a
slowly decaying power supply causes the
microcontroller to begin executing instructions without
sufficient voltage to sustain volitile memory (RAM), thus
producing indeterminate results. Figure 4-1 shows a
typical application circuit.
The MCP102/103/121/131 are voltage supervisor
devices designed to keep a microcontroller in reset
until the system voltage has reached and stabilized at
the proper level for reliable system operation. These
devices also operate as protection from brown-out
conditions.
FIGURE 4-1: Typic al App li ca tio n Circui t.
4.1 RST Operation
The RST output pin operation determines how the
device can be used and indicates when the system
should be forced into reset. To accomplish this, an
internal volt age re fere nce is us ed to s et the v olt age tri p
point (VTRIP). Additionally, there is a hysteresis on this
trip point.
When the falling edge of VDD crosses this voltage
threshold, the reset power-down timer (TRPD) starts.
When this delay timer times out, the RST pin is f orc ed
low.
When the rising-edge of VDD crosses this voltage
threshold, the reset power-up timer (TRPU) starts.
When this delay timer times out, the RST pin is f orc ed
high, TRPU is active and there is additional system
current.
The actual voltage trip point (VTRIPAC) will be be twe en
the minimum trip point (VTRIPMIN) and the maximum
trip point (VTRIPMAX). The hysteresis on this trip point
and the delay timer (TRPU) are to remove any “jitter”
that would occur on the RST pi n w h en th e de vi c e VDD
is at the trip point.
Figu re 4-2 shows t he wavef orm of the RST pin as deter-
mined by the VDD voltage, while Table 4-1 shows the
state of the RST pin. The VTRIP specification is for falling
VDD voltages. When the VDD voltage is risi ng, the RS T
will not be driven high until VDD is at VTRIP + VHYS. Once
VDD has crossed the voltage trip point, there is also a
minimal delay time (TRPD) before the R S T pin is driven
low.
TABLE 4-1: RST PIN STATES
FIGURE 4-2: RST Operation as Determined by the VTRIP and VHYS.
VDD
VDD
MCLR
(Reset input)
(Active-low)
VSS
PIC®
Microcontroller
RPU
Note 1: Resistor RPU may be required with the
MCP121 due to the open-drain output.
Resistor RPU may not be required with
the MCP131 due to the internal pull-up
resistor. The MCP102 and MCP103 do
not require the external pull-up resistor.
0.1
µF MCP1XX
VDD
RST
VSS
State of RST Pin when:
Device VDD < VTRIP V
DD >
VTRIP + V HYS
Ouput Driver
MCP102 LHPush-pull
MCP103 LHPush-pull
MCP121 LH
(1) Open-drain
(1)
MCP131 LH
(2) Open-drain
(2)
Note 1: Requires External Pull-up resistor
2: Has Internal Pull -up res is tor
VDD VTRIPMAX
VTRIPMIN VTRIPAC
VTRIPAC
VTRIPAC + VHYSAC
RST
1V
< 1V is ou tside the
device spec ifications
tRPD
tRPU
tRPD tRPU
2004-2013 Microchip Technology Inc. DS21906C-page 13
MCP102/103/121/131
4.2 Negative Going VDD Transients
The minimum pulse width (time) required to cause a
reset may be an important criteria in the implementa-
tion of a Power-on Reset (POR) circuit. This time is
referred to as trans ient duration, de fined as the amount
of time needed for these supervisory devices to
respond to a drop in VDD. The tran sient du ration tim e is
dependa nt on the magnitude of VTRIP – VDD. Generall y
speaking, the transient duration decreases with
increases in VTRIP – VDD.
Figure 4-3 shows a typical transient duration vs. reset
comparator overdrive, for which the
MCP102/10 3/121/131 w ill not genera te a reset pul se. It
shows that the farther below the trip point the transient
pulse g oes , the dura t io n of the p uls e re qui red to c aus e
a reset gets shorter. Figure 2-32 shows the transient
respons e characte ristics f or the MCP102/1 03/121/13 1.
A 0.1 µF bypass capacitor, mounted as close as
possible to the VDD pin, provides additional transient
immunity (refer to Figu re 4-1).
FIGURE 4-3: Example of Typical
Transient Duration Waveform.
4.3 Reset Power-up Timer (tRPU)
Figure 4-4 illustrates the device current states. While
the system is powering down, the device has a low
current. This current is dependent on the device VDD
and trip point. When the device VDD rises thr ough the
voltage trip point (VTRIP), an internal timer starts . This
timer consumes additional current until the RST pin is
driven (or released) high. This time is known as the
Reset Power-up Time (tRPU). Figure 4-4 shows when
tRPU is active (device consuming additional current).
FIGURE 4-4: Reset Power-up Timer
Waveform.
4.3. 1 EFFECT OF TEMPERATURE ON
RESET POWER-UP TIMER (TRPU)
The Reset Power-up timer time-out period (tRPU)
determines how long the device remains in the reset
condition. This is affected by both VDD and temperature.
Typical responses for different VDD values and
temperatures are shown in Figures 2-26, 2-27 and 2-28.
Time (µs)
0V
Supply Vo ltage
5V
VTRIP(MIN) - VDD
tTRANS
VTRIP(MAX)
VTRIP(MIN)
VTRIP
VDD
RST tRPU
Reset Power-up
Timer Inactive
Reset
Power-up
Timer
Inactive
Reset Power-up
Timer Active
See Figures 2-1,
2-2 and 2-3
See Figures 2-4,
2-5 and 2-6
See Figures 2-1,
2-2 and 2-3
MCP102/103/121/131
DS21906C-page 14 2004-2013 Microchip Technology Inc.
4.4 Using in PIC® Microcontroller,
ICSP™ Applications (MCP121
only)
Figure 4-5 shows the typical appl ication circuit for using
the MCP121 for voltage superviory function when the
PIC microcontroller will be programmed via the ICSP
feature. Additional information is available in TB087,
“Using Voltage Supervisors with PIC® Microcontroller
Systems which Implement In-Circuit Serial Program-
ming™”, DS91087.
FIGURE 4-5: Typic al App li ca tio n Circui t
for PIC® Microcontroller with the ICSP™ feature.
Note: It is recommend ed that th e current into the
RST pin be current limited by a 1 k
resistor.
VDD/VPP
VDD
MCLR
(Reset Input)
(Active-low)
VSS
PIC®
MCU
RPU
0.1µF
1k
MCP121
VDD
RST
VSS
2004-2013 Microchip Technology Inc. DS21906C-page 15
MCP102/103/121/131
5.0 PACKAGING INFORMATION
5.1 Package Marking Information
3-Lead TO-92
XXXXXX
XXXXXX
XXXXXX
YWWNNN
Example:
MCP102
195I
TO^^
547256
Legend: XX...X Customer-specific in formation
Y Year code (last digit of calendar year)
WW Week code (wee k of January 1 is week ‘01’)
NNN Alphanu me ric trac eability code
Pb-free JEDEC designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the even t the full Mic rochip part nu mb er cann ot be marked o n one lin e, it wil l
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
3
e
3
e
3
e
3-Pin SOT-23
Part Number MCP1xx =
MCP102 MCP103 MCP121 MCP131
MCP1xxT-195I/TT JGNN TGNN LGNN KGNN
MCP1xxT-240ETT JHNN THNN LHNN KHNN
MCP1xxT-270E/TT JJNN TJNN LJNN KJNN
MCP1xxT-300E/TT JKNN TKNN LKNN KKNN
MCP1xxT-315E/TT JLNN TLNN LLNN KLNN
MCP1xxT-450E/TT JMNN TMNN LMNN KMNN
MCP1xxT-475E/TT JPNN TPNN LPNN KPNN
Example:
XXNN
MCP102/103/121/131
DS21906C-page 16 2004-2013 Microchip Technology Inc.
Package Marking Information (Continued)
Part Number MCP1xx =
MCP102 MCP103 MCP121 MCP131
MCP1xxT-195I/LB BGN FGN DGN CGN
MCP1xxT-240E/LB BHN FHN DHN CHN
MCP1xxT-270E/LB BJN FJN DJN CJN
MCP1xxT-300E/LB BKN FKN DKN CKN
MCP1xxT-315E/LB BLN FLN DLN CLN
MCP1xxT-450E/LB BMN FMN DMN CMN
MCP1xxT-475E/LB BPN FPN DPN CPN
3-Pin SC-70
Top Side
Example:
Bottom Side
XXN YWW
Part Number MCP1xx =
MCP102 MCP103 MCP121 MCP131
MCP1xxT-195I/LB BGNN FGNN DGNN CGNN
MCP1xxT-240E/LB BHNN FHNN DHNN CHNN
MCP1xxT-270E/LB BJNN FJNN DJNN CJNN
MCP1xxT-300E/LB BKNN FKNN DKNN CKNN
MCP1xxT-315E/LB BLNN FLNN DLNN CLNN
MCP1xxT-450E/LB BMNN FMNN DMNN CMNN
MCP1xxT-475E/LB BPNN FPNN DPNN CPNN
Top Side
Example:
XXNN
OR
2004-2013 Microchip Technology Inc. DS21906C-page 17
MCP102/103/121/131
3-Lead Plastic Small Outl ine Transistor (TT) (SOT-23)
10501050
Mold Draft Angle Bottom 10501050
Mold Draft Angle Top 0.510.440.37.020.017.015BLead Width 0.180.140.09.007.006.004
c
Lead Thickness 10501050
Foot A ngle 0.550.450.35.022.018.014LFoot Length 3.042.922.80.120.115.110DOverall Length 1.401.301.20.055.051.047E1Molded Package Width 2.642.372.10.104.093.083EOverall Width 0.100.060.01.004.002.000A1Standoff § 1.020.950.88.040.037.035A2Molded Package Thickness 1.121.010.89.044.040.035AOverall Height 1.92.076
p1
Outside lead pitch (basic) 0.96
.038
p
Pitch 33
n
Number of Pins MAXNOMMINMAXNOMMINDimension Limits MILLIMETERSINCHES*Units
2
1
p
D
B
n
E
E1
L
c
A2
A
A1
p1
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: TO-236
Drawing No. C04-104
§ Significa nt Char acte risti c
Note: For th e mo s t c urr e nt pac kag e d r awi n gs , plea se se e th e M ic roc hi p Pa c ka gi n g Spec i fic at i on lo c ate d
at http://www.microchip.com/packaging
MCP102/103/121/131
DS21906C-page 18 2004-2013 Microchip Technology Inc.
3-Lead Plastic Small Outl ine Transistor (LB) (SC-70)
Note: For th e mo s t c urr e nt pac kag e d r awi n gs , plea se se e th e M ic roc hi p Pa c ka gi n g Spec i fic at i on lo c ate d
at http://www.microchip.com/packaging
2004-2013 Microchip Technology Inc. DS21906C-page 19
MCP102/103/121/131
3-Lead Plastic Transistor Outline (TO) (TO-92)
432432
Mold Draft Angle Bottom 654654
0.560.480.41.022.019.016BLead Width 0.510.430.36.020.017.014
c
Lead Thickness
2.412.292.16.095.090.085RMolded Package Radius 4.954.644.32.195.183.170DOverall Length 4.954.714.45.195.186.175E1Overall Width 3.943.623.30.155.143.130ABottom to Package Flat 1.27.050
p
Pitch 33
n
Number of Pins MAXNOMMINMAXNOMMINDimension Limi ts MILLIMETERSINCHES*Units
R
n
1
3
p
L
B
A
c
1
D
2
E1
Tip to Seating Plane L .500 .555 .610 12.70 14.10 15.49
*Controlling Parameter
Mold Draft Angle Top
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: TO-92
Drawing No. C04-101
Note: For th e mo s t c urr e nt pac kag e d r awi n gs , plea se se e th e M ic roc hi p Pa c ka gi n g Spec i fic at i on lo c ate d
at http://www.microchip.com/packaging
MCP102/103/121/131
DS21906C-page 20 2004-2013 Microchip Technology Inc.
5.2 Product Tape and Reel Specifications
FIGURE 5-1: EMBOSSED CARRIER DIMENSIO NS (8, 12, 16 AND 24 MM TAPE ONLY)
FIGURE 5-2: 3-LEAD SOT-23/SC70 DEVICE TAPE AND REEL SPECIFICATIONS
Top
Cover
Tape
K0
P
W
B0
A0
TABLE 1: CARRIER TAPE/CAVITY DIMENSIONS
Case
Outline Package
Type
Carrier
Dimensions Cavity
Dimensions Output
Quantity
Units
Reel
Diameter in
mm
W
mm P
mm A0
mm B0
mm K0
mm
TT SOT-23 3L 8 4 3.15 2.77 1.22 3000 180
LB SC-70 3L 8 4 2.4 2.4 1.19 3000 180
Standard Reel Component Orientation
Device
Marking
PIN 1
User Direction of Feed
W
P
2004-2013 Microchip Technology Inc. DS21906C-page 21
MCP102/103/121/131
FIGURE 5-3: TO-92 DEV ICE TAPE AND REEL SPECIFICATIONS
Device
Marking
P
Seal
Tape
Back
Tape
MARK
FACE
User Direction of Feed
W
MARK
FACE
MARK
FACE
Note: Bent leads are for Tape and Reel only.
MCP102/103/121/131
DS21906C-page 22 2004-2013 Microchip Technology Inc.
NOTES:
2004-2013 Microchip Technology Inc. DS21906C-page 23
MCP102/103/121/131
APPENDIX A: REVISION HISTORY
Revision C (January 2013)
• Added a note to each package outline drawing.
Revision B (March 2005)
The following is the list of modifications:
1. Added Section 4.4 “Using in PIC® Microcon-
troller, ICSP™ Applications (MCP121 only)”
on using the MCP121 in PIC microcontroller
ICSP applicati on s.
2. Added VODH specifications in Section 1.0
“Electrical Characteristics” (for ICSP
applications).
3. Added Figure 2-33.
4. Updated SC-70 package markings and added
Pb-free marking information to Section 5.0
“Packaging information”.
5. Added Appendix A: “Revision History”.
Revision A (August 2004)
• Original Rel ease of this Document.
MCP102/103/121/131
DS21906C-page 24 l 2004-2013 Microchip Technology Inc.
NOTES:
2004-2013 Microchip Technology Inc. DS21906C-page 25
MCP102/103/121/131
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Device: MCP102: MicroPower Voltage Supervisor, push-pull
MCP102T: MicroPower Voltage Supervisor, push-pull
(Tape and Ree l)
MCP103: MicroPower Voltage Supervisor, push-pull
MCP103T: MicroPower Voltage Supervisor, push-pull
(Tape and Ree l)
MCP121 MicroPower Voltage Supervisor, open-drain
MCP121T: MicroPower Voltage Supervisor, open-drain
(Tape and Ree l)
MCP131 MicroPower Voltage Supervisor, open-drain
MCP131T: MicroPower Voltage Supervisor, open-drain
(Tape and Ree l)
Monitor i ng Optio ns: 195 = 1.90V
240 = 2.32V
270 = 2.63V
300 = 2.93V
315 = 3.08V
450 = 4.38V
475 = 4.63V
Temperature Range: I = -40°C to +85°C (MCP11X-195 only)
E = -40°C to +125°C (Except MCP11X-195 only)
Package: TT = SOT-23B, 3-lead
LB = SC-70, 3-lead
TO = TO-92, 3-lead
PART NO. XXX X
Temperature
Monitoring
Options
Device
Examples:
a) MCP102T-195I/TT: Tape and Reel,
1.95V MicroPower
Voltage Supervis or,
push-pull, -40°C to +85°C,
SOT-23B-3 package.
b) MCP102-300E/TO: 3.00V MicroPower
Voltage Supervis or,
push-pull,
-40°C to +125 °C,
T O-92-3 package.
a) MCP103T-270E/TT: Tape and Reel,
2.70V MicroPower
Voltage Supervi sor,
push-pull,
-40°C to +125 °C,
SOT-23B-3 package.
b) MCP103T-475E/LB:Tape and Reel,
4.75V MicroPower
Voltage Supervi sor,
push-pull,
-40°C to +125 °C,
SC- 70-3 pac kage.
a) MCP121T-315I/LB: Tape and Reel,
3.15V MicroPower
Voltage Supervi sor,
open-drain,
-40°C to +125 °C,
SC- 70-3 pac kage.
b) MCP121-300E/TO: 3.00V MicroPower
Voltage Supervis or,
open-drain,
-40°C to +125 °C,
T O-92-3 package.
a) MCP131T-195I/TT: Tape and Reel,
1.95V MicroPower
Voltage Supervis or,
open-drain,
-40°C to +85° C ,
SOT-23B-3 package.
b) MCP131-300E/TO: 3.00V MicroPower
Voltage Supervis or,
open-drain,
-40°C to +125 °C,
T O-92-3 package.
Range
XX
Package
X
Tape/Reel
Option
–/
MCP102/103/121/131
DS21906C-page 26 2004-2013 Microchip Technology Inc.
NOTES:
2004-2012 Microchip Technology Inc. DS21906C-page 27
Information contained in this publication regarding device
applications a nd the lik e is provided only f or yo ur convenience
and may be supers ed ed by u pda t es . It is y our responsibil it y to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip T echnology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM ,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONIT OR, FanSense, HI-TIDE, In-Circ u it Se r i a l
Programm ing, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip T echnology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. & KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2004-2012, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620769157
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of it s kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is c onstantly evolving. We a t Microc hip are co m mitted to continuously improving the code prot ect ion featur es of our
products. Attempts to break Microchip’ s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and d sPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperiph erals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT S
YSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
DS21906C-page 28 2004-2013 Microchip Technology Inc.
AMERICAS
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Worldwide Sales and Service
11/29/12