MCP79400-I/SN - Microchip Technology, Inc.

 2011 Microchip Technology Inc. DS25009B-page 1

MCP79400/MCP79401/MCP79402

Device Selection Table

Features:

• Real-Time Clock/Calendar (RTCC), Battery

Backed:

- Hours, Minutes, Seconds, Day of Week, Day,

Month and Year

- Dual alarm with single output

• On-Chip Digital Trimming/Calibration:

- Range -127 to +127 ppm

- Resolution 1 ppm

• Programmable Open-Drain Output Control:

- CLKOUT with 4 selectable frequencies

- Alarm output

• 64 Bytes SRAM, Battery Backed

• 64-Bit Unique ID:

- User or factory programmable

- Protected EEPROM

-EUI-48

™ or EUI-64™ MAC address

- Custom ID programming

• Automatic VCC Switchover to VBAT Backup

Supply

• Power-Fail Time-Stamp for Battery Switchover

• Low-Power CMOS Technology:

- Dynamic Current: 400 A max read

- Dynamic Current: 400



A max SRAM

- Battery Backup Current: <700nA @ 1.8V

• 100 kHz and 400 kHz Compatibility

• ESD Protection >4,000V

• 1 Million Erase/Write Cycles for Unique ID

• Packages include 8-Lead SOIC, TSSOP, 2x3

TDFN, MSOP

• Pb-Free and RoHS Compliant

• Temperature Ranges:

- Industrial (I): -40°C to +85°C

Description:

The MCP7940X series of low-power Real-Time Clocks

(RTC) uses digital timing compensation for an accurate

clock/calendar, a programmable output control for

versatility, a power sense circuit that automatically

switches to the backup supply, and nonvolatile memory

for data storage. Using a low-cost 32.768 kHz crystal,

it tracks time using several internal registers. For

communication, the MCP7940X uses the I2C™ bus.

The clock/calendar automatically adjusts for months

with fewer than 31 days, including corrections for

leap years. The clock operates in either the 24-hour

or 12-hour format with an AM/PM indicator and

settable alarm(s) to the second, minute, hour, day of

the week, date or month. Using the programmable

CLKOUT, frequencies of 32.768, 8.192 and 4.096

kHz and 1 Hz can be generated from the external

crystal.

Along with the battery-backed SRAM memory, a 64-bit

protected EEPROM space is available for a unique ID

or MAC address to be programmed at the factory or by

the end user.

The device is fully accessible through the serial

interface while VCC is between 1.8V and 5.5V, but can

operate down to 1.3V for timekeeping and SRAM

retention only.

The RTC series of devices are available in the standard

8-lead SOIC, TSSOP, MSOP and 2x3 TDFN packages.

Package Types

Part Number SRAM

(Bytes) Unique ID

MCP79400 64 Blank

MCP79401 64 EUI-48™

MCP79402 64 EUI-64™

VBAT

VSS

VCC

MFP

SCL

SDA

MSOP

SOIC, TSSOP

VBAT

VSS

VCC

MFP

SCL

SDA

TDFN

VBAT

VSS

MFP

SCL

SDA

VCC

I2C™ Real-Time Clock/Calendar with SRAM, Unique ID

and Battery Switchover

MCP7940X

DS25009B-page 2  2011 Microchip Technology Inc.

FIGURE 1-1: TYPICAL OPERATING

CIRCUIT

FIGURE 1-2: SCHEMATIC

VBAT

VSS

VCC

MFP

SCL

SDA

RTCC

SRAM

Time-Stamp/

Alarms

I2C™

Oscillator

VBAT Switch

MCP7941X

VBAT

VSS

VCC

MFP

SCL

SDA

SYSTEM VCC

Note 1

R1 R2

CX1

CX2

R4D1

BAT Suggested Values:

CX1, CX2

R2,3

BAT

100nF

See Text

100pF

10K

2.2K

Schottky

Backup Supply

32.768 kHz Crystal

(See Text)

MFP

SCL

SDA

Note 1: A 100nF Capacitor should be placed as close to the Vcc pin on the device

as possible.

 2011 Microchip Technology Inc. DS25009B-page 3

MCP7940X

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings (†)

VCC.............................................................................................................................................................................6.5V

All inputs and outputs w.r.t. VSS ..........................................................................................................-0.6V to VCC +1.0V

Storage temperature ...............................................................................................................................-65°C to +150°C

Ambient temperature with power applied................................................................................................-40°C to +125°C

ESD protection on all pins  4 kV

TABLE 1-1: DC CHARACTERISTICS

† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the

device. This is a stress rating only and functional operation of the device at those or any other conditions above those

indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for

extended periods may affect device reliability.

DC CHARACTERISTICS Electrical Characteristics:

Industrial (I): VCC = +1.8V to 5.5V TA = -40°C to +85°C

Param.

No. Sym. Characteristic Min. Typ. Max. Units Conditions

— SCL, SDA pins — — — —

D1 VIH High-level input voltage 0.7 VCC —V—

D2 VIL Low-level input voltage — 0.3 VCC

0.2 VCC

VVCC = 2.5V to 5.5V

D3 VHYS Hysteresis of Schmitt

Trigger inputs

(SDA, SCL pins)

0.05

VCC

—V(Note 1)

D4 VOL Low-level output voltage

(MFP, SDA)

—0.40VIOL = 3.0 ma @ VCC = 4.5V

IOL = 2.1 ma @ VCC = 2.5V

D5 ILI Input leakage current — ±1 AVIN = VSS or VCC

D6 ILO Output leakage current — ±1 AVOUT = VSS or VCC

D7 CIN,

COUT

Pin capacitance

(SDA, SCL and MFP)

—10pFVCC = 5.0V (Note 1)

A = 25°C, f = 400 kHz

D8 ICC Read Operating current

— 400 AVCC = 5.5V, SCL = 400 kHz

ICC Write — 3 mA VCC = 5.5V

D9 ICC Read Operating current

SRAM

— 300 AVCC = 5.5V, SCL = 400 kHz

ICC Write — 400 AVCC = 5.5V, SCL = 400 kHz

D10 ICCS Standby current (Note 2)—5AVCC = 5.5V, SCL = SDA = VCC

D11 IBAT VBAT Standby Current

(Note 2)

—700— nAVBAT = 1.8V @ 25°C

D12 VTRIP VBAT Change Over 1.3 1.7 V 1.5V typical at TAMB = 25°C

D13 VCCFT VCC Fall Time (Note 1)300 — sFrom VTRIP (max) to VTRIP (min)

D14 VCCRT VCC Rise Time (Note 1)0—sFrom VTRIP (min) to VTRIP (max)

D15 VBAT VBAT Voltage Range

(Note 1)

1.3 5.5 V —

D16 COSC Oscillator Pin

Capacitance

—3—pF(Note 1)

Note 1: This parameter is periodically sampled and not 100% tested.

2: Standby with oscillator running.

MCP7940X

DS25009B-page 4  2011 Microchip Technology Inc.

TABLE 1-2: AC CHARACTERISTICS

AC CHARACTERISTICS Electrical Characteristics:

Industrial (I): VCC = +1.8V to 5.5V TA = -40°C to +85°C

Param.

No. Symbol Characteristic Min. Max. Units Conditions

CLK Clock frequency —

—

100

400

kHz 1.8V  VCC < 2.5V

2.5V  VCC  5.5V

2THIGH Clock high time 4000

600

—

ns 1.8V  VCC < 2.5V

2.5V  VCC  5.5V

LOW Clock low time 4700

1300

—

ns 1.8V  VCC < 2.5V

2.5V  VCC  5.5V

4TRSDA and SCL rise time

(Note 1)

—

1000

300

ns 1.8V  VCC < 2.5V

2.5V  VCC  5.5V

5TFSDA and SCL fall time

(Note 1)

—

1000

300

ns 1.8V  VCC < 2.5V

2.5V  VCC  5.5V

HD:STA Start condition hold time 4000

600

—

ns 1.8V  VCC < 2.5V

2.5V  VCC  5.5V

7TSU:STA Start condition setup time 4700

600

—

ns 1.8V  VCC < 2.5V

2.5V  VCC  5.5V

8THD:DAT Data input hold time 0 — ns

9TSU:DAT Data input setup time 250

100

—

ns 1.8V  VCC < 2.5V

2.5V  VCC  5.5V

10 TSU:STO Stop condition setup time 4000

600

—

ns 1.8V  VCC < 2.5V

2.5V  VCC  5.5V

11 TAA Output valid from clock —

—

3500

900

ns 1.8V  VCC < 2.5V

2.5V  VCC  5.5V

12 TBUF Bus free time: Time the bus

must be free before a new

transmission can start

4700

1300

—

ns 1.8V  VCC < 2.5V

2.5V  VCC  5.5V

13 TSP Input filter spike suppression

(SDA and SCL pins)

—50ns(Note 1 and Note 2)

14 TWC Write cycle time (byte or

page)

—5ms—

15 — Endurance 1M — cycles 25°C, VCC = 5.5V Page mode

(Note 3)

Note 1: Not 100% tested.

2: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs, which provide improved

noise spike suppression. This eliminates the need for a TI specification for standard operation.

3: This parameter is not tested but ensured by characterization. For endurance estimates in a specific

application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site

at www.microchip.com.

 2011 Microchip Technology Inc. DS25009B-page 5

MCP7940X

FIGURE 1-2: BUS TIMING DATA

SCL

SDA

Out

D4 4

MCP7940X

DS25009B-page 6  2011 Microchip Technology Inc.

2.0 PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 2 -1.

TABLE 2-1: PIN DESCRIPTIONS

FIGURE 2-1: DEVICE PINOUTS

2.1 Serial Data (SDA)

This is a bidirectional pin used to transfer addresses

and data into and out of the device. It is an open-drain

terminal, therefore, the SDA bus requires a pull-up

resistor to VCC (typically 10 k for 100 kHz, 2 k for

400 kHz). For normal data transfer SDA is allowed to

change only during SCL low. Changes during SCL high

are reserved for indicating the Start and Stop

conditions.

2.2 Serial Clock (SCL)

This input is used to synchronize the data transfer from

and to the device.

2.3 X1, X2

External Crystal Pins.

2.4 MFP

Open drain pin used for alarm and clock-out.

2.5 VBAT

Input for backup supply to maintain RTCC and SRAM

during the time when VCC is below VTRIP.

Pin Name Pin Function

Vss Ground

SDA Bidirectional Serial Data

SCL Serial Clock

X1 Xtal Input, External Oscillator Input

X2 Xtal Output

VBAT Battery Backup Input (3V Typ)

MFP Multi Function Pin

Vcc +1.8V to +5.5V Power Supply

VBAT

Vss

Vcc

MFP

SCL

SDA

SOIC/DFN/MSOP/TSSOP

 2011 Microchip Technology Inc. DS25009B-page 7

MCP7940X

3.0 I2C BUS CHARACTERISTICS

3.1 I2C Interface

The MCP7940X supports a bidirectional 2-wire bus and

data transmission protocol. A device that sends data

onto the bus is defined as transmitter, and a device

receiving data as receiver. The bus has to be controlled

by a master device which generates the Start and Stop

conditions, while the MCP7940X works as slave. Both

master and slave can operate as transmitter or receiver

but the master device determines which mode is

activated.

3.1.1 BUS CHARACTERISTICS

The following bus protocol has been defined:

• Data transfer may be initiated only when the bus

is not busy.

• During data transfer, the data line must remain

stable whenever the clock line is high. Changes in

the data line while the clock line is high will be

interpreted as a Start or Stop condition.

Accordingly, the following bus conditions have been

defined (Figure 3-1).

3.1.1.1 Bus not Busy (A)

Both data and clock lines remain high.

3.1.1.2 Start Data Transfer (B)

A high-to-low transition of the SDA line while the clock

(SCL) is high determines a Start condition. All

commands must be preceded by a Start condition.

3.1.1.3 Stop Data Transfer (C)

A low-to-high transition of the SDA line while the clock

(SCL) is high determines a Stop condition. All

operations must end with a Stop condition.

3.1.1.4 Data Valid (D)

The state of the data line represents valid data when,

after a Start condition, the data line is stable for the

duration of the high period of the clock signal.

The data on the line must be changed during the low

period of the clock signal. There is one bit of data per

clock pulse.

Each data transfer is initiated with a Start condition and

terminated with a Stop condition. The number of the

data bytes transferred between the Start and Stop

conditions is determined by the master device.

3.1.1.5 Acknowledge

Each receiving device, when addressed, is obliged to

generate an Acknowledge signal after the reception of

each byte. The master device must generate an extra

clock pulse which is associated with this Acknowledge

bit.

A device that acknowledges must pull down the SDA

line during the Acknowledge clock pulse in such a way

that the SDA line is stable-low during the high period of

the Acknowledge-related clock pulse. Of course, setup

and hold times must be taken into account. During

reads, a master must signal an end of data to the slave

by NOT generating an Acknowledge bit on the last byte

that has been clocked out of the slave. In this case, the

slave (MCP7940X) will leave the data line high to

enable the master to generate the Stop condition.

FIGURE 3-1: DATA TRANSFER SEQUENCE ON THE SERIAL BUS

Note: The MCP7940X does not generate any

Acknowledge bits while an internal Unique

ID programming cycle is in progress, but

the user may still access the SRAM and

RTCC registers.

Address or

Acknowledge

Valid

Data

Allowed

to Change

Stop

Condition

Start

Condition

SCL

SDA

(A) (B) (D) (D) (C) (A)

MCP7940X

DS25009B-page 8  2011 Microchip Technology Inc.

FIGURE 3-2: ACKNOWLEDGE TIMING

3.1.2 DEVICE ADDRESSING AND OPERATION

A control byte is the first byte received following the

Start condition from the master device (Figure 3-2).

The control byte consists of a control code; for the

MCP7940X this is set as ‘1010111’ for read and write

operations for the Unique ID after the correct unlock

sequence.

The control byte for accessing the SRAM and RTCC

registers are set to ‘1101111’. The RTCC registers and

the SRAM share the same address space.

The last bit of the control byte defines the operation to

be performed. When set to a ‘1’ a read operation is

selected, and when set to a ‘0’ a write operation is

selected. The next byte received defines the address of

the data byte (Figure 3-3). The upper address bits are

transferred first, followed by the Least Significant bits

(LSb).

Following the Start condition, the MCP7940X monitors

the SDA bus, checking the device type identifier being

transmitted. Upon receiving an ‘1010111’ or

‘1101111’ code, the slave device outputs an

Acknowledge signal on the SDA line. Depending on the

state of the R/W bit, the MCP7940X will select a read

or write operation.

FIGURE 3-3: ADDRESS SEQUENCE BIT ASSIGNMENTS

SCL 987654321123

Transmitter must release the SDA line at this point

allowing the Receiver to pull the SDA line low to

acknowledge the previous eight bits of data.

Receiver must release the SDA line at this point

so the Transmitter can continue sending data.

Data from transmitter Data from transmitter

SDA

Acknowledge

Bit

1 010 R/W 1A

1110

Unique ID CONTROL BYTE ADDRESS BYTE

CONTROL

CODE

111

X = Don’t Care

1 101 R/W

••••••

SRAM RTCC CONTROL BYTE ADDRESS BYTE

CONTROL

CODE

111

X = Don’t Care

 2011 Microchip Technology Inc. DS25009B-page 9

MCP7940X

3.1.3 ACKNOWLEDGE POLLING

Since the device will not acknowledge a Unique ID

command during an ID write cycle, this can be used to

determine when the cycle is complete. This feature can

be used to maximize bus throughput. Once the Stop

condition for a Write command has been issued from

the master, the device initiates the internally timed write

cycle. ACK polling can be initiated immediately. This

involves the master sending a Start condition, followed

by the control byte for a Write command (R/W = 0). If

the device is still busy with the write cycle, then no ACK

will be returned. If no ACK is returned, then the Start bit

and control byte must be resent. If the cycle is

complete, then the device will return the ACK, and the

master can then proceed with the next Read or Write

command. See Figure 3-4 for the flow diagram.

FIGURE 3-4: ACKNOWLEDGE

POLLING FLOW

Send

ID Write Command

Send Stop

Condition to

Initiate ID Write Cycle

Send Start

Send Control Byte

with R/W = 0

Did Device

Acknowledge

(ACK = 0)?

Operation

YES

MCP7940X

DS25009B-page 10  2011 Microchip Technology Inc.

4.0 RTCC FUNCTIONALITY

The MCP7940X family is a highly integrated RTCC.

On-board time and date counters are driven from a low-

power oscillator to maintain the time and date. An

integrated VCC switch enables the device to maintain

the time and date and also the contents of the SRAM

during a VCC power failure.

4.1 RTCC MEMORY MAP

The RTCC registers are contained in addresses

0x00h-0x1fh. 64 bytes of user-accessable SRAM are

located in the address range 0x20-0x5f. The SRAM

memory is a separate block from the RTCC control

and Configuration registers. All SRAM locations are

battery-backed-up during a VCC power fail. Unused

locations are not accessible, MCP7940X will noACK

after the address byte if the address is out of range, as

shown in the shaded region of the memory map in

Figure 4-1. The shaded areas are not implemented

and read as ‘0’. No error checking is provided when

loading time and date registers.

• Addresses 0x00h-0x06h are the RTCC Time and

Date registers. These are read/write registers.

Care must be taken when writing to these regis-

ters while the oscillator is running.

• Incorrect data can appear in the Time and Date

registers if a write is attempted during the time-

frame where these internal registers are being

incremented. The user can minimize the likeli-

hood of data corruption by insuring that any writes

to the Time and Date registers occur before the

contents of the second register reach a value of

0x59H.

• Addresses 0x07h-0x09h are the device Configu-

ration, Calibration and ID Unlock registers.

• Addresses 0x0Ah-0x10h are the Alarm 0 regis-

ters. These are used to set up the Alarm 0, the

Interrupt polarity and the Alarm 0 compare.

• Addresses 0x11h-0x17h are the same as 0x0Bh-

0x11h but are used for Alarm 1.

• Addresses 0x18h-0x1Fh are used for the time-

stamp feature.

The detailed memory map is shown in Ta b l e 4 - 1 .

FIGURE 4-1: MEMORY MAP

0x00

0x06

Time and Date

Configuration and Calibration

Alarm 0

Alarm 1

Time-Stamp

SRAM (64 Bytes)

0x07

0x09

0x0A

0x10

0x11

0x17

0x18

0x1F

0x20

0x5F

0x60

0xFF

 2011 Microchip Technology Inc. DS25009B-page 11

MCP7940X

TABLE 4-1: DETAILED RTCC MEMORY MAP

Address Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Function Range Reset

State

00h ST 10 Seconds Seconds Seconds 00-59 00h

01h 10 Minutes Minutes Minutes 00-59 00h

02h

12/24

10 Hour

AM/PM

10 Hour Hour Hours 1-12 + AM/PM

00 - 23

00h

03h OSCON VBAT VBATEN Day Day 1-7 01h

04h 10 Date Date Date 01-31 01h

05h LP 10 Month Month Month 01-12 01h

06h 10 Year Year Year 00-99 01h

07h OUT SQWE ALM1 ALM0 EXTOSC RS2 RS1 RS0 Control Reg. 80h

08h CALIBRATION Calibration 00h

09h UNIQUE UNLOCK ID SEQUENCE Unlock ID 00h

0Ah 10 Seconds Seconds Seconds 00-59 00h

0Bh 10 Minutes Minutes Minutes 00 - 59 00h

0Ch

12/24

10 Hour

AM/PM

10 Hours Hour Hours 1-12 + AM/PM

00-23

00h

0Dh ALM0POL ALM0C2 ALM0C1 ALM0C0 ALM0IF Day Day 1-7 01h

0Eh 10 Date Date Date 01-31 01h

0Fh 10 Month Month Month 01-12 01h

10h Reserved – Do not use Reserved 01h

11h 10 Seconds Seconds Seconds 00-59 00h

12h 10 Minutes Minutes Minutes 00-59 00h

13h

12/24

10 Hour

AM/PM

10 Hours Hour Hours 1-12 + AM/PM

00-23

00h

14h ALM1POL ALM1C2 ALM1C1 ALM1C0 ALM1IF Day Day 1-7 01h

15h 10 Date Date Date 01-31 01h

16h 10 Month Month Month 01-12 01h

17h Reserved – Do not use Reserved 01h

18h 10 Minutes Minutes 00h

19h

12/24

10 Hour

AM/PM

10 Hours Hour 00h

1Ah 10 Date Date 00h

1Bh Day 10 Month Month 00h

1Ch 10 Minutes Minutes 00h

1Dh

12/24

10 Hour

AM/PM

10 Hours Hour 00h

1Eh 10 Date Date 00h

1Fh Day 10 Month Month 00h

MCP7940X

DS25009B-page 12  2011 Microchip Technology Inc.

4.1.1 RTCC REGISTER ADDRESSES

0x00h – Contains the BCD seconds and 10 seconds.

The range is 00 to 59. Bit 7 in this register is used to

start or stop the on-board crystal oscillator. Setting this

bit to a ‘1’ starts the oscillator and clearing this bit to a

‘0’ stops the on-board oscillator.

0x01h – Contains the BCD minutes and 10 minutes.

The range is 00 to 59.

0x02h – Contains the BCD hour in bits 3:0. Bits 5:4

contain either the 10 hour in BCD for 24-hour format or

the AM/PM indicator and the 10-hour bit for 12-hour

format. Bit 6 determines the hour format. Setting this

bit to ‘0’ enables 24-hour format, setting this bit to ‘1’

enables 12-hour format.

0x03h – Contains the BCD day. The range is 1-7.

Additional bits are also used for configuration and

status.

• Bit 3 is the VBATEN bit. If this bit is set, the

internal circuitry is connected to the VBAT pin

when VCC fails. If this bit is ‘0’ then the VBAT pin is

disconnected and the only current drain on the

external battery is the VBAT pin leakage.

• Bit 4 is the VBAT bit. This bit is set by hardware

when the VCC fails and the VBAT is used to power

the Oscillator and the RTCC registers. This bit is

cleared by software. Clearing this bit will also

clear all the time-stamp registers.

• Bit 5 is the OSCON bit. This is set and cleared by

hardware. If this bit is set, the oscillator is running,

if cleared, the oscillator is not running. This bit

does not indicate that the oscillator is running at

the correct frequency. The RTCC will wait 32

oscillator cycles before the bit is set. The RTCC

will wait roughly 32 clock cycles to clear this bit.

0x04h – Contains the BCD date and 10 date. The

range is 01-31. Bits 5:4 contain 10’s date and bits 4:0

contain the date.

0x05h – Contains the BCD month. Bit 4 contains the

10 month. Bit 5 is the Leap Year bit, which is set during

a leap year and is read-only.

0x06h – Contains the BCD year and 10 year. The

Range is 00-99.

0x07h – Is the Control register.

• Bit 7 is the OUT bit. This sets the logic level on the

MFP when not using this as a square wave out-

put.

• Bit 6 is the SQWE bit. Setting this bit enables the

divided output from the crystal oscillator.

• Bits 5:4 determine which alarms are active.

-00 – No Alarms are active

-01 – Alarm 0 is active

-10 – Alarm 1 is active

-11 – Both Alarms are active

• Bit 3 is the EXTOSC enable bit. Setting this bit will

allow an external 32.768 kHz signal to drive the

RTCC registers, eliminating the need for an

external crystal.

• Bit 2:0 sets the internal divider for the 32.768 kHz

oscillator to be driven to the MFP. The duty cycle is

50%. The output is responsive to the Calibration

-000 – 1 Hz

-001 – 4.096 kHz

-010 – 8.192 kHz

-011 – 32.768 kHz

- 1xx enables the Cal output function. Cal

output appears on MFP if SQWE is set (64

Hz Nominal). See Section 4.2.2 “Calibra-

tion” for more details.

0x08h is the Calibration register. This is an 8-bit

RTCC counter every minute. The MSB is the sign bit

and indicates if the count should be added or

subtracted. The remaining 7 bits, with each bit adding

or subtracting 2 clocks, give the user the ability to add

or subtract up to 254 clocks per minute.

0x09h is the unlock sequence address. To unlock write

access to the unique ID area in the EEPROM, a

sequence must be written to this address in separate

commands. The process is fully detailed in

Section 4.2.1 “Unlock Sequence”.

0x0Ah-0x0fh and 0x11-0x16h are the Alarm 0 and

Alarm 1 registers. The bits are the same as the RTCC

bits with the following differences:

Locations 0x10h and 0x17h are reserved and should

not be used to allow for future device compatibility.

0x0Dh/0x14h has additional bits for alarm configu-

ration.

• ALMxPOL: This bit specifies the level that the

MFP will drive when the alarm is triggered.

ALM2POL is a copy of ALM1POL. The default

state of the MFP when used for alarms is the

inverse of ALM1POL.

• ALMxIF: This is the Alarm Interrupt Fag. This bit is

set in hardware if the alarm was triggered. The bit

is cleared in software.

Note: The RTCC counters will continue to

increment during the calibration.

 2011 Microchip Technology Inc. DS25009B-page 13

MCP7940X

• ALMxC2:0: These Configuration bits determine

the alarm match. The logic will trigger the alarm

based on one of the following match conditions:

• The 12/24-hour bits 0xCh.6 and 0x13h.6 are cop-

ies of the bit in 0x02h.6. The bits are read-only.

0x18h-0x1Bh are used for the timesaver function.

These registers are loaded at the time when VCC fails

and the RTCC operates on the VBAT. The VBAT bit is

also set at this time. These registers are cleared when

the VBAT bit is cleared in software.

0x1Ch-0x1Fh are used for the timesaver function.

These registers are loaded at the time when VCC is

restored and the RTCC switches to VDD. These

registers are cleared when the VBAT bit is cleared in

software.

4.2 FEATURES

4.2.1 UNLOCK SEQUENCE

The unique ID location is user accessible by using the

unlock ID sequence.

The unique ID location is 64-bits (8 bytes) and is

stored in EEPROM locations 0xF0 to 0xF7. This

location can be read at any time, however, a write is

inhibited until unlocked.

To unlock the write access to this location the following

sequence must be completed:

• A single write of 0x55h to address 0x09. Stop

• A single write of 0xAAh to address 0x09. Stop

This will allow the unique EEPROM locations to be

written.

After the byte or page write to these locations, the

write sequence is initiated by the Stop condition. At

this time, the ID locations are locked and no further

writes are possible to this location unless a complete

unlock sequence is repeated.

000 – Seconds match

001 – Minutes match

010 – Hours match (takes into account 12/24

hour)

011 – Matches the current day, interrupt at

12.00.00 a.m. Example: 12 midnight on

100 –Date

101 – RESERVED

110 – RESERVED

111 – Seconds, Minutes, Hour, Day, Date,

Month

Note: It is strongly recommended that the

timesaver function only be used when the

oscillator is running. This will ensure

accurate functionality.

MCP7940X

DS25009B-page 14  2011 Microchip Technology Inc.

4.2.2 CALIBRATION

The MCP7940X utilizes digital calibration to correct for

inaccuracies of the input clock source (either external

or crystal). Calibration is enabled by setting the value

of the Calibration register at address 08H. Calibration

is achieved by adding or subtracting a number of input

clock cycles per minute in order to achieve ppm level

adjustments in the internal timing function of the

MCP7940X.

The MSB of the Calibration register is the sign bit, with

a ‘1’ indicating subtraction and a ‘0’ indicating addition.

The remaining seven bits in the register indicate the

number of input clock cycles (multiplied by two) that

are subtracted or added per minute to the internal

timing function.

The internal timing function can be monitored using

the MFP open-drain output pin by setting bit [6]

(SQWE) and bits [2:0] (RS2, RS1, RS0) of the control

waveform is disabled when the MCP7940X is running

in VBAT mode. With the SQWE bit set to ‘1’, there are

two methods that can be used to observe the internal

timing function of the MCP7940X:

A. RS2 BIT SET TO ‘0’

With the RS2 bit set to ‘0’, the RS1 and RS0 bits

enable the following internal timing signals to be

output on the MFP pin:

The frequencies listed in the table presume an input

clock source of exactly 32.768 kHz. In terms of the

equivalent number of input clock cycles, the table

becomes:

With regards to the calibration function, the Calibration

clock signal when bits RS1 and RS0 are set to ‘11’.

The setting of the Calibration register to a non-zero

value (i.e., values other than 00H or 80H) enables the

calibration function which can be observed on the

MFP output pin. The calibration function can be

expressed in terms of the number of input clock cycles

added/subtracted from the internal timing function.

With bits RS1 and RS0 set to ‘00’, the calibration

function can be expressed as:

Since the calibration is done once per minute (i.e.,

when the internal minute counter is incremented), only

one cycle in sixty of the MFP output waveform is

affected by the calibration setting. Also note that the

duty cycle of the MFP output waveform will not

necessarily be at 50% when the calibration setting is

applied.

With bits RS1 and RS0 set to ‘01’ or ‘10’, the

calibration function can not be expressed in terms of

the input clock period. In the case where the MSB of

the Calibration register is set to ‘0’, the waveform

appearing at the MFP output pin will be “delayed”,

once per minute, by twice the number of input clock

cycles defined in the Calibration register. The MFP

waveform will appear as:

FIGURE 4-2: RS1 AND RS0 WITH AND WITHOUT CALIBRATION

RS2 RS1 RS0 Output Signal

000 1 Hz

001 4.096 kHz

010 8.192 kHz

011 32.768 kHz

RS2 RS1 RS0 Output Signal

000 32768

001 8

010 4

011 1

Toutput = (32768 +/- (2 * CALREG)) Tinput

where:

Toutput = clock period of MFP output signal

Tinput = clock period of input signal

CALREG = decimal value of Calibration

determined by the MSB of

Calibration register.

Delay

 2011 Microchip Technology Inc. DS25009B-page 15

MCP7940X

In the case where the MSB of the Calibration register

is set to ‘1’, the MFP output waveforms that appear

when bits RS1 and RS0 are set to ‘01’ or ‘10’ are not

as responsive to the setting of the Calibration register.

For example, when outputting the 4.096 kHz

waveform (RS1, RS0 set to ‘01’), the output waveform

is generated using only eight input clock cycles.

Consequently, attempting to subtract more than eight

input clock cycles from this output does not have a

meaningful effect on the resulting waveform. Any

effect on the output will appear as a modification in

both the frequency and duty cycle of the waveform

appearing on the MFP output pin.

B.RS2 BIT SET TO ‘1’

With the RS2 bit set to ‘1’, the following internal timing

signal is output on the MFP pin:

The frequency listed in the table presumes an input

clock source of exactly 32.768 kHz. In terms of the

equivalent number of input clock cycles, the table

becomes:

Unlike the method previously described, the

calibration setting is continuously applied and affects

every cycle of the output waveform. This results in the

modulation of the frequency of the output waveform

based upon the setting of the Calibration register.

Using this setting, the calibration function can be

expressed as:

Since the calibration is done every cycle, the frequency

of the output MFP waveform is constant.

4.2.3 MFP

Pin 7 is a multi-function pin and supports the following

functions:

• Use of the OUT bit in the Control register for

single bit I/O

• Alarm Outputs – Available in VBAT mode

• FOUT mode – driven from a FOSC divider – Not

available in VBAT mode

The internal control logic for the MFP is connected to

the switched internal supply bus, this allows operation

in VBAT mode. The Alarm Output is the only mode that

operates in VBAT mode, other modes are suspended.

4.2.4 VBAT

The MCP7940X features an internal switch that will

power the clock and the SRAM. In the event that the

VCC supply is not available, the voltage applied to the

VBAT pin serves as the backup supply. A low-value

series resistor is recommended between the external

battery and the VBAT pin to limit the current to the

internal switch circuit.

The VBAT trip point is the point at which the internal

switch operates the device from the VBAT supply and

is typically 1.5V (VTRIP specification D12) typical.

When VDD falls below 1.5V the system will continue to

operate the RTCC and SRAM using the VBAT supply.

The following conditions apply:

If the VBAT feature is not being used, the VBAT pin must

be connected to GND. For more information on VBAT

conditions see AN1365, “RTCC Best Practices Appli-

cation Note” (DS01365).

RS2 RS1 RS0 Output Signal

1 x x 64.0 Hz

RS2 RS1 RS0 Output Signal

1 x x 512

Toutput = (2 * (256 +/- (2 * CALREG))) Tinput

where:

Toutput = clock period of MFP output signal

Tinput = clock period of input signal

CALREG = decimal value of the Calibration

determined by the MSB of the

Calibration register.

TABLE 4-2:

Supply

Condition

Read/Write

Access

Powered

VCC < VTRIP, VCC < VBAT No VBAT

VCC > VTRIP, VCC < VBAT Yes VCC

VCC > VTRIP, VCC > VBAT Yes VCC

MCP7940X

DS25009B-page 16  2011 Microchip Technology Inc.

4.2.5 CRYSTAL SPECS

The MCP7940X has been designed to operate with a

standard 32.768 kHz tuning fork crystal. The on-board

oscillator has been characterized to operate with a

crystal of maximum ESR of 70K Ohms.

Crystals with a comparable specification are also suit-

able for use with the MCP7940X.

The table below is given as design guidance and a

starting point for crystal and capacitor selection.

EQUATION 4-1: The following must also be taken into consideration:

• Pin capacitance (to be included in Cx2 and Cx1)

• Stray Board Capacitance

The recommended board layout for the oscillator area

is shown in Figure 4-3. This actual board shows the

crystal and the load capacitors. In this example, C2 is

CX1, C3 is CX2 and the crystal is designated as Y1.

FIGURE 4-3: BOARD LAYOUT

Gerber files are available from www/microchip.com/

rtcc.

It is required that the final application should be tested

with the chosen crystal and capacitor combinations

across all operating and environmental conditions.

Please also consult with the crystal specification to

observe correct handling and reflow conditions and for

information on ideal capacitor values.

For more information please see AN1365, “RTCC Best

Practices Application Note” (DS01365).

Manufacturer Part Number Crystal

Capacitance CX1 Value CX2 Value

Micro Crystal CM7V-T1A 7pF 10pF 12pF

Citizen CM200S-32.768KDZB-UT 6pF 10pF 8 pF

Please work with your crystal vendor.

Cload

CX2 CX1



CX2 CX1+

----------------------------- C stray

 2011 Microchip Technology Inc. DS25009B-page 17

MCP7940X

4.2.6 POWER-FAIL TIME-STAMP

The MCP7941X family of RTCC devices feature a

power-fail time-stamp feature. This feature will store

the time at which VCC crosses the VTRIP voltage and is

shown in Figure 4-4. To use this feature, a VBAT

supply must be present and the oscillator must also be

running.

There are two separate sets of registers that are used

to record this information:

• The first set, located at 0x18h through 0x1Bh, is

loaded at the time when VCC falls below VTRIP

and the RTCC operates on the VBAT. The VBAT

(register 0x03h bit 4) bit is also set at this time.

• The second set of registers, located at 0x1Ch

through 0x1Fh, is loaded at the time when VCC is

restored and the RTCC switches to VCC.

The power-fail time-stamp registers are cleared when

the VBAT bit is cleared in software.

FIGURE 4-4: POWER-FAIL GRAPH

VCC

VTRIP(max)

VTRIP(min)

VCCFT

VCCRT

Power-Down Power-Up

Time-Stamp Time-Stamp

MCP7940X

DS25009B-page 18  2011 Microchip Technology Inc.

5.0 ON BOARD MEMORY

The MCP7940X has both on-board Unique ID memory

and battery-backed SRAM. The SRAM is arranged as

64 x 8 bytes and is retained when the VCC supply is

removed, provided the VBAT supply is present and

enabled. The Unique ID is nonvolatile memory and

does not require the VBAT supply for retention.

5.1 SRAM

FIGURE 5-1: SRAM/RTCC BYTE WRITE

FIGURE 5-2: SRAM/RTCC MULTIPLE BYTE WRITE

The 64 bytes of user SRAM are at location 0x20h and

can be accessed during an RTCC update. Upon POR

the SRAM will be in an undefined state.

Writing to the SRAM and RTCC is accomplished in a

similar way to writing to the EEPROM (as described

later in this document) with the following consider-

ations:

• There is no page. The entire 64 bytes of SRAM or

32 bytes of RTCC register can be written in one

command.

• The SRAM allows an unlimited number of read/

write cycles with no cell wear out.

• The RTCC and SRAM are not accessible when

the device is running on the external VBAT.

• The RTCC and SRAM are separate blocks. The

SRAM array may be accessed during an RTCC

update.

• Read and write access is limited to either the

RTCC register block or the SRAM array. The

Address Pointer will rollover to the start of the

addressed block.

• Data written to the RTCC and SRAM are on a per

byte basis.

BUS ACTIVITY

MASTER

SDA LINE

BUS ACTIVITY

CONTROL

BYTE

ADDRESS

BYTE DATA

S1101 0111 P

BUS ACTIVITY

MASTER

SDA LINE

BUS ACTIVITY

CONTROL

BYTE

ADDRESS

BYTE DATA BYTE 0

DATA BYTE N

S1101 0

111 P

Note: Entering an address past 5F for an SRAM

operation will result in the MCP7940X not

acknowledging the address.

 2011 Microchip Technology Inc. DS25009B-page 19

MCP7940X

5.2 ID

5.2.1 ID BYTE WRITE

Following the Start condition from the master, the

control code and the R/W bit (which is a logic low) are

clocked onto the bus by the master transmitter. This

indicates to the addressed slave receiver that a byte

with a word address will follow after it has generated an

Acknowledge bit during the ninth clock cycle.

Therefore, the next byte transmitted by the master is

the word address and will be written into the Address

Pointer of the MCP7940X. After receiving another

Acknowledge signal from the MCP7940X, the master

device transmits the data word to be written into the

addressed memory location. The MCP7940X

acknowledges again and the master generates a Stop

condition. This initiates the internal write cycle, and,

during this time, the MCP7940X does not generate

Acknowledge signals for Unique ID Write commands. If

an attempt is made to write to an address and the

protection is set then the device will acknowledge the

command but no write cycle will occur, no data will be

written, and the device will immediately accept a new

command. After a Byte Write command, the internal

address counter will point to the address location

following the one that was just written.

Note: Addressing undefined ID locations will

result in the MCP7940X not acknowledg-

ing the address.

MCP7940X

DS25009B-page 20  2011 Microchip Technology Inc.

FIGURE 5-3: ID BYTE WRITE

5.2.2 READ OPERATION

Read operations are initiated in the same way as write

operations with the exception that the R/W bit of the

control byte is set to one. There are three basic types

of read operations: current address read, random read,

and sequential read. The SRAM array can be read in

the same way as the ID using the control byte for the

SRAM ‘1101111’ with a valid address.

5.2.2.1 Current Address Read

The MCP7940X contains an address counter that

maintains the address of the last word accessed,

internally incremented by one. Therefore, if the

previous read access was to address n (n is any legal

address), the next current address read operation

would access data from address n + 1.

Upon receipt of the control byte with R/W bit set to one,

the MCP7940X issues an Acknowledge and transmits

the 8-bit data word. The master will not acknowledge

the transfer but does generate a Stop condition and the

MCP7940X discontinues transmission (Figure 5-4).

FIGURE 5-4: CURRENT ADDRESS

READ (ID SHOWN)

5.2.2.2 Random Read

Random read operations allow the master to access

any memory location in a random manner. To perform

this type of read operation, first the word address must

be set. This is done by sending the word address to the

MCP7940X as part of a write operation (R/W bit set to

‘0’). After the word address is sent, the master

generates a Start condition following the Acknowledge.

This terminates the write operation, but not before the

internal Address Pointer is set. Then, the master issues

the control byte again but with the R/W bit set to a one.

The MCP7940X will then issue an Acknowledge and

transmit the 8-bit data word. The master will not

acknowledge the transfer but it does generate a Stop

condition which causes the MCP7940X to discontinue

transmission (Figure 5-5). After a random read

command, the internal address counter will point to the

address location following the one that was just read.

5.2.2.3 Sequential Read

Sequential reads are initiated in the same way as a

random read except that after the MCP7940X transmits

the first data byte, the master issues an Acknowledge

as opposed to the Stop condition used in a random

read. This Acknowledge directs the MCP7940X to

transmit the next sequentially addressed 8-bit word

(Figure 5-6). Following the final byte transmitted to the

master, the master will NOT generate an Acknowledge

but will generate a Stop condition. To provide

sequential reads, the MCP7940X contains an internal

Address Pointer which is incremented by one at the

completion of each operation. This Address Pointer

allows the entire memory contents to be serially read

during one operation. The internal Address Pointer will

automatically roll over to the start of the block.

BUS ACTIVITY

MASTER

SDA LINE

BUS ACTIVITY

CONTROL

BYTE

ADDRESS

BYTE DATA

S1010 0

111 P

11110•••

BUS ACTIVITY

MASTER

SDA LINE

BUS ACTIVITY

CONTROL

BYTE

DATA

1100 1

BYTE

111 11110•••

 2011 Microchip Technology Inc. DS25009B-page 21

MCP7940X

FIGURE 5-5: RANDOM READ (UNIQUE ID SHOWN)

FIGURE 5-6: SEQUENTIAL READ (UNIQUE ID SHOWN)

5.3 Unique ID

The MCP7940X features an additional 64-bit unique ID

area.

The unique ID is located at addresses 0xF0 through

0xF7. Reading the unique ID requires the user to

simply address these bytes.

The unique ID area is protected to prevent unintended

writes to these locations. The unlock sequence is

detailed in Section 4.2.1 “Unlock Sequence”.

The unique ID can be factory programmed on some

devices to provide a unique IEEE EUI-48 or EUI-64

value. In addition, customer-provided codes can also

be programmed.

BUS ACTIVITY

MASTER

SDA LINE

BUS ACTIVITY

CONTROL

BYTE

ADDRESS

BYTE

CONTROL

BYTE

DATA

BYTE

S1010 0

111 S1010 1 P

BUS ACTIVITY

MASTER

SDA LINE

BUS ACTIVITY

CONTROL

BYTE DATA n DATA n + 1 DATA n + 2 DATA n + X

MCP7940X

DS25009B-page 22  2011 Microchip Technology Inc.

6.0 PACKAGING INFORMATION

6.1 Package Marking Information

8-Lead SOIC (3.90 mm) Example:

XXXXXT

XXYYWW

NNN

8-Lead TSSOP Example:

79400I

SN 1133

13F

8-Lead MSOP Example:

XXXX

TYWW

NNN

XXXXX

YWWNNN

9400

I133

13F

79401I

13313F

8-Lead 2x3 TDFN

XXX

YWW

AAS

133

Example:

Part Number

1st Line Marking Codes

TSSOP MSOP TDFN

MCP79400 9400 79400T AAS

MCP79401 9401 79401T AAT

MCP79402 9402 79402T AAU

Note: T = Temperature grade

NN = Alphanumeric traceability code

Legend: XX...X Customer-specific information

Y Year code (last digit of calendar year)

YY Year code (last 2 digits of calendar year)

WW Week code (week of January 1 is week ‘01’)

NNN Alphanumeric traceability code

Pb-free JEDEC designator for Matte Tin (Sn)

*This package is Pb-free. The Pb-free JEDEC designator ( )

can be found on the outer packaging for this package.

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

 2011 Microchip Technology Inc. DS25009B-page 23

MCP7940X

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

MCP7940X

DS25009B-page 24  2011 Microchip Technology Inc.

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

 2011 Microchip Technology Inc. DS25009B-page 25

MCP7940X

 !"#$%

& !"#$%&"'""($)%

*++&&&!!+$

MCP7940X

DS25009B-page 26  2011 Microchip Technology Inc.

'(()'** !"'%

&

1 (13"#%6)#!3'7#!#"7%&%

 !""%81%#%!%)"#""%)"#"""6%1;!!"%

< !"%8=1;

>?* >"!"63#"&&#"

8* )!"'#"#&#'))!#""

*++&&&!!+$

@" AA88

!"A!" E EG H

E#!7)(" E 

(  J;>?

G3K  L L 1

%%($$""   1 1;

%)) 1 ; L 1;

G3N% 8 J>?

%%($N% 81 <  ;

%%($A   < <1

A A ; J ;

 A1 18

 O L O

A%$""   L 

A%N% 7 1 L <

NOTE 1

L1 L

  & ?J>

 2011 Microchip Technology Inc. DS25009B-page 27

MCP7940X

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

MCP7940X

DS25009B-page 28  2011 Microchip Technology Inc.

+),+"+%

&

< !"%8=1;

>?* >"!"63#"&&#"

*++&&&!!+$

@" AA88

!"A!" E EG H

E#!7)(" E 

(  J;>?

G3K  L L 11

%%($$""  ; ; ;

%)) 1  L 1;

G3N% 8 >?

%%($N% 81 <>?

G3A  <>?

A A  J 

 A1 ;8

 O L O

A%$""   L <

A%N% 7  L 

NOTE 1

A2 c

L1 L

  & ?111>

 2011 Microchip Technology Inc. DS25009B-page 29

MCP7940X

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

MCP7940X

DS25009B-page 30  2011 Microchip Technology Inc.

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

 2011 Microchip Technology Inc. DS25009B-page 31

MCP7940X

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

MCP7940X

DS25009B-page 32  2011 Microchip Technology Inc.

-.),+/0012 !"'-.%

*++&&&!!+$

 2011 Microchip Technology Inc. DS25009B-page 33

MCP7940X

APPENDIX A: REVISION HISTORY

Revision A (04/2011)

Original release of this document.

Revision B (08/2011)

Added Figure 1-2; Added Parameter D16 to Table 1-1;

Added Sections 2.3-2.5; Added Figure 4.1; Revised

Section 4.1.1; Revised Sections 4.2.4-4.2.6.

MCP7940X

DS25009B-page 34  2011 Microchip Technology Inc.

NOTES:

 2011 Microchip Technology Inc. DS25009B-page 35

MCP79400/MCP79401/MCP79402

THE MICROCHIP WEB SITE

Microchip provides online support via our WWW site at

www.microchip.com. This web site is used as a means

to make files and information easily available to

customers. Accessible by using your favorite Internet

browser, the web site contains the following

information:

•Product Support – Data sheets and errata,

application notes and sample programs, design

resources, user’s guides and hardware support

documents, latest software releases and archived

software

•General Technical Support – Frequently Asked

Questions (FAQ), technical support requests,

online discussion groups, Microchip consultant

program member listing

•Business of Microchip – Product selector and

ordering guides, latest Microchip press releases,

listing of seminars and events, listings of

Microchip sales offices, distributors and factory

representatives

CUSTOMER CHANGE NOTIFICATION

SERVICE

Microchip’s customer notification service helps keep

customers current on Microchip products. Subscribers

will receive e-mail notification whenever there are

changes, updates, revisions or errata related to a

specified product family or development tool of interest.

To register, access the Microchip web site at

www.microchip.com. Under “Support”, click on

“Customer Change Notification” and follow the

registration instructions.

CUSTOMER SUPPORT

Users of Microchip products can receive assistance

through several channels:

• Distributor or Representative

• Local Sales Office

• Field Application Engineer (FAE)

• Technical Support

• Development Systems Information Line

Customers should contact their distributor,

representative or field application engineer (FAE) for

support. Local sales offices are also available to help

customers. A listing of sales offices and locations is

included in the back of this document.

Technical support is available through the web site

at: http://microchip.com/support

MCP79400/MCP79401/MCP79402

DS25009B-page 36  2011 Microchip Technology Inc.

READER RESPONSE

It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip

product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our

documentation can better serve you, please FAX your comments to the Technical Publications Manager at

(480) 792-4150.

Please list the following information, and use this outline to provide us with your comments about this document.

TO: Technical Publications Manager

RE: Reader Response

Total Pages Sent ________

From: Name

Company

Address

City / State / ZIP / Country

Telephone: (_______) _________ - _________

Application (optional):

Would you like a reply? Y N

Device: Literature Number:

Questions:

FAX: (______) _________ - _________

DS25009BMCP7940X

1. What are the best features of this document?

2. How does this document meet your hardware and software development needs?

3. Do you find the organization of this document easy to follow? If not, why?

4. What additions to the document do you think would enhance the structure and subject?

5. What deletions from the document could be made without affecting the overall usefulness?

6. Is there any incorrect or misleading information (what and where)?

7. How would you improve this document?

 2011 Microchip Technology Inc. DS25009B-page 37

MCP7940X

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. Not every possible ordering

combination is listed below.

PART NO. X/XX

PackageTemperature

Range

Device

Device: MCP79400 = 1.8V - 5.5V I2C™ Serial RTCC

MCP79400T = 1.8V - 5.5V I2C Serial RTCC

(Tape and Reel)

MCP79401 = 1.8V - 5.5V I2C Serial RTCC, EUI-48TM

MCP79401T = 1.8V - 5.5V I2C Serial RTCC, EUI-48TM

(Tape and Reel)

MCP79402 = 1.8V - 5.5V I2C Serial RTCC, EUI-64TM

MCP79402T = 1.8V - 5.5V I2C Serial RTCC, EUI-64TM

(Tape and Reel)

Temperature

Range:

I = -40°C to +85°C

Package: SN = 8-Lead Plastic Small Outline (3.90 mm body)

ST = 8-Lead Plastic Thin Shrink Small Outline

(4.4 mm)

MS = 8-Lead Plastic Micro Small Outline

MNY(1) = 8-Lead Plastic Dual Flat, No Lead

Examples:

a) MCP79400-I/SN: Industrial Temperature,

SOIC package.

b) MCP79400T-I/SN: Industrial Tempera-

ture, SOIC package, Tape and Reel.

c) MCP79400T-I/MNY: Industrial Tempera-

ture, TDFN package.

d) MCP79401-I/SN: Industrial Temperature,

SOIC package, EUI-48TM.

e) MCP79401-I/MS: Industrial Temperature

MSOP package, EUI-48TM.

f) MCP79402-I/SN: Industrial Temperature,

SOIC package, EUI-64TM.

g) MCP79402-I/ST: Industrial Temperature,

TSSOP package, EUI-64TM.

h) MCP79402-I/ST: Industrial Temperature,

TSSOP package, Tape and Reel, EUI-64

Note 1: ’Y’ indicates a Nickel Palladium Gold (NiPdAu) finish.

MCP7940X

DS25009B-page 38  2011 Microchip Technology Inc.

NOTES:

 2011 Microchip Technology Inc. DS25009B-page 39

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR

WARRANTIES OF ANY KIND WHETHER EXPRESS OR

IMPLIED, WRITTEN OR ORAL, STATUTORY OR

OTHERWISE, RELATED TO THE INFORMATION,

INCLUDING BUT NOT LIMITED TO ITS CONDITION,

QUALITY, PERFORMANCE, MERCHANTABILITY OR

FITNESS FOR PURPOSE. Microchip disclaims all liability

arising from this information and its use. Use of Microchip

devices in life support and/or safety applications is entirely at

the buyer’s risk, and the buyer agrees to defend, indemnify and

hold harmless Microchip from any and all damages, claims,

suits, or expenses resulting from such use. No licenses are

conveyed, implicitly or otherwise, under any Microchip

intellectual property rights.

Trademarks

The Microchip name and logo, the Microchip logo, dsPIC,

KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,

PIC32 logo, rfPIC and UNI/O are registered trademarks of

Microchip Technology Incorporated in the U.S.A. and other

countries.

FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,

MXDEV, MXLAB, SEEVAL and The Embedded Control

Solutions Company are registered trademarks of Microchip

Technology Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, chipKIT,

chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net,

dsPICworks, dsSPEAK, ECAN, ECONOMONITOR,

FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP,

Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB,

MPLINK, mTouch, Omniscient Code Generation, PICC,

PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE,

rfLAB, Select Mode, Total Endurance, TSHARC,

UniWinDriver, WiperLock and ZENA are trademarks of

Microchip Technology Incorporated in the U.S.A. and other

countries.

SQTP is a service mark of Microchip Technology Incorporated

in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

ISBN: 978-1-61341-579-5

Note the following details of the code protection feature on Microchip devices:

• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Microchip received ISO/TS-16949:2009 certification for its worldwide

headquarters, design and wafer fabrication facilities in Chandler and

Tempe, Arizona; Gresham, Oregon and design centers in California

and India. The Company’s quality system processes and procedures

are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping

devices, Serial EEPROMs, microperipherals, nonvolatile memory and

analog products. In addition, Microchip’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

DS25009B-page 40  2011 Microchip Technology Inc.

AMERICAS

Corporate Office

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-792-7200

Fax: 480-792-7277

Technical Support:

http://www.microchip.com/

support

Web Address:

www.microchip.com

Atlanta

Duluth, GA

Tel: 678-957-9614

Fax: 678-957-1455

Boston

Westborough, MA

Tel: 774-760-0087

Fax: 774-760-0088

Chicago

Itasca, IL

Tel: 630-285-0071

Fax: 630-285-0075

Cleveland

Independence, OH

Tel: 216-447-0464

Fax: 216-447-0643

Dallas

Addison, TX

Tel: 972-818-7423

Fax: 972-818-2924

Detroit

Farmington Hills, MI

Tel: 248-538-2250

Fax: 248-538-2260

Indianapolis

Noblesville, IN

Tel: 317-773-8323

Fax: 317-773-5453

Los Angeles

Mission Viejo, CA

Tel: 949-462-9523

Fax: 949-462-9608

Santa Clara

Santa Clara, CA

Tel: 408-961-6444

Fax: 408-961-6445

Toronto

Mississauga, Ontario,

Canada

Tel: 905-673-0699

Fax: 905-673-6509

ASIA/PACIFIC

Asia Pacific Office

Suites 3707-14, 37th Floor

Tower 6, The Gateway

Harbour City, Kowloon

Hong Kong

Tel: 852-2401-1200

Fax: 852-2401-3431

Australia - Sydney

Tel: 61-2-9868-6733

Fax: 61-2-9868-6755

China - Beijing

Tel: 86-10-8569-7000

Fax: 86-10-8528-2104

China - Chengdu

Tel: 86-28-8665-5511

Fax: 86-28-8665-7889

China - Chongqing

Tel: 86-23-8980-9588

Fax: 86-23-8980-9500

China - Hangzhou

Tel: 86-571-2819-3187

Fax: 86-571-2819-3189

China - Hong Kong SAR

Tel: 852-2401-1200

Fax: 852-2401-3431

China - Nanjing

Tel: 86-25-8473-2460

Fax: 86-25-8473-2470

China - Qingdao

Tel: 86-532-8502-7355

Fax: 86-532-8502-7205

China - Shanghai

Tel: 86-21-5407-5533

Fax: 86-21-5407-5066

China - Shenyang

Tel: 86-24-2334-2829

Fax: 86-24-2334-2393

China - Shenzhen

Tel: 86-755-8203-2660

Fax: 86-755-8203-1760

China - Wuhan

Tel: 86-27-5980-5300

Fax: 86-27-5980-5118

China - Xian

Tel: 86-29-8833-7252

Fax: 86-29-8833-7256

China - Xiamen

Tel: 86-592-2388138

Fax: 86-592-2388130

China - Zhuhai

Tel: 86-756-3210040

Fax: 86-756-3210049

ASIA/PACIFIC

India - Bangalore

Tel: 91-80-3090-4444

Fax: 91-80-3090-4123

India - New Delhi

Tel: 91-11-4160-8631

Fax: 91-11-4160-8632

India - Pune

Tel: 91-20-2566-1512

Fax: 91-20-2566-1513

Japan - Yokohama

Tel: 81-45-471- 6166

Fax: 81-45-471-6122

Korea - Daegu

Tel: 82-53-744-4301

Fax: 82-53-744-4302

Korea - Seoul

Tel: 82-2-554-7200

Fax: 82-2-558-5932 or

82-2-558-5934

Malaysia - Kuala Lumpur

Tel: 60-3-6201-9857

Fax: 60-3-6201-9859

Malaysia - Penang

Tel: 60-4-227-8870

Fax: 60-4-227-4068

Philippines - Manila

Tel: 63-2-634-9065

Fax: 63-2-634-9069

Singapore

Tel: 65-6334-8870

Fax: 65-6334-8850

Taiwan - Hsin Chu

Tel: 886-3-5778-366

Fax: 886-3-5770-955

Taiwan - Kaohsiung

Tel: 886-7-536-4818

Fax: 886-7-330-9305

Taiwan - Taipei

Tel: 886-2-2500-6610

Fax: 886-2-2508-0102

Thailand - Bangkok

Tel: 66-2-694-1351

Fax: 66-2-694-1350

EUROPE

Austria - Wels

Tel: 43-7242-2244-39

Fax: 43-7242-2244-393

Denmark - Copenhagen

Tel: 45-4450-2828

Fax: 45-4485-2829

France - Paris

Tel: 33-1-69-53-63-20

Fax: 33-1-69-30-90-79

Germany - Munich

Tel: 49-89-627-144-0

Fax: 49-89-627-144-44

Italy - Milan

Tel: 39-0331-742611

Fax: 39-0331-466781

Netherlands - Drunen

Tel: 31-416-690399

Fax: 31-416-690340

Spain - Madrid

Tel: 34-91-708-08-90

Fax: 34-91-708-08-91

UK - Wokingham

Tel: 44-118-921-5869

Fax: 44-118-921-5820

Worldwide Sales and Service

08/02/11