MCP6566/6R/6U/7/9 1.8V Low-Power Open-Drain Output Comparator Features: Description: * Propagation Delay at 1.8VDD: - 56 ns (typical) High-to-Low * Low Quiescent Current: 100 A (typical) * Input Offset Voltage: 3 mV (typical) * Rail-to-Rail Input: VSS - 0.3V to VDD + 0.3V * Open-Drain Output * Wide Supply Voltage Range: 1.8V to 5.5V * Available in Single, Dual and Quad * Packages: SC70, SOT-23-5, SOIC, MSOP, TSSOP The Microchip Technology, Inc. MCP6566/6R/6U/7/9 families of open-drain output comparators are offered in single, dual and quad configurations. Typical Applications: Laptop Computers Mobile Phones Hand-held Electronics RC Timers Alarm and Monitoring Circuits Window Comparators Multivibrators This family operates with single supply voltage of 1.8V to 5.5V while drawing less than 100 A/comparator of quiescent current (typical). Package Types MCP6566 SOT-23-5, SC70-5 +IN 3 MCP6566R 4 -IN - MCP656X VIN+ 1 VSS 2 VIN- 3 6 -INB 5 +INB OUTA 1 -INA 2 - + VOUT + - SOIC, TSSOP 5 VSS MCP6566U SOT-23-5 +5VDD VDD OUT 1 VDD 2 +IN 3 +3VPU +INA 3 MCP6569 SOT-23-5 Typical Application VIN 4 -IN 8 VDD 7 OUTB - + VSS 4 Related Device: * Push-Pull Output: MCP6561/1R/1U/2/4 MCP6567 SOIC, MSOP 5 VDD OUTA 1 -INA 2 - * Microchip Advanced Part Selector (MAPS) * Analog Demonstration and Evaluation Boards * Application Notes + OUT 1 VSS 2 Design Aids: + * * * * * * * These comparators are optimized for low-power 1.8V, single-supply applications with greater than rail-to-rail input operation. The internal input hysteresis eliminates output switching due to internal input noise voltage, reducing current draw. The open-drain output of the MCP6566/6R/6U/7/9 family requires a pull-up resistor and it supports pull-up voltages above and below VDD, which can be used to level shift. The output toggle frequency can reach a typical of 4 MHz (typical) while limiting supply current surges and dynamic power consumption during switching. 14 OUTD - + + - +INA 3 13 -IND 12 +IND VDD 4 11 VSS +INB 5 10 +INC -INB 6 5 VDD OUTB 7 - + + - 9 -INC 8 OUTC 4 OUT R2 R3 RF 2009-2013 Microchip Technology Inc. DS22143D-page 1 MCP6566/6R/6U/7/9 NOTES: DS22143D-page 2 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 1.0 ELECTRICAL CHARACTERISTICS 1.1 Maximum Ratings Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. VDD - VSS ....................................................................... 6.5V Open-Drain Output.............................................VSS + 10.5V See Section 4.1.2 "Input Voltage and Current Limits" All other inputs and outputs...........VSS - 0.3V to VDD + 0.3V Analog Input (VIN) .....................VSS - 1.0V to VDD + 1.0V Difference Input voltage ......................................|VDD - VSS| Output Short Circuit Current .................................... 25 mA Current at Input Pins .................................................. 2 mA Current at Output and Supply Pins .......................... 50 mA Storage temperature ................................... -65C to +150C Ambient temp. with power applied .............. -40C to +125C Junction temp............................................................ +150C ESD protection on all pins (HBM/MM)4 kV/300V DC CHARACTERISTICS Electrical Characteristics: Unless otherwise indicated: VDD = +1.8V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD/2, VIN- = VSS, and RPull-Up = 20 k to VPU = VDD (see Figure 1-1). Parameters Symbol Min Typ Max Units VDD 1.8 -- 5.5 V Conditions Power Supply Supply Voltage Quiescent Current per comparator Power Supply Rejection Ratio IQ 60 100 130 A IOUT = 0 PSRR 63 70 -- dB VCM = VSS VOS -10 +10 mV -- V/C VCM = VSS (Note 1) VCM = VSS -- pA Input Input Offset Voltage Input Offset Drift Input Offset Current Input Bias Current VOS/T -- IOS -- 3 2 1 IB -- 1 -- pA TA = +25C, VIN- = VDD/2 -- 60 -- pA VCM = VSS -- 1500 5000 pA TA = +85C, VIN- = VDD/2 TA = +125C, VIN- = VDD/2 VHYST 1.0 -- 5.0 mV VCM = VSS (Notes 1, 2) Input Hysteresis Linear Temp. Co. TC1 -- 10 -- V/C Input Hysteresis Quadratic Temp. Co. TC2 -- 0.3 -- V/C2 Common-Mode Input Voltage Range VCMR Input Hysteresis Voltage Common-Mode Rejection Ratio CMRR VSS0.2 -- VDD+0.2 V VSS0.3 -- VDD+0.3 V VDD = 5.5V 54 66 -- dB VCM= -0.3V to VDD+0.3V, VDD = 5.5V 50 63 -- dB VCM= VDD/2 to VDD+0.3V, VDD = 5.5V VCM= -0.3V to VDD/2, VDD = 5.5V 54 65 -- dB Common Mode Input Impedance ZCM -- 1013||4 -- ||pF Differential Input Impedance ZDIFF -- 1013||2 -- ||pF Note 1: 2: 3: 4: VDD = 1.8V The input offset voltage is the center of the input-referred trip points. The input hysteresis is the difference between the input-referred trip points. VHYST at different temperatures is estimated using VHYST (TA) = VHYST @ +25C + (TA - 25C) TC1 + (TA - 25C)2 TC2. Limit the output current to Absolute Maximum Rating of 50 mA. The pull-up voltage for the open drain output VPULL_UP can be as high as the absolute maximum rating of 10.5V. In this case, IOH_leak can be higher than 1 A (see Figure 2-30). 2009-2013 Microchip Technology Inc. DS22143D-page 3 MCP6566/6R/6U/7/9 DC CHARACTERISTICS (CONTINUED) Electrical Characteristics: Unless otherwise indicated: VDD = +1.8V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD/2, VIN- = VSS, and RPull-Up = 20 k to VPU = VDD (see Figure 1-1). Parameters Symbol Min Typ Max Units VPULL_UP 1.6 VOH -- IOH_leak Conditions -- 5.5 V -- VPULL_UP V (see Figure 1-1) (Notes 3, 4) -- -- 1 A Note 4 VOL -- -- 0.6 V IOUT = 3 mA/8 mA @ VDD = 1.8V/5.5V ISC -- 30 -- mA COUT -- 8 -- pF Push-Pull Output Pull-up Voltage High-Level Output Voltage High-Level Output Current Leakage Low-Level Output Voltage Short Circuit Current (Notes 3) Output Pin Capacitance Note 1: 2: 3: 4: Not to exceed Absolute Max. Rating The input offset voltage is the center of the input-referred trip points. The input hysteresis is the difference between the input-referred trip points. VHYST at different temperatures is estimated using VHYST (TA) = VHYST @ +25C + (TA - 25C) TC1 + (TA - 25C)2 TC2. Limit the output current to Absolute Maximum Rating of 50 mA. The pull-up voltage for the open drain output VPULL_UP can be as high as the absolute maximum rating of 10.5V. In this case, IOH_leak can be higher than 1 A (see Figure 2-30). AC CHARACTERISTICS Electrical Characteristics: Unless otherwise indicated,: Unless otherwise indicated,: VDD = +1.8V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD/2, VIN- = VSS, RPull-Up = 20 k to VPU = VDD, and CL = 25 pf (see Figure 1-1). Parameters Symbol Min Typ Max Units Conditions tPHL -- 56 80 ns VCM= VDD/2, VDD = 1.8V -- 34 80 ns VCM= VDD/2, VDD = 5.5V -- 20 -- ns Propagation Delay High-to-Low,100 mV Overdrive Output Fall Time tF Maximum Toggle Frequency Input Voltage Noise Note 1: 2: fTG ENI -- 4 -- MHz VDD = 5.5V -- 2 -- MHz VDD = 1.8V -- 350 -- VP-P 10 Hz to 10 MHz (Note 1) ENI is based on SPICE simulation. Rise time tR and tPLH depend on the load (RL and CL). These specification are valid for the specified load only. TEMPERATURE SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated: VDD = +1.8V to +5.5V and VSS = GND. Parameters Symbol Min Typ Max Units Specified Temperature Range TA -40 -- +125 C Operating Temperature Range TA -40 -- +125 C Storage Temperature Range TA -65 -- +150 C Thermal Resistance, SC70-5 JA -- 331 -- C/W Thermal Resistance, SOT-23-5 JA -- 220.7 -- C/W Thermal Resistance, 8L-MSOP JA -- 211 -- C/W Thermal Resistance, 8L-SOIC JA -- 149.5 -- C/W Thermal Resistance, 14L-SOIC JA -- 95.3 -- C/W Thermal Resistance, 14L-TSSOP JA -- 100 -- C/W Conditions Temperature Ranges Thermal Package Resistances DS22143D-page 4 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 1.2 Test Circuit Configuration This test circuit configuration is used to determine the AC and DC specifications. VDD MCP656X VPU = VDD 200 k IOUT VOUT 25 pF 200 k VIN = VSS RPU 20 k VSS = 0V FIGURE 1-1: AC and DC Test Circuit for the Open-Drain Output Comparators. 2009-2013 Microchip Technology Inc. DS22143D-page 5 MCP6566/6R/6U/7/9 NOTES: DS22143D-page 6 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD /2, VIN - = GND, RL = 20 k to VPU = VDD , and CL = 25 pF. 40% 30% 30% VDD = 5.5V VCM = VSS Avg. = -0.9 mV StDev = 2.1 mV 3588 units VDD = 1.8V VCM = VSS Avg. = -0.1 mV StDev = 2.1 mV 3588 units Occurrences (%) Occurrences (%) 50% 20% 10% 0% -6 FIGURE 2-1: 40% -4 -2 0 2 VOS (mV) 4 6 8 Input Offset Voltage. 10% 1.0 0% 36 48 Input Offset Voltage Drift. VDD = 5.5V VIN - VOUT 3.0 2.0 1.0 0.0 2.5 3.0 3.5 VHYST (mV) 4.0 4.5 5.0 Input Hysteresis Voltage. Time (3 s/div) Input vs. Output Signal, No 2009-2013 Microchip Technology Inc. VDD = 1.8V Avg. = 12 V/C StDev = 0.6 V/C 20% 1380 Units TA = -40C to 125C VCM = VSS 10% 2 4 6 8 10 12 14 16 VHYST Drift, TC1 (V/C) 18 20 FIGURE 2-5: Input Hysteresis Voltage Drift - Linear Temp. Co. (TC1). 30% 20% 10% VDD = 5.5V VDD = 1.8V Avg. = 0.25 V/C2 2 StDev = 0.1 V/C Avg. = 0.3 V/C StDev = 0.2 V/C 2 2 1380 Units TA = -40C to +125C VCM = VSS 0% -0.50 -1.0 FIGURE 2-3: Phase Reversal. 2.0 30% 0 VIN+ = VDD /2 5.0 VOUT (V) 40% 60 Occurrences (%) FIGURE 2-2: 1.5 VDD = 5.5V Avg. = 10.4 V/C StDev = 0.6 V/C 50% 0% -60 -48 -36 -24 -12 0 12 24 VOS Drift (V/C) 4.0 5% 60% VCM = VSS Avg. = 0.9 V/C StDev = 6.6 V/C 1380 Units TA = -40C to +125C 20% 6.0 10% FIGURE 2-4: 30% 7.0 15% 10 Occurrences (%) Occurrences (%) 50% 20% VDD = 5.5V Avg. = 3.6 mV StDev = 0.1 mV 3588 units 0% -10 -8 60% VDD = 1.8V Avg. = 3.4 mV StDev = 0.2 mV 3588 units 25% -0.25 0.00 0.25 0.50 0.75 VHYST Drift, TC2 (V/C2) 1.00 FIGURE 2-6: Input Hysteresis Voltage Drift - Quadratic Temp. Co. (TC2). DS22143D-page 7 MCP6566/6R/6U/7/9 Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD /2, VIN - = GND, RL = 20 k to VPU = VDD , and CL = 25 pF. 3.0 5.0 VCM = VSS 2.0 VCM = VSS VDD = 1.8V VHYST (mV) V OS (mV) 4.0 1.0 0.0 -1.0 3.0 VDD= 1.8V 2.0 VDD = 5.5V -2.0 VDD= 5.0V -3.0 1.0 -50 -25 0 FIGURE 2-7: Temperature. 4.0 25 50 75 Temperature (C) 100 125 Input Offset Voltage vs. -50 -25 0 FIGURE 2-10: Temperature. 25 50 75 Temperature (C) 5.0 VDD = 1.8V 2.0 TA= +125C 4.0 V HYST (mV) TA= +85C 0.0 TA= +25C TA= -40C -2.0 3.0 TA= +25C 2.0 TA= +85C VDD = 1.8V -4.0 -0.3 0.0 0.3 0.6 0.9 1.2 VCM (V) 1.5 1.8 1.0 -0.3 2.1 FIGURE 2-8: Input Offset Voltage vs. Common-mode Input Voltage. 3.0 TA= +25C 0.0 -1.0 0.9 1.2 VCM (V) 1.5 1.8 2.1 -2.0 3.0 TA= -40C TA= +25C TA= +85C TA= +125C 2.0 TA= +85C TA= +125C 1.0 2.0 3.0 VCM (V) 4.0 5.0 FIGURE 2-9: Input Offset Voltage vs. Common-mode Input Voltage. DS22143D-page 8 0.6 4.0 TA= -40C 1.0 0.0 0.3 5.0 VDD = 5.5V V HYST (mV) VOS (mV) 0.0 TA= -40C FIGURE 2-11: Input Hysteresis Voltage vs. Common-mode Input Voltage. 2.0 -3.0 -1.0 125 Input Hysteresis Voltage vs. TA= +125C VOS (mV) 100 6.0 1.0 -0.5 0.5 1.5 VDD = 5.5V 2.5 3.5 VCM (V) 4.5 5.5 FIGURE 2-12: Input Hysteresis Voltage vs. Common-mode Input Voltage. 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD /2, VIN - = GND, RL = 20 k to VPU = VDD , and CL = 25 pF. 3.0 5.0 0.0 TA= +125C TA= +85C 4.0 TA= -40C TA= +25C TA= +85C TA= +125C 1.0 V HYST (mV) VOS (mV) 2.0 -1.0 TA= +25C 3.0 TA= -40C 2.0 -2.0 -3.0 1.0 1.5 2.5 3.5 VDD (V) 4.5 5.5 1.5 FIGURE 2-13: Input Offset Voltage vs. Supply Voltage vs. Temperature. 4.5 5.5 140.0 VDD = 5.5V Avg. = 97 A StDev= 4 A 1794 units VDD = 1.8V Avg. = 88 A StDev= 4 A 1794 units 40% 30% 20% 120.0 100.0 IQ (A) Occurrences (%) 3.5 VDD (V) FIGURE 2-16: Input Hysteresis Voltage vs. Supply Voltage vs. Temperature. 50% 80.0 60.0 TA= -40C TA= +25C TA= +85C TA= +125C 40.0 10% 20.0 0% 0.0 60 70 FIGURE 2-14: 130 120 80 90 100 IQ (A) 110 120 130 Quiescent Current. 0.0 130 VDD = 1.8V 120 2.0 IQ (A) Sweep VIN+ ,VIN - = VDD/2 90 80 0.0 0.5 1.0 VCM (V) 1.5 2.0 FIGURE 2-15: Quiescent Current vs. Common-mode Input Voltage. 2009-2013 Microchip Technology Inc. 4.0 5.0 6.0 Sweep VIN+ ,VIN - = VDD/2 100 90 Sweep VIN - ,VIN+ = VDD/2 80 Sweep VIN- ,VIN+ = VDD /2 V /2 70 3.0 V DD (V) VDD = 5.5V 110 100 60 -0.5 1.0 FIGURE 2-17: Quiescent Current vs. Supply Voltage vs Temperature. 110 IQ (A) 2.5 70 2.5 60 -1.0 0.0 1.0 2.0 3.0 VCM (V) 4.0 5.0 6.0 FIGURE 2-18: Quiescent Current vs. Common-mode Input Voltage. DS22143D-page 9 MCP6566/6R/6U/7/9 Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD /2, VIN - = GND, RL = 20 k to VPU = VDD , and CL = 25 pF. 150 150 IDD Spike near VPU = 0.9V VDD = 5.5 V VDD = 5.5V VDD = 4.5V VDD = 3.5V 100 VDD = 2.5V VDD = 2.0V VDD = 1.8V 75 -2.5 -0.5 100,000 0dB Output Attenuation 1.5 3.5 VPU - V DD (V) 5.5 7.5 9.5 TA = 10,000 VDD = 5.5V 250 200 VDD = 1.8V 150 VDD = 2.0 V FIGURE 2-22: Quiescent Current vs. Pull-up to Supply Voltage Difference. IOH_leak (pA) IQ (A) 300 VDD = 2.5 V VDD = 1.8 V Quiescent Current vs. 100 mV Over-Drive VCM = VDD/2 RL = Open 350 100 50 -4.5 0.5 1.5 2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 10.5 V PU (V) 400 VDD = 3.5 V 75 50 FIGURE 2-19: Pull-up Voltage. VDD = 4.5 V 125 IQ (A) IQ (A) 125 1,000 TA = +85C 100 TA = +25C 10 100 1 50 10 10 100 100 FIGURE 2-20: Quiescent Current vs. Toggle Frequency. 1000 1.5 2.5 1k 10k 100000 100k 100000 1M 10M 1000 10000 1E+07 Toggle Frequency (Hz) 0 FIGURE 2-23: Pull-up Voltage. 1000 VDD= 1.8V Output Leakage Current vs. VDD= 5.5V 800 VOL (mV) 800 VOL (mV) 3.5 4.5 5.5 6.5 7.5 8.5 9.5 10.5 VPU (V) 600 TA = +125C TA = +85C TA = +25C TA = -40C 400 200 TA = +125C 125C TA = +85C TA = +25C TA = -40C 600 400 200 0 0 0.0 3.0 FIGURE 2-21: Current. DS22143D-page 10 6.0 9.0 IOUT (mA) 12.0 15.0 Output Headroom vs Output 0 FIGURE 2-24: Current. 5 10 15 IOUT (mA) 20 25 Output Headroom Vs Output 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD /2, VIN - = GND, RL = 20 k to VPU = VDD , and CL = 25 pF. 50% VDD = 1.8V 100 mV Over-Drive VCM = VDD /2 40% Occurrences (%) Occurrences (%) 50% tPHL Avg. = 54.4 ns StDev= 2 ns 198 units 30% 20% 10% 0% 40% 30% 20% 10% 0% 30 35 40 45 50 55 60 65 70 75 80 30 35 40 45 Prop. Delay (ns) FIGURE 2-25: Delays. High-to-Low Propagation FIGURE 2-28: Delays. 260 70 75 80 High-to-Low Propagation 100 mV Over-Drive VCM = VDD/2 70 210 Prop. Delay (ns) Prop. Delay (ns) 50 55 60 65 Prop. Delay (ns) 80 VCM = VDD/2 tPHL , VDD = 1.8V 160 110 tPHL , VDD = 5.5V 60 tPHL , VDD = 1.8V 60 50 40 30 10 tPHL , VDD = 5.5V 20 1 10 100 1000 -50 -25 Over-Drive (mV) FIGURE 2-26: Over-Drive. Propagation Delay vs. Input FIGURE 2-29: Temperature. 120 140 VCM = VDD /2 120 100 tPHL , 10 mV Over-Drive 80 60 tPHL , 100 mV Over-Drive 0 25 50 75 Temperature (C) 20 40 0 -40 TA= -40C TA= +25C TA= +85C TA= +125C -120 1.5 FIGURE 2-27: Supply Voltage. 2.5 3.5 V DD (V) 4.5 Propagation Delay vs. 2009-2013 Microchip Technology Inc. 5.5 125 Propagation Delay vs. -80 40 100 TA= -40C TA= +25C TA= +85C TA= +125C 80 ISC (mA) Prop. Delay (ns) VDD= 5.5V 100mV Over-Drive VCM = VDD/2 tPHL Avg. = 33 ns StDev= 1 ns 198 units 0.0 1.0 2.0 3.0 VDD (V) 4.0 5.0 6.0 FIGURE 2-30: Short Circuit Current vs. Supply Voltage vs. Temperature. DS22143D-page 11 MCP6566/6R/6U/7/9 Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD /2, VIN - = GND, RL = 20 k to VPU = VDD , and CL = 25 pF. 80 80 VDD= 1.8V 100 mV Over-Drive 70 Prop. Delay (ns) Prop. Delay (ns) 70 tPHL 60 50 40 20 0.00 tPHL 50 40 20 0.50 1.00 VCM (V) 1.50 2.00 FIGURE 2-31: Propagation Delay vs. Common-mode Input Voltage. 0.0 10000 100mV Over-Drive VCM = VDD /2 VDD = 1.8V, tPHL Prop. Delay (ns) 100 10 VDD = 5.5V, tPHL 1 0.1 0.01 0.001 1 0.01 10 1000 6.0 tPLH Prop. Delay (ns) TA= -40C TA= +25C TA= +85C TA= +125C 10p 1E+01 1.0 10.0 100.0 RPU (k) FIGURE 2-35: Pull-up Resistor. Propagation Delay vs. 10 1E+07 Propagation Delay vs. 100 mV Over-Drive VCM = VDD /2 tPLH, VDD = 5.5V 1000 tPLH, VDD = 1.8V tPHL, VDD = 1.8V 100 tPLH, VDD = 5.5V 10 -0.6 -0.4 -0.2 0 Input Voltage (V) FIGURE 2-33: Input Bias Current vs. Input Voltage vs Temperature. DS22143D-page 12 5.0 tPHL 10000 0.1p 1E-01 -0.8 4.0 100 1m 1E+09 1n 1E+03 3.0 VCM (V) 100 mV Over-Drive VCM = VDD/2 0.1 10m 1E+11 100n 1E+05 2.0 10 0.1 1 10 100 1E+06 1000 100 1000 10000 100000 Capacitive Load (nf) FIGURE 2-32: Capacitive Load. 1.0 FIGURE 2-34: Propagation Delay vs. Common-mode Input Voltage. 1000 Prop. Delay (s) 60 30 30 Input Current (A) VDD= 5.5V 100 mV Over-Drive 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 V PU (V) FIGURE 2-36: Pull-up Voltage. Propagation Delay vs. 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD /2, VIN - = GND, RL = 20 k to VPU = VDD , and CL = 25 pF. 80 30% 78 VCM = VSS VDD = 1.8V to 5.5V 76 Occurrences (%) CMRR/PSRR (dB) Input Referred PSRR 74 CMRR 72 VCM = -0.3V to VDD + 0.3V VDD = 5.5V 20% 10% 70 0 25 50 75 Temperature (C) 100 125 30% VDD = 1.8V 3588 units 20% -4 -3 -2 -1 0 1 2 3 4 5 CMRR (mV/V) VCM = VSS Avg. = 200 V/V StDev= 94 V/V 3588 units 25% -5 15% 10% FIGURE 2-40: Ratio (CMRR). 30% Occurrences (%) -25 FIGURE 2-37: Common-mode Rejection Ratio and Power Supply Rejection Ratio vs. Temperature. Occurrences (%) VCM = -0.2V to VDD /2 Avg. = 0.5 mV StDev= 0.1 mV 0% -50 Common-mode Rejection VCM = VDD/2 to VDD+ 0.3V Avg. = 0.03 mV StDev= 0.7 mV V CM = -0.3V to V DD + 0.3V Avg. = 0.1 mV StDev= 0.4 mV 20% 10% VCM = -0.3V to VDD/2 Avg. = 0.2 mV StDev= 0.4 mV VDD = 5.5V 3588 units 5% 0% -2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 0% -600 -400 -200 0 200 400 600 CMRR (mV/V) PSRR (V/V) FIGURE 2-38: Ratio (PSRR). Power Supply Rejection 1000 FIGURE 2-41: Ratio (CMRR). Common-mode Rejection 10000 IOS and IB (pA) 100 IB 10 1 |I OS| IB @ TA= +85C 100 10 1 |IOS| @ TA= +125C 0.1 |IOS|@ TA= +85C 0.01 0.1 VDD = 5.5V IB @ TA= +125C 1000 IOS and IB (pA) VCM = -0.2V to VDD + 0.2V Avg. = 0.6 mV StDev= 0.1 mV VCM = VDD/2 to VDD+ 0.2V Avg. = 0.7 mV StDev= 1 mV 0.001 25 50 75 100 Temperature (C) 125 FIGURE 2-39: Input Offset Current and Input Bias Current vs. Temperature. 2009-2013 Microchip Technology Inc. 0 1 2 3 V CM (V) 4 5 6 FIGURE 2-42: Input Offset Current and Input Bias Current vs. Common-mode Input Voltage vs. Temperature. DS22143D-page 13 MCP6566/6R/6U/7/9 Note: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25C, VIN+ = VDD /2, VIN - = GND, RL = 20 k to VPU = VDD , and CL = 25 pF. Output Jitter pk-pk (ns) 10000 VDD = 5.5V 1000 VIN+ = 2Vpp (sine) 100 10 1 0.1 100 100 1k 1000 FIGURE 2-43: Frequency. DS22143D-page 14 10k 100k 1M 10000 100000 100000 Input Frequency (Hz) 0 10M 1E+07 Output Jitter vs. Input 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 3.0 PIN DESCRIPTIONS Descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE MCP6566 MCP6566R MCP6566U MCP6567 MCP6569 SC70-5, SOT-23-5 SOT-23-5 SOT-23-5 MSOP, SOIC SOIC, TSSOP 1 1 5 1 1 3.1 Description OUT, OUTA Digital Output (comparator A) 4 4 3 2 2 VIN-, VINA- Inverting Input (comparator A) 3 3 1 3 3 VIN+, VINA+ Non-inverting Input (comparator A) 5 2 4 8 4 VDD -- -- -- 5 5 VINB+ Non-inverting Input (comparator B) Inverting Input (comparator B) Digital Output (comparator B) Positive Power Supply -- -- -- 6 6 VINB- -- -- -- 7 7 OUTB -- -- -- -- 8 OUTC Digital Output (comparator C) -- -- -- -- 9 VINC- Inverting Input (comparator C) -- -- -- -- 10 VINC+ 2 5 2 4 11 VSS -- -- -- -- 12 VIND+ Non-inverting Input (comparator D) -- -- -- -- 13 VIND- Inverting Input (comparator D) -- -- -- -- 14 OUTD Digital Output (comparator D) Analog Inputs The comparator non-inverting and inverting inputs are high-impedance CMOS inputs with low bias currents. 3.2 Symbol Digital Outputs The comparator outputs are CMOS, open-drain digital outputs. They are designed to make level shifting and wired-OR easy to implement. 2009-2013 Microchip Technology Inc. 3.3 Non-inverting Input (comparator C) Negative Power Supply Power Supply (VSS and VDD) The positive power supply pin (VDD) is 1.8V to 5.5V higher than the negative power supply pin (VSS). For normal operation, the other pins are at voltages between VSS and VDD. Typically, these parts are used in a single (positive) supply configuration. In this case, VSS is connected to ground and VDD is connected to the supply. VDD will need a local bypass capacitor (typically 0.01 F to 0.1 F) within 2 mm of the VDD pin. These can share a bulk capacitor with nearby analog parts (within 100 mm), but it is not required. DS22143D-page 15 MCP6566/6R/6U/7/9 NOTES: DS22143D-page 16 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 4.0 APPLICATIONS INFORMATION The MCP6566/6R/6U/7/9 family of open-drain output comparators are fabricated on Microchip's state-of-the-art CMOS process. They are suitable for a wide range of high speed applications requiring lowpower consumption. 4.1 Comparator Inputs 4.1.1 NORMAL OPERATION The input stage of this family of devices uses two differential input stages in parallel. This configuration provides three regions of operation, one operates at low input voltages, one at high input voltages, and one at mid input voltage. With this topology, the input voltage range is 0.3V above VDD and 0.3V below VSS, while providing low offset voltage throughout the common mode range. The input offset voltage is measured at both VSS - 0.3V and VDD + 0.3V to ensure proper operation. 8 7 6 5 4 3 2 1 0 -1 -2 -3 VDD = 5.0V VIN- VOUT Hysteresis 25 20 15 10 5 0 -5 -10 -15 -20 -25 -30 Input Voltage (10 mV/div) Output Voltage (V) The MCP6566/6R/6U/7/9 family has internally-set hysteresis VHYST that is small enough to maintain input offset accuracy and large enough to eliminate output chattering caused by the comparator's own input noise voltage ENI. Figure 4-1 depicts this behavior. Input offset voltage (VOS) is the center (average) of the (input-referred) low-high and high-low trip points. Input hysteresis voltage (VHYST) is the difference between the same trip points. 4.1.2 INPUT VOLTAGE AND CURRENT LIMITS The ESD protection on the inputs can be depicted as shown in Figure 4-2. This structure was chosen to protect the input transistors, and to minimize input bias current (IB). The input ESD diodes clamp the inputs when they try to go more than one diode drop below VSS. They also clamp any voltages that go too far above VDD; their breakdown voltage is high enough to allow normal operation, and low enough to bypass ESD events within the specified limits. VDD Bond Pad VIN+ Bond Pad Input Stage VIN- VSS Bond Pad FIGURE 4-2: Structures. Simplified Analog Input ESD In order to prevent damage and/or improper operation of these amplifiers, the circuits they are in must limit the currents (and voltages) at the VIN+ and VIN- pins (see Section 1.1 "Maximum Ratings " at the beginning of Section 1.0 "Electrical Characteristics"). Figure 4-3 shows the recommended approach to protecting these inputs. The internal ESD diodes prevent the input pins (VIN+ and VIN-) from going too far below ground, and the resistors R1 and R2 limit the possible current drawn out of the input pin. Diodes D1 and D2 prevent the input pin (VIN+ and VIN-) from going too far above VDD. When implemented as shown, resistors R1 and R2 also limit the current through D1 and D2. VDD Time (100 ms/div) FIGURE 4-1: The MCP6566/6R/6U/7/9 comparators' internal hysteresis eliminates output chatter caused by input noise voltage. Bond Pad D1 VPU R4 V1 + VOUT MCP656X R1 - D2 V2 R2 R3 VSS - (minimum expected V1) R1 2 mA R2 VSS - (minimum expected V2) 2 mA FIGURE 4-3: Inputs. 2009-2013 Microchip Technology Inc. Protecting the Analog DS22143D-page 17 MCP6566/6R/6U/7/9 It is also possible to connect the diodes to the left of the resistors R1 and R2. In this case, the currents through the diodes D1 and D2 need to be limited by some other mechanism. The resistor then serves as in-rush current limiter; the DC current into the input pins (VIN+ and VIN-) should be very small. 4.3.1 NON-INVERTING CIRCUIT Figure 4-4 shows a non-inverting circuit for single-supply applications using just two resistors. The resulting hysteresis diagram is shown in Figure 4-5. A significant amount of current can flow out of the inputs when the common mode voltage (VCM) is below ground (VSS); see Figure 4-3. Applications that are high-impedance may need to limit the usable voltage range. VPU VDD RPU - VREF MCP656X VOUT + 4.1.3 PHASE REVERSAL The MCP6566/6R/6U/7/9 comparator family uses CMOS transistors at the input. They are designed to prevent phase inversion when the input pins exceed the supply voltages. Figure 2-3 shows an input voltage exceeding both supplies with no resulting phase inversion. 4.2 R1 Externally Set Hysteresis Greater flexibility in selecting hysteresis (or input trip points) is achieved by using external resistors. Hysteresis reduces output chattering when one input is slowly moving past the other. It also helps in systems where it is best not to cycle between high and low states too frequently (e.g., air conditioner thermostatic control). Output chatter also increases the dynamic supply current. RF FIGURE 4-4: Non-Inverting Circuit with Hysteresis for Single-Supply. Open-Drain Output The open-drain output is designed to make level-shifting and wired-OR logic easy to implement. The output stage minimizes switching current (shoot-through current from supply-to-supply) when the output changes state. See Figures 2-15, 2-18, 2-35 and 2-36, for more information. 4.3 VIN VOUT VDD VOH High-to-Low VOL VSS VSS Low-to-High VIN VTHL VTLH VDD FIGURE 4-5: Hysteresis Diagram for the Non-Inverting Circuit. The trip points for Figures 4-4 and 4-5 are: EQUATION 4-1: R1 R1 VTLH = V REF 1 + ------- - V OL ------- R RF F R1 R 1 VTHL = V REF 1 + ------- - V OH ------- RF RF Where: DS22143D-page 18 VTLH = trip voltage from low-to-high VTHL = trip voltage from high-to-low 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 4.3.2 INVERTING CIRCUIT Where: R2 R3 R 23 = ------------------R2 + R3 Figure 4-6 shows an inverting circuit for single-supply using three resistors. The resulting hysteresis diagram is shown in Figure 4-7. R3 V 23 = ------------------- VDD R 2 + R3 VPU VDD VIN Using this simplified circuit, the trip voltage can be calculated using the following equation: RPU VDD MCP656X VOUT EQUATION 4-2: R2 RF R 23 V THL = V OH ----------------------- + V 23 ---------------------- R + R R 23 23 + R F F RF R3 RF R23 V TLH = V OL ----------------------- + V 23 ---------------------- R + R R 23 23 + R F F FIGURE 4-6: Hysteresis. Where: Inverting Circuit with VTLH = trip voltage from low-to-high VTHL = trip voltage from high-to-low VOUT Figure 2-21 and Figure 2-24 can be used to determine typical values for VOH and VOL. VDD VOH Low-to-High VOL VSS VSS 4.4 High-to-Low VIN VTLH VTHL FIGURE 4-7: Inverting Circuit. VDD Hysteresis Diagram for the In order to determine the trip voltages (VTHL and VTLH) for the circuit shown in Figure 4-6, R2 and R3 can be simplified to the Thevenin equivalent circuit with respect to VDD, as shown in Figure 4-8. VPU VDD Bypass Capacitors With this family of comparators, the power supply pin (VDD for single supply) should have a local bypass capacitor (i.e., 0.01 F to 0.1 F) within 2 mm for good edge rate performance. 4.5 Capacitive Loads Reasonable capacitive loads (e.g., logic gates) have little impact on propagation delay (see Figure 2-32). The supply current increases with increasing toggle frequency (Figure 2-20), especially with higher capacitive loads. The output slew rate and propagation delay performance will be reduced with higher capacitive loads. RPU MCP656X + VSS VOUT V23 R23 FIGURE 4-8: RF Thevenin Equivalent Circuit. 2009-2013 Microchip Technology Inc. DS22143D-page 19 MCP6566/6R/6U/7/9 4.6 PCB Surface Leakage 4.7 In applications where low input bias current is critical, PCB (Printed Circuit Board) surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity conditions, a typical resistance between nearby traces is 1012. A 5V difference would cause 5 pA of current to flow. This is greater than the MCP6566/6R/6U/7/9 family's bias current at +25C (1 pA, typical). The easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 4-9. IN- IN+ VSS When designing the PCB layout, it is critical to note that analog and digital signal traces are adequately separated to prevent signal coupling. If the comparator output trace is at close proximity to the input traces, then large output voltage changes from, VSS to VDD or visa versa, may couple to the inputs and cause the device output to oscillate. To prevent such oscillation, the output traces must be routed away from the input pins. The SC70-5 and SOT-23-5 are relatively immune because the output pin OUT (pin 1) is separated by the power pin VDD/VSS (pin 2) from the input pin +IN (as long as the analog and digital traces remain separated throughout the PCB). However, the pinouts for the dual and quad packages (SOIC, MSOP, TSSOP) have OUT and -IN pins (pin 1 and 2) close to each other. The recommended layout for these packages is shown in Figure 4-10. OUTA VDD -INA OUTB +INA -INB VSS +INB Guard Ring FIGURE 4-9: Example Guard Ring Layout for Inverting Circuit. 1. 2. Inverting Configuration (Figures 4-6 and 4-9): a) Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the comparator (e.g., VDD/2 or ground). b) Connect the inverting pin (VIN-) to the input pad without touching the guard ring. Non-inverting Configuration (Figure 4-4): a) Connect the non-inverting pin (VIN+) to the input pad without touching the guard ring. b) Connect the guard ring to the inverting input pin (VIN-). PCB Layout Technique FIGURE 4-10: 4.8 Recommended Layout. Unused Comparators An unused amplifier in a quad package (MCP6569) should be configured as shown in Figure 4-11. This circuit prevents the output from toggling and causing crosstalk. It uses the minimum number of components and draws minimal current (see Figure 2-15 and Figure 2-15). 1/4 MCP6569 VDD - + FIGURE 4-11: DS22143D-page 20 Unused Comparators. 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 4.9 Typical Applications 4.9.1 4.9.3 PRECISE COMPARATOR Some applications require higher DC precision. An easy way to solve this problem is to use an amplifier (such as the MCP6291) to gain-up the input signal before it reaches the comparator. Figure 4-12 shows an example of this approach. BISTABLE MULTIVIBRATOR A simple bistable multivibrator design is shown in Figure 4-14. VREF needs to be between the power supplies (VSS = GND and VDD) to achieve oscillation. The output duty cycle changes with VREF. VPU R1 VDD R2 VREF VREF MCP6291 RPU VDD VPU VDD MCP656X RPU VOUT VIN R1 R2 VOUT MCP656X VREF FIGURE 4-12: Comparator. 4.9.2 C1 Precise Inverting FIGURE 4-14: R3 Bistable Multivibrator. WINDOWED COMPARATOR Figure 4-13 shows one approach to designing a windowed comparator. The AND gate produces a logic `1' when the input voltage is between VRB and VRT (where VRT > VRB). VRT 1/2 MCP6567 VPU RPU VOUT VIN VRB FIGURE 4-13: 1/2 MCP6567 Windowed Comparator. 2009-2013 Microchip Technology Inc. DS22143D-page 21 MCP6566/6R/6U/7/9 NOTES: DS22143D-page 22 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 5.0 DESIGN AIDS 5.3 5.1 Microchip Advanced Part Selector (MAPS) The following Microchip Application Note is available on the Microchip web site at www.microchip.com and is recommended as a supplemental reference resource: MAPS is a software tool that helps semiconductor professionals efficiently identify Microchip devices that fit a particular design requirement. Available at no cost from the Microchip web site at www.microchip.com/ maps, the MAPS is an overall selection tool for Microchip's product portfolio that includes Analog, Memory, MCUs and DSCs. Using this tool you can define a filter to sort features for a parametric search of devices and export side-by-side technical comparison reports. Helpful links are also provided for data sheets, purchase, and sampling of Microchip parts. 5.2 Application Notes * AN895, "Oscillator Circuit For RTD Temperature Sensors", DS00895. Analog Demonstration and Evaluation Boards Microchip offers a broad spectrum of Analog Demonstration and Evaluation Boards that are designed to help you achieve faster time to market. For a complete listing of these boards and their corresponding user's guides and technical information, visit the Microchip web site at www.microchip.com/ analogtools. Three of our boards that are especially useful are: * 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board, P/N SOIC8EV * 14-Pin SOIC/TSSOP/DIP Evaluation Board, P/N SOIC14EV * 5/6-Pin SOT23 Evaluation Board, P/N VSUPEV2 2009-2013 Microchip Technology Inc. DS22143D-page 23 MCP6566/6R/6U/7/9 NOTES: DS22143D-page 24 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 6.0 PACKAGING INFORMATION 6.1 Package Marking Information 5-Lead SC70 (MCP6566) Example: BJ25 XXNN 5-Lead SOT-23 (MCP6566, MCP6566R) Device XXNN Example: Code MCP6566T JYNN MCP6566RT JZNN MCP6566UT WLNN JY25 Note: Applies to 5-Lead SOT-23. 8-Lead MSOP (MCP6567) Example: XXXXXX 6567E YWWNNN 302256 8-Lead SOIC (150 mil) (MCP6567) MCP6567E e3 SN^^1302 256 XXXXXXXX XXXXYYWW NNN Legend: XX...X Y YY WW NNN e3 * Note: Example: Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 2009-2013 Microchip Technology Inc. DS22143D-page 25 MCP6566/6R/6U/7/9 Package Marking Information (Continued) 14-Lead SOIC (150 mil) (MCP6569) Example: MCP6569 E/SL^^ e3 1302256 XXXXXXXXXX XXXXXXXXXX YYWWNNN 14-Lead TSSOP (MCP6569) XXXXXXXX YYWW NNN DS22143D-page 26 Example: MCP6569E 1302 256 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 . # #$ # /! - 0 # 1/ %# #!# ## +22--- 2 / D b 3 1 2 E1 E 4 5 e A e A2 c A1 L 3# 4# 5$8 %1 44" " 5 5 56 7 ( 1# 6, : # ; < ; < < !!1/ / #! %% 9()* 6, =!# " ; !!1/=!# " ( ( ( 6, 4# ; ( . 4 9 #4# 4! / 4!=!# ; < 9 8 ( < !"! #$! !% # $ !% # $ !# "'( )*+ ) #&#,$ --# $## #&! ! 2009-2013 Microchip Technology Inc. - *9) DS22143D-page 27 MCP6566/6R/6U/7/9 . # #$ # /! - 0 # 1/ %# #!# ## +22--- 2 / DS22143D-page 28 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 ! . # #$ # /! - 0 # 1/ %# #!# ## +22--- 2 / b N E E1 3 2 1 e e1 D A2 A c A1 L L1 3# 4# 5$8 %1 44" " 5 56 7 5 ( 4!1# ()* 6$# !4!1# 6, : # < ; < < ( 6, =!# " < !!1/=!# " < ; 6, 4# < !!1/ / #! %% )* ( . #4# 4 < 9 . # # 4 ( < ; . # > < > ; < 9 4! / 4!=!# 8 < ( !"! #$! !% # $ !% # $ #&! ! !# "'( )*+ ) #&#,$ --# $## 2009-2013 Microchip Technology Inc. - *) DS22143D-page 29 MCP6566/6R/6U/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22143D-page 30 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2009-2013 Microchip Technology Inc. DS22143D-page 31 MCP6566/6R/6U/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22143D-page 32 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2009-2013 Microchip Technology Inc. DS22143D-page 33 MCP6566/6R/6U/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22143D-page 34 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2009-2013 Microchip Technology Inc. DS22143D-page 35 MCP6566/6R/6U/7/9 " #$%!&'()* . # #$ # /! - 0 # 1/ %# #!# ## +22--- 2 / DS22143D-page 36 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2009-2013 Microchip Technology Inc. DS22143D-page 37 MCP6566/6R/6U/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22143D-page 38 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 . # #$ # /! - 0 # 1/ %# #!# ## +22--- 2 / 2009-2013 Microchip Technology Inc. DS22143D-page 39 MCP6566/6R/6U/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22143D-page 40 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2009-2013 Microchip Technology Inc. DS22143D-page 41 MCP6566/6R/6U/7/9 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22143D-page 42 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 APPENDIX A: REVISION HISTORY Revision D (February 2013) The following is the list of modifications: 1. Added the Analog Input (VIN) parameter in Section 1.0 "Electrical Characteristics". Revision C (February 2011) The following is the list of modifications: 1. Replaced the MCP5468 package name with the correct MCP6567 package name on page 1 and in Table 3-1. Revision B (August 2009) The following is the list of modifications: 1. 2. Added MCP6566U throughout the document. Updated package outline drawings. Revision A (March 2009) * Original Release of this Document. 2009-2013 Microchip Technology Inc. DS22143D-page 43 MCP6566/6R/6U/7/9 NOTES: DS22143D-page 44 2009-2013 Microchip Technology Inc. MCP6566/6R/6U/7/9 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device Device: X /XX Temperature Range Package - Single Comparator (Tape and Reel) (SC70, SOT-23) MCP6566RT: Single Comparator (Tape and Reel) (SOT-23 only) MCP6566UT: Single Comparator (Tape and Reel) (SOT-23 only) MCP6567: Dual Comparator MCP6567T: Dual Comparator (Tape and Reel) MCP6569: Quad Comparator MCP6569T: Quad Comparator (Tape and Reel) Examples: a) MCP6566T-E/LT: b) MCP6566T-E/OT: a) MCP6566RT-E/OT: Tape and Reel Extended Temperature, 5LD SOT-23 package. a) MCP6566UT-E/OT: Tape and Reel Extended Temperature, 5LD SOT-23 package. a) MCP6567-E/MS: b) MCP6567-E/SN: a) MCP6569T-E/SL: b) MCP6569T-E/ST: MCP6566T: Temperature Range: E = -40C to +125C Package: LT OT MS SN ST SL = = = = = = Plastic Small Outline Transistor (SC70), 5-lead Plastic Small Outline Transistor (SOT-23), 5-lead Plastic Micro Small Outline Transistor, 8-lead Plastic Small Outline Transistor, 8-lead Plastic Thin Shrink Small Outline Transistor, 14-lead Plastic Small Outline Transistor, 14-lead 2009-2013 Microchip Technology Inc. Tape and Reel, Extended Temperature, 5LD SC70 package. Tape and Reel Extended Temperature, 5LD SOT-23 package. Extended Temperature 8LD MSOP package. Extended Temperature 8LD SOIC package. Tape and Reel Extended Temperature 14LD SOIC package. Tape and Reel Extended Temperature 14LD TSSOP package. DS22143D-page 45 MCP6566/6R/6U/7/9 NOTES: DS22143D-page 46 2009-2013 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * Microchip products meet the specification contained in their particular Microchip Data Sheet. * Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. * There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. * Microchip is willing to work with the customer who is concerned about the integrity of their code. * Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MTP, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. Analog-for-the-Digital Age, Application Maestro, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O, Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA and Z-Scale are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. GestIC and ULPP are registered trademarks of Microchip Technology Germany II GmbH & Co. & KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. (c) 2009-2013, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-62077-030-6 QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 == 2009-2013 Microchip Technology Inc. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. DS22143D-page 47 Worldwide Sales and Service AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://www.microchip.com/ support Web Address: www.microchip.com Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Harbour City, Kowloon Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 India - Bangalore Tel: 91-80-3090-4444 Fax: 91-80-3090-4123 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 India - Pune Tel: 91-20-2566-1512 Fax: 91-20-2566-1513 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Japan - Osaka Tel: 81-6-6152-7160 Fax: 81-6-6152-9310 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Cleveland Independence, OH Tel: 216-447-0464 Fax: 216-447-0643 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Indianapolis Noblesville, IN Tel: 317-773-8323 Fax: 317-773-5453 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8569-7000 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 China - Chongqing Tel: 86-23-8980-9588 Fax: 86-23-8980-9500 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Korea - Daegu Tel: 82-53-744-4301 Fax: 82-53-744-4302 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 China - Hangzhou Tel: 86-571-2819-3187 Fax: 86-571-2819-3189 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 China - Hong Kong SAR Tel: 852-2943-5100 Fax: 852-2401-3431 Malaysia - Kuala Lumpur Tel: 60-3-6201-9857 Fax: 60-3-6201-9859 China - Nanjing Tel: 86-25-8473-2460 Fax: 86-25-8473-2470 Malaysia - Penang Tel: 60-4-227-8870 Fax: 60-4-227-4068 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 Taiwan - Hsin Chu Tel: 886-3-5778-366 Fax: 886-3-5770-955 China - Shenzhen Tel: 86-755-8864-2200 Fax: 86-755-8203-1760 Taiwan - Kaohsiung Tel: 886-7-213-7828 Fax: 886-7-330-9305 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 Taiwan - Taipei Tel: 886-2-2508-8600 Fax: 886-2-2508-0102 China - Xian Tel: 86-29-8833-7252 Fax: 86-29-8833-7256 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 UK - Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820 China - Xiamen Tel: 86-592-2388138 Fax: 86-592-2388130 China - Zhuhai Tel: 86-756-3210040 Fax: 86-756-3210049 DS22143D-page 48 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Japan - Tokyo Tel: 81-3-6880- 3770 Fax: 81-3-6880-3771 11/29/12 2009-2013 Microchip Technology Inc.