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SN65176B
,
SN75176B
SLLS101F –JULY 1985–REVISED JANUARY 2015
SNx5176B Differential Bus Transceivers
1 Features 3 Description
The SN65176B and SN75176B differential bus
1• Bidirectional Transceivers transceivers are designed for bidirectional data
• Meet or Exceed the Requirements of ANSI communication on multipoint bus transmission lines.
Standards TIA/EIA-422-B and TIA/EIA-485-A They are designed for balanced transmission lines
and ITU Recommendations V.11 and X.27 and meet ANSI Standards TIA/EIA-422-B and
TIA/EIA-485-A and ITU Recommendations V.11 and
• Designed for Multipoint Transmission on X.27.
Long Bus Lines in Noisy Environments
• 3-State Driver and Receiver Outputs The SN65176B and SN75176B devices combine a 3-
state differential line driver and a differential input line
• Individual Driver and Receiver Enables receiver, both of which operate from a single 5-V
• Wide Positive and Negative Input/Output Bus power supply. The driver and receiver have active-
Voltage Ranges high and active-low enables, respectively, that can be
• ± 60-mA Max Driver Output Capability connected together externally to function as a
direction control. The driver differential outputs and
• Thermal Shutdown Protection the receiver differential inputs are connected
• Driver Positive and Negative Current Limiting internally to form differential input/output (I/O) bus
• 12-kΩMin Receiver Input Impedance ports that are designed to offer minimum loading to
the bus when the driver is disabled or VCC = 0. These
• ± 200-mV Receiver Input Sensitivity ports feature wide positive and negative common-
• 50-mV Typ Receiver Input Hysteresis mode voltage ranges, making the device suitable for
• Operate From Single 5-V Supply party-line applications.
The driver is designed for up to 60 mA of sink or
2 Applications source current. The driver features positive and
• Chemical/Gas Sensors negative current limiting and thermal shutdown for
• Digital Signage protection from line-fault conditions. Thermal
shutdown is designed to occur at a junction
• HMI (Human Machine Interfaces) temperature of approximately 150°C. The receiver
• Motor Controls: AC Induction, Brushed and Brush- features a minimum input impedance of 12 kΩ, an
less DC, Low- and High-Voltage, Stepper Motors, input sensitivity of ±200 mV, and a typical input
and Permanent Magnets hysteresis of 50 mV.
• TETRA Base Stations Device Information(1)
• Telecom Towers: Remote Electrical Tilt Units PART NUMBER PACKAGE (PIN) BODY SIZE (NOM)
(RET) and Tower Mounted Amplifiers (TMA) SOIC (8) 4.90 mm × 3.91 mm
• Weigh Scales SNx5176 PDIP (8) 9.81 mm × 6.35 mm
• Wireless Repeaters SOP (8) 6.20 mm × 5.30 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
4 Simplified Schematic
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN65176B
,
SN75176B
SLLS101F –JULY 1985–REVISED JANUARY 2015
www.ti.com
Table of Contents
9.2 Functional Block Diagram....................................... 12
1 Features.................................................................. 19.3 Feature Description................................................. 12
2 Applications ........................................................... 19.4 Device Functional Modes........................................ 13
3 Description............................................................. 110 Application and Implementation........................ 14
4 Simplified Schematic............................................. 110.1 Application Information.......................................... 14
5 Revision History..................................................... 210.2 Typical Application ............................................... 14
6 Pin Configuration and Functions......................... 310.3 System Examples ................................................. 15
7 Specifications......................................................... 411 Power Supply Recommendations ..................... 16
7.1 Absolute Maximum Ratings ...................................... 412 Layout................................................................... 16
7.2 Recommended Operating Conditions....................... 412.1 Layout Guidelines ................................................. 16
7.3 Thermal Information.................................................. 412.2 Layout Example .................................................... 16
7.4 Electrical Characteristics – Driver............................. 513 Device and Documentation Support ................. 16
7.5 Electrical Characteristics – Receiver ........................ 613.1 Related Links ........................................................ 16
7.6 Switching Characteristics – Driver............................ 613.2 Trademarks........................................................... 16
7.7 Switching Characteristics – Receiver........................ 613.3 Electrostatic Discharge Caution............................ 16
7.8 Typical Characteristics.............................................. 713.4 Glossary................................................................ 16
8 Parameter Measurement Information .................. 914 Mechanical, Packaging, and Orderable
9 Detailed Description............................................ 12 Information ........................................................... 16
9.1 Overview................................................................. 12
5 Revision History
Changes from Revision E (January 2014) to Revision F Page
• Added Applications,Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table,
Feature Description section, Device Functional Modes,Application and Implementation section, Power Supply
Recommendations section, Layout section, Device and Documentation Support section, and Mechanical,
Packaging, and Orderable Information section. ..................................................................................................................... 1
• Moved Typical Characteristics inside of the Specifications section. ...................................................................................... 7
Changes from Revision D (April 2003) to Revision E Page
• Updated document to new TI data sheet format - no specification changes......................................................................... 1
• Deleted Ordering Information table. ....................................................................................................................................... 1
• Added ESD warning............................................................................................................................................................. 16
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1
2
3
4
8
7
6
5
R
RE
DE
D
VCC
B
A
GND
SN65176B
,
SN75176B
www.ti.com
SLLS101F –JULY 1985–REVISED JANUARY 2015
6 Pin Configuration and Functions
Top View
Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
R 1 O Logic Data Output from RS-485 Receiver
RE 2 I Receive Enable (active low)
DE 3 I Driver Enable (active high)
D 4 I Logic Data Input to RS-485 Driver
GND 5 — Device Ground Pin
A 6 I/O RS-422 or RS-485 Data Line
B 7 I/O RS-422 or RS-485 Data Line
VCC 8 — Power Input. Connect to 5-V Power Source.
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VCC Supply voltage(2) 7 V
Voltage range at any bus terminal –10 15 V
VIEnable input voltage 5.5 V
TJOperating virtual junction temperature 150 °C
Tstg Storage temperature range –65 150 °C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential input/output bus voltage, are with respect to network ground terminal.
7.2 Recommended Operating Conditions MIN TYP MAX UNIT
VCC Supply voltage 4.75 5 5.25 V
VIor VIC Voltage at any bus terminal (separately or common mode) -7 12 V
VIH High-level input voltage D, DE, and RE 2 V
VIL Low-level input voltage D, DE, and RE 0.8 V
VID Differential input voltage(1) ±12 V
Driver –60 mA
IOH High-level output current Receiver –400 µA
Driver 60
IOL Low-level output current mA
Receiver 8
SN65176B –40 105
TAOperating free-air temperature °C
SN75176B 0 70
(1) Differential input/output bus voltage is measured at the non-inverting terminal A, with respect to the inverting terminal B.
7.3 Thermal Information SNx5176
THERMAL METRIC(1) BD BP BPS UNIT
8 PINS
RθJA Junction-to-ambient thermal resistance 97 85 95 °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report (SPRA953).
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7.4 Electrical Characteristics – Driver
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS(1) MIN TYP(2) MAX UNIT
VIK Input clamp voltage II= –18 mA –1.5 V
VOOutput voltage IO= 0 0 6 V
|VOD1| Differential output voltage IO= 0 1.5 3.6 6 V
RL= 100 Ω, see Figure 10 ½ VOD1 or 2 (3)
|VOD2| Differential output voltage V
RL= 54 Ω, see Figure 10 1.5 2.5 5
VOD3 Differential output voltage See (4) 1.5 5 V
Change in magnitude of
∆|VOD| RL= 54 Ωor 100 Ω, see Figure 10 ±0.2 V
differential output voltage(5)
VOC Common-mode output voltage RL= 54 Ωor 100 Ω, see Figure 10 -1 +3 V
Change in magnitude of
∆|VOC| common-mode output RL= 54 Ωor 100 Ω, see Figure 10 ±0.2 V
voltage(5)
VO= 12 V 1
IOOutput current Output disabled(6) mA
VO= –7 V –0.8
IIH High-level input current VI= 2.4 V 20 µA
IIL Low-level input current VI= 0.4 V –400 µA
VO= –7 V –250
VO= 0 –150
IOS Short-circuit output current mA
VO= VCC 250
VO= 12 V 250
Outputs enabled 42 70
ICC Supply current (total package) No load mA
Outputs disabled 26 35
(1) The power-off measurement in ANSI Standard TIA/EIA-422-B applies to disabled outputs only and is not applied to combined inputs and
outputs.
(2) All typical values are at VCC = 5 V and TA= 25°C.
(3) The minimum VOD2 with a 100-Ωload is either ½ VOD1 or 2 V, whichever is greater.
(4) See ANSI Standard TIA/EIA-485-A, Figure 3.5, Test Termination Measurement 2.
(5) Δ|VOD| and Δ|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level
to a low level.
(6) This applies for both power on and off; refer to ANSI Standard TIA/EIA-485-A for exact conditions. The TIA/EIA-422-B limit does not
apply for a combined driver and receiver terminal.
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7.5 Electrical Characteristics – Receiver
over recommended ranges of common-mode input voltage, supply voltage, and operating free-air temperature (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
VIT+ Positive-going input threshold voltage VO= 2.7 V, IO= –0.4 mA 0.2 V
VIT– Negative-going input threshold voltage VO= 0.5 V, IO= 8 mA –0.2(2) V
Vhys Input hysteresis voltage (VIT+ – VIT–) 50 mV
VIK Enable Input clamp voltage II= –18 mA –1.5 V
VOH High-level output voltage VID = 200 mV, IOH = –400 µA, see Figure 11 2.7 V
VOL Low-level output voltage VID = –200 mV, IOL = 8 mA, see Figure 11 0.45 V
IOZ High-impedance-state output current VO= 0.4 V to 2.4 V ±20 µA
VI= 12 V 1
IILine input current Other input = 0 V(3) mA
VI= –7 V –0.8
IIH High-level enable input current VIH = 2.7 V 20 µA
IIL Low-level enable input current VIL = 0.4 V –100 µA
rIInput resistance VI= 12 V 12 kΩ
IOS Short-circuit output current –15 –85 mA
Outputs enabled 42 55
ICC Supply current (total package) No load mA
Outputs disabled 26 35
(1) All typical values are at VCC = 5 V, TA= 25°C.
(2) The algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for common-
mode input voltage and threshold voltage levels only.
(3) This applies for both power on and power off. Refer to EIA Standard TIA/EIA-485-A for exact conditions.
7.6 Switching Characteristics – Driver
VCC = 5 V, RL= 110 Ω, TA= 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
td(OD) Differential-output delay time RL= 54 Ω, see Figure 12 15 22 ns
tt(OD) Differential-output transition time RL= 54 Ω, see Figure 12 20 30 ns
tPZH Output enable time to high level See Figure 13 85 120 ns
tPZL Output enable time to low level See Figure 14 40 60 ns
tPHZ Output disable time from high level See Figure 13 150 250 ns
tPLZ Output disable time from low level See Figure 14 20 30 ns
7.7 Switching Characteristics – Receiver
VCC = 5 V, CL= 15 pF, TA= 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low- to high-level output 21 35
VID = 0 to 3 V, see Figure 15 ns
tPHL Propagation delay time, high- to low-level output 23 35
tPZH Output enable time to high level 10 20
See Figure 16 ns
tPZL Output enable time to low level 12 20
tPHZ Output disable time from high level 20 35
See Figure 16 ns
tPLZ Output disable time from low level 17 25
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4
3
2
1
100806040200–20
0
120
5
TA– Free-Air Temperature – C°
–40
VCC = 5 V
VID = 200 mV
IOH = –440 Aµ
VOH – High-Level Output Voltage – V
V
OH
4.5
3.5
2.5
1.5
0.5
TA= 25°C
VCC = 5 V
0.5
0.4
0.3
0.2
0.1
252015105
0
30
0.6
IOL – Low-Level Output Current – mA
0
VOL – Low-Level Output Voltage – V
VOL
VOD – Differential Output Voltage – V
3.5
3
2.5
2
1.5
1
0.5
908070605040302010
0100
4
IO– Output Current – mA
0
V
OD
VCC = 5 V
TA= 25°C
VOH – High-Level Output Voltage – V
VCC = 5 V
4.5
4
3.5
3
2.5
2
1.5
1
0.5
–100–80–60–40–20
0–120
5
IOH – High-Level Output Current – mA
0
V
OH
TA= 25°C
VCC = 5 V
TA= 25°C
IOL – Low-Level Output Current – mA
0 12020 40 60 80 100
5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
– Low-Level Output Voltage – V
V
OL
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,
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SLLS101F –JULY 1985–REVISED JANUARY 2015
7.8 Typical Characteristics
Figure 1. Driver High-Level Output Voltage Figure 2. Driver Low-Level Output Voltage
vs vs
High-Level Output Current Low-Level Output Current
Figure 3. Driver Differential Output Voltage Figure 4. Receiver High-Level Output Voltage
vs vs
Output Current High-Level Output Current
Only the 0°C to 70°C portion of the curve applies to the
Only the 0°C to 70°C portion of the curve applies to the SN75176B device.
SN75176B device.
Figure 6. Receiver Low-Level Output Voltage
Figure 5. Receiver High-Level Output Voltage vs
vs Low-Level Output Current
Free-Air Temperature
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VO – Output Voltage – V
5
4
3
2
1
2.521.510.5
03
6
VI– Enable Voltage – V
0
VO
Load = 1 kΩto VCC
VCC = 5 V
VCC = 5.25 V
TA= 25°C
VID = –0.2 V
VCC = 4.75 V
VOL – Low-Level Output Voltage – V
VID = –200 mV
VCC = 5 V
TA– Free-Air Temperature – C°
0.6
0
0.1
0.2
0.3
0.4
0.5
100806040200–20 120–40
VOL
IOL = 8 mA
VO – Output Voltage – V
VCC = 5 V
VCC = 5.25 V
TA= 25°C
VID = 0.2 V
0
VI– Enable Voltage – V
30.5 1 1.5 2 2.5
4
3
2
1
0
5
VO
Load = 8 kΩto GND
VCC = 4.75 V
SN65176B
,
SN75176B
SLLS101F –JULY 1985–REVISED JANUARY 2015
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Typical Characteristics (continued)
Figure 8. Receiver Output Voltage
Figure 7. Receiver Low-Level Output Voltage vs
vs Enable Voltage
Free-Air Temperature
Figure 9. Receiver Output Voltage
vs
Enable Voltage
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VOLTAGE WAVEFORMS
tPHZ
1.5 V
2.3 V
0.5 V
0 V
3 V
tPZH
Output
Input 1.5 V
S1
0 V or 3 V
Output
CL= 50 pF
(see Note A)
TEST CIRCUIT
50 Ω
VOH
Voff ≈0 V
RL= 110 Ω
Generator
(see Note B)
3 V
VOLTAGE WAVEFORMS
tt(OD)
td(OD)
1.5 V
10%
tt(OD)
≈2.5 V
≈–2.5 V
90%
50%
Output
td(OD)
0 V
3 V
1.5 V
Input
TEST CIRCUIT
Output
CL= 50 pF
(see Note A)
50 Ω
RL= 54 Ω
Generator
(see Note B) 50%
10%
ID
VOL
VOH
–IOH
+IOL
2
RL
VOD2
VOC
2
RL
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SLLS101F –JULY 1985–REVISED JANUARY 2015
8 Parameter Measurement Information
Figure 10. Driver VOD and VOC
Figure 11. Receiver VOH and VOL
A. CLincludes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR ≤1 MHz, 50% duty cycle, tr≤6
ns, tf≤6 ns, ZO= 50 Ω.
Figure 12. Driver Test Circuit and Voltage Waveforms
A. CLincludes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR ≤1 MHz, 50% duty cycle, tr≤6
ns, tf≤6 ns, ZO= 50 Ω.
Figure 13. Driver Test Circuit and Voltage Waveforms
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VOLTAGE WAVEFORMS
1.3 V
0 V
3 V
VOL
VOH
tPHL
tPLH
1.5 V
Output
Input
TEST CIRCUIT
CL= 15 pF
(see Note A)
Output
0 V
1.5 V
51 Ω
Generator
(see Note B)
1.5 V
1.3 V
VOLTAGE WAVEFORMS
5 V
VOL
0.5 V
tPZL
3 V
0 V
tPLZ
2.3 V
1.5 V
Output
Input
TEST CIRCUIT
Output
RL= 110 Ω
5 V
S1
CL= 50 pF
(see Note A)
50 Ω
3 V or 0 V
Generator
(see Note B)
1.5 V
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,
SN75176B
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Parameter Measurement Information (continued)
A. CLincludes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR ≤1 MHz, 50% duty cycle, tr≤6
ns, tf≤6 ns, ZO= 50 Ω.
Figure 14. Driver Test Circuit and Voltage Waveforms
A. CLincludes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR ≤1 MHz, 50% duty cycle, tr≤6
ns, tf≤6 ns, ZO= 50 Ω.
Figure 15. Receiver Test Circuit and Voltage Waveforms
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VOH
0.5 V
≈1.3 V
tPHZ
Output
Input 1.5 V
0 V
3 V
S1 to 1.5 V
S2 Closed
S3 Closed
tPLZ
≈1.3 V
VOL
0.5 V
Output
Input 1.5 V
0 V
3 V
≈4.5 V
VOL
1.5 V
S3 Open
S2 Closed
S1 to –1.5 V
0 V
1.5 V
3 V
tPZL
Output
Input
0 V
1.5 V
VOH
0 V
Output
Input
tPZH S3 Closed
S2 Open
S1 to 1.5 V
1.5 V
3 V
TEST CIRCUIT
50 Ω
1N916 or Equivalent
S3
5 V
S2
2 kΩ
5 kΩ
S1
–1.5 V
1.5 V
VOLTAGE WAVEFORMS
S1 to –1.5 V
S2 Closed
S3 Closed
Generator
(see Note B)
CL= 15 pF
(see Note A)
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SLLS101F –JULY 1985–REVISED JANUARY 2015
Parameter Measurement Information (continued)
A. CLincludes probe and jig capacitance.
B. The input pulse is supplied by a generator having the following characteristics: PRR ≤1 MHz, 50% duty cycle, tr≤6
ns, tf≤6 ns, ZO= 50 Ω.
Figure 16. Receiver Test Circuit and Voltage Waveforms
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DE
RE
R
6
7
3
1
2
B
A
Bus
D
4
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,
SN75176B
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9 Detailed Description
9.1 Overview
The SN65176B and SN75176B differential bus transceivers are integrated circuits designed for bidirectional data
communication on multipoint bus transmission lines. They are designed for balanced transmission lines and meet
ANSI Standards TIA/EIA-422-B and TIA/EIA-485-A and ITU Recommendations V.11 and X.27.
The SN65176B and SN75176B devices combine a 3-state differential line driver and a differential input line
receiver, both of which operate from a single 5-V power supply. The driver and receiver have active-high and
active-low enables, respectively, that can be connected together externally to function as a direction control. The
driver differential outputs and the receiver differential inputs are connected internally to form differential
input/output (I/O) bus ports that are designed to offer minimum loading to the bus when the driver is disabled or
VCC = 0. These ports feature wide positive and negative common-mode voltage ranges, making the device
suitable for party-line applications.
The driver is designed for up to 60 mA of sink or source current. The driver features positive and negative
current limiting and thermal shutdown for protection from line-fault conditions. Thermal shutdown is designed to
occur at a junction temperature of approximately 150°C. The receiver features a minimum input impedance of 12
kΩ, an input sensitivity of ±200 mV, and a typical input hysteresis of 50 mV.
The SN65176B and SN75176B devices can be used in transmission-line applications employing the SN75172
and SN75174 quadruple differential line drivers and SN75173 and SN75175 quadruple differential line receivers.
9.2 Functional Block Diagram
9.3 Feature Description
9.3.1 Driver
The driver converts a TTL logic signal level to RS-422 and RS-485 compliant differential output. The TTL logic
input, DE pin, can be used to turn the driver on and off.
Table 1. Driver Function Table(1)
INPUT ENABLE DIFFERENTIAL OUTPUTS
D DE A B
H H H L
L H L H
X L Z Z
(1) H = high level,
L = low level,
X = irrelevant,
Z = high impedance (off)
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9.3.2 Receiver
The receiver converts a RS-422 or RS-485 differential input voltage to a TTL logic level output. The TTL logic
input, RE pin, can be used to turn the receiver logic output on and off.
Table 2. Receiver Function Table(1)
DIFFERENTIAL INPUTS ENABLE OUTPUT
A–B RE R
VID ≥0.2 V L H
–0.2 V < VID < 0.2 V L U
VID ≤–0.2 V L L
X H Z
Open L U
(1) H = high level,
L = low level,
U = unknown,
Z = high impedance (off)
9.4 Device Functional Modes
9.4.1 Device Powered
Both the driver and receiver can be individually enabled or disabled in any combination. DE and RE can be
connected together for a single port direction control bit.
9.4.2 Device Unpowered
The driver differential outputs and the receiver differential inputs are connected internally to form differential
input/output (I/O) bus ports that are designed to offer minimum loading to the bus when the driver is disabled or
VCC = 0.
9.4.3 Symbol Cross Reference
Table 3. Symbol Equivalents
DATA SHEET TIA/EIA-422-B TIA/EIA-485-A
PARAMETER
VOVoa, Vob Voa, Vob
|VOD1| VoVo
|VOD2| Vt®L= 100 Ω) Vt®L= 54 Ω)
Vt(test termination
|VOD3|measurement 2)
∆|VOD| | |Vt| – |Vt| | | |Vt– |Vt| |
VOC |Vos| |Vos|
∆|VOC| |Vos – Vos| |Vos – Vos|
IOS |Isa|, |Isb|
IO|Ixa|, |Ixb| Iia, Iib
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Up to 32
Transceivers
SN65176B
SN75176B
SN65176B
SN75176B
RT
RT
SN65176B
,
SN75176B
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10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The device can be used in RS-485 and RS-422 physical layer communications.
10.2 Typical Application
The line should be terminated at both ends in its characteristic impedance ®T= ZO). Stub lengths off the main line
should be kept as short as possible.
Figure 17. Typical RS-485 Application Circuit
10.2.1 Design Requirements
• 5-V power source
• RS-485 bus operating at 10 Mbps or less
• Connector that ensures the correct polarity for port pins
• External fail safe implementation
10.2.2 Detailed Design Procedure
• Place the device close to bus connector to keep traces (stub) short to prevent adding reflections to the bus
line
• If desired, add external fail-safe biasing to ensure +200 mV on the A-B port.
14 Submit Documentation Feedback Copyright © 1985–2015, Texas Instruments Incorporated
Product Folder Links: SN65176B SN75176B
Output
85 Ω
NOM
TYPICAL OF RECEIVER OUTPUT
Input/Output
Port
960 Ω
NOM
16.8 kΩ
NOM
TYPICAL OF A AND B I/O PORTS
Driver input: R(eq) = 3 kΩNOM
Enable inputs: R(eq )= 8 kΩNOM
R(eq) = Equivalent Resistor
R(eq)
VCC
EQUIVALENT OF EACH INPUT
VCC
Input
960 Ω
NOM
VCC
GND
SN65176B
,
SN75176B
www.ti.com
SLLS101F –JULY 1985–REVISED JANUARY 2015
Typical Application (continued)
10.2.3 Application Curves
Figure 18. Eye Diagram for 10-Mbits/s over 100 feet of standard CAT-5E cable
120-ΩTermination at both ends. Scale is 1V per division and 25nS per division
10.3 System Examples
Figure 19. Schematics of Inputs and Outputs
Copyright © 1985–2015, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: SN65176B SN75176B
5V
GND
TTL Logic
TTL Logic
TTL Logic
TTL Logic
6
5
7
1
2
3
4
81.5 μF
R
RE
DE
D
VCC
B
A
GND
GND
Connector
B
A
SN65176B
,
SN75176B
SLLS101F –JULY 1985–REVISED JANUARY 2015
www.ti.com
11 Power Supply Recommendations
Power supply should be 5V with a tolerance less than 10%
12 Layout
12.1 Layout Guidelines
Traces from device pins A and B to connector must be short and capable of 250 mA maximum current.
12.2 Layout Example
Layout Diagram
13 Device and Documentation Support
13.1 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 4. Related Links
TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER SAMPLE & BUY DOCUMENTS SOFTWARE COMMUNITY
SN65176B Click here Click here Click here Click here Click here
SN75176B Click here Click here Click here Click here Click here
13.2 Trademarks
All trademarks are the property of their respective owners.
13.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
13.4 Glossary
SLYZ022 —TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
16 Submit Documentation Feedback Copyright © 1985–2015, Texas Instruments Incorporated
Product Folder Links: SN65176B SN75176B
PACKAGE OPTION ADDENDUM
www.ti.com 24-Apr-2015
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
SN65176BD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 65176B
SN65176BDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 65176B
SN65176BDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM -40 to 105 65176B
SN65176BDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 65176B
SN65176BDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 105 65176B
SN65176BP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type -40 to 105 SN65176BP
SN75176BD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 75176B
SN75176BDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 75176B
SN75176BDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 75176B
SN75176BDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 75176B
SN75176BDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 75176B
SN75176BDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 75176B
SN75176BP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN75176BP
SN75176BPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN75176BP
SN75176BPSR ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 A176B
SN75176BPSRG4 ACTIVE SO PS 8 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 A176B
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
PACKAGE OPTION ADDENDUM
www.ti.com 24-Apr-2015
Addendum-Page 2
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN65176BDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
SN65176BDRG4 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
SN75176BDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
SN75176BDRG4 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
SN75176BPSR SO PS 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 13-Feb-2014
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN65176BDR SOIC D 8 2500 340.5 338.1 20.6
SN65176BDRG4 SOIC D 8 2500 340.5 338.1 20.6
SN75176BDR SOIC D 8 2500 340.5 338.1 20.6
SN75176BDRG4 SOIC D 8 2500 340.5 338.1 20.6
SN75176BPSR SO PS 8 2000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 13-Feb-2014
Pack Materials-Page 2
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