PIC18F1220/1320 PIC18F1220/1320 Rev. D0 Silicon/Data Sheet Errata The PIC18F1220/1320 Rev. D0 parts you have received conform functionally to the Device Data Sheet (DS39605F), except for the anomalies described below. All of the issues listed here will be addressed in future revisions of the PIC18F1220/1320 silicon. The following silicon errata apply only to PIC18F1220/1320 devices with these Device/ Revision IDs: 2. Module: EUSART The auto-baud measurement may not determine the correct baud rate if the ABDEN bit is set while the RB4/RX pin is low. Work around If the wake-up function is being used (WUE is set), wait for the RB4/RX pin to go high following a Break signal before setting the ABDEN bit. Part Number Device ID Revision ID PIC18F1220 0000 0111 111 0 0111 If the wake-up function is not being used, ensure that RB4/RX is Idle (high between bytes) before setting the ABDEN bit. PIC18F1320 0000 0111 110 0 0111 Date Codes that pertain to this issue: The Device IDs (DEVID1 and DEVID2) are located at addresses 3FFFFEh:3FFFFFh in the device's configuration space. They are shown in hexadecimal in the format "DEVID2 DEVID1". 1. Module: Core (DAW Instruction) The DAW instruction may improperly clear the Carry bit (STATUS<0>) when executed. Work around Test the Carry bit state before executing the DAW instruction. If the Carry bit is set, increment the next higher byte to be added, using an instruction such as INCFSZ (this instruction does not affect any Status flags and will not overflow a BCD nibble). After the DAW instruction has been executed, process the Carry bit normally (see Example 1). All engineering and production devices. 3. Module: Reset It has been observed that in certain Reset conditions, including power-up, the first GOTO instruction at address 0x0000 may not be executed. This occurrence is rare and affects very few applications. To determine if your system is affected, test a statistically significant number of applications across the operating temperature, voltage and frequency ranges of the application. Affected systems will repeatably fail normal testing. Systems not affected will continue to not be affected over time. Work around Insert a NOP instruction at address 0x0000. Date Codes that pertain to this issue: EXAMPLE 1: PROCESSING THE CARRY BIT DURING BCD ADDITIONS MOVLW ADDLW 0x80 0x80 ; .80 (BCD) ; .80 (BCD) BTFSC INCFSZ DAW BTFSC INCFSZ STATUS, C byte2 ; test C ; inc next higher LSB STATUS, C byte2 ; test C ; inc next higher LSB All engineering and production devices. This is repeated for each DAW instruction. Date Codes that pertain to this issue: All engineering and production devices. (c) 2009 Microchip Technology Inc. DS80244D-page 1 PIC18F1220/1320 4. Module: Oscillator (INTOSC) The Least Significant bit of the OSCTUNE register, TUN0 (OSCTUNE<0>), is not implemented. As a result, incrementing or decrementing the OSCTUNE register will not have the expected single-step change on the frequency of INTOSC. This is expected to be a permanent design change for the device. Work around For incremental changes to OSCTUNE, copy its contents to WREG, increment or decrement WREG twice, then write WREG back to OSCTUNE. This has the effect of incrementing or decrementing TUN<5:1> while maintaining TUN0 clear (the smallest possible adjustment in this silicon revision). 5. Module: Oscillator (INTRC) The 31 kHz internal RC oscillator source (INTRC) has been configured as a separate, fixed frequency source that is calibrated at the factory. Its output is no longer tunable using the OSCTUNE register. The INTOSC source remains tunable using OSCTUNE, as previously described. This is expected to be a permanent design change for the device. Work around None. Date Codes that pertain to this issue: All engineering and production devices. It is also possible to decrement OSCTUNE directly. Each direct decrement decreases the value of OSCTUNE by two (TUN0 remains clear). If incremental change is not required, OSCTUNE can also be written to directly with any value. Date Codes that pertain to this issue: All engineering and production devices. DS80244D-page 2 (c) 2009 Microchip Technology Inc. PIC18F1220/1320 Clarifications/Corrections to the Data Sheet In the PIC18F1220/1320 Device Data Sheet (DS39605F), the following clarifications and corrections should be noted: 1. Module: Timer3 (Special Event Trigger) In Section 14.0 "Timer3 Module", bit 6 of the T3CON register was incorrectly defined as unimplemented. The correct definition for T3CON<6> is T3CCP2 and is shown in bold below: In all tables and references to the T3CON register throughout the document, T3CON<6> should always be interpreted as the control bit, T3CCP2, and not as an unimplemented bit position. REGISTER 14-1: T3CON: TIMER3 CONTROL REGISTER R/W-0 R/W-0 RD16 T3CCP2 R/W-0 R/W-0 T3CKPS1 T3CKPS0 R/W-0 R/W-0 R/W-0 R/W-0 T3CCP1 T3SYNC TMR3CS TMR3ON bit 7 bit 6,3 bit 0 T3CCP2:T3CCP1: Timer3 and Timer1 to CCP1 Enable bits 1x = Timer3 is the clock source for compare/capture CCP module 01 = Reserved 00 = Timer1 is the clock source for compare/capture CCP module 2. Module: Data EEPROM In Table 22-1 on page 254 of the Device Data Sheet, the typical value for parameter D122, Data EEPROM Erase/Write Cycle Time (TDEW) has changed. The new value is 5.5 ms and is shown in bold below. TABLE 22-1: MEMORY PROGRAMMING REQUIREMENTS DC CHARACTERISTICS Param No. D122 Sym TDEW Characteristic Erase/Write Cycle Time Standard Operating Conditions (unless otherwise stated) Operating temperature -40C TA +85C for industrial Min Typ Max Units -- 5.5 -- ms 3. Module: Oscillator Configurations The INTOSC clock source has been modified to reduce its start-up time, and to improve its frequency stability. The IOFS bit (OSCCON<2>) will indicate the INTOSC has settled in approximately 128 s. (c) 2009 Microchip Technology Inc. Conditions The INTOSC clock frequency is adjusted using the TUN<5:1> bits (OSCTUNE<5:1>). The TUN0 bit (OSCTUNE<0>) is no longer effective in adjusting the INTOSC frequency, although it continues to be readable and writable. DS80244D-page 3 PIC18F1220/1320 4. Module: Oscillator Configurations 5. Module: DC Characteristics The INTRC clock source has been modified to improve its frequency stability. Modifications have been made that have changed the typical values for parameters, D022A (Brownout Reset) and D022B (Low-Voltage Detect). The new values will change the ninth and last page of the table shown. The OSCTUNE register no longer affects the INTRC frequency. Peripherals that use the INTRC clock source are also affected (WDT and FSCM). The new values are shown in bold text. 22.1 DC Characteristics: Power-Down and Supply Current PIC18F1220/1320 (Industrial) PIC18LF1220/1320 (Industrial) (Continued) PIC18LF1220/1320 (Industrial) Standard Operating Conditions (unless otherwise stated) Operating temperature -40C TA +85C for industrial PIC18F1220/1320 (Industrial, Extended) Standard Operating Conditions (unless otherwise stated) Operating temperature -40C TA +85C for industrial -40C TA +125C for extended Param No. Device Typ Max Units Conditions Module Differential Currents (IWDT, IBOR, ILVD, IOSCB, IAD) Watchdog Timer D022 (IWDT) Brown-out Reset D022A (IBOR) Extended Devices Only D022B (ILVD) Low-Voltage Detect Extended Devices Only D025 (IOSCB) D026 (IAD) DS80244D-page 4 Timer1 Oscillator A/D Converter 1.5 4.0 A -40C 2.2 4.0 A +25C 3.1 5.0 A +85C 2.5 6.0 A -40C 3.3 6.0 A +25C 4.7 7.0 A +85C 3.7 10.0 A -40C 4.5 10.0 A +25C 6.1 13.0 A +85C 35 50 A 42 60 A 46 65 A 31 45 A 33 50 A -40C to +85C -40C to +125C VDD = 2.0V VDD = 3.0V VDD = 5.0V VDD = 3.0V VDD = 5.0V VDD = 2.0V -40C to +85C 42 60 A 46 65 A 1.7 3.5 A -40C 1.8 3.5 A +25C 2.1 4.5 A +85C 2.2 4.5 A -40C 2.6 4.5 A +25C 2.8 5.5 A +85C 3.0 6.0 A -40C 3.3 6.0 A +25C 3.6 7.0 A +85C -40C to +125C VDD = 3.0V VDD = 5.0V VDD = 2.0V 32 kHz on Timer1(4) VDD = 3.0V 32 kHz on Timer1(4) VDD = 5.0V 32 kHz on Timer1(4) 1.0 3.0 A -40C to +85C VDD = 2.0V 1.0 4.0 A -40C to +85C VDD = 3.0V 2.0 10.0 A -40C to +85C VDD = 5.0V 1.0 8.0 A -40C to +125C VDD = 5.0V A/D on, not converting (c) 2009 Microchip Technology Inc. PIC18F1220/1320 6. Module: DC Characteristics The operating values for the SEC_RUN and SEC_IDLE modes are corrected, on the seventh and eighth pages of the nine-page table in Section 22.2 "DC Characteristics: Power-Down and Supply Current". The new values are shown in bold text. 22.2 DC Characteristics: Power-Down and Supply Current PIC18F1220/1320 (Industrial) PIC18LF1220/1320 (Industrial) PIC18LF1220/1320 (Industrial) Standard Operating Conditions (unless otherwise stated) Operating temperature -40C TA +85C for industrial PIC18F1220/1320 (Industrial, Extended) Standard Operating Conditions (unless otherwise stated) Operating temperature -40C TA +85C for industrial -40C TA +125C for extended Param No. Device Typ Max Units 3.2 4.1 mA Conditions Supply Current (IDD)(2,3) All devices All devices PIC18LF1220/1320 PIC18LF1220/1320 All devices Legend: Note 1: 2: 3: 4: -40C 3.2 4.1 mA +25C 3.3 4.1 mA +85C 4.0 5.1 mA -40C 4.1 5.1 mA +25C 4.1 5.1 mA +85C 9.2 15 A -10C 9.6 15 A +25C 12.7 18 A +70C 22 30 A -10C 21 30 A +25C 20 35 A +70C 50 80 A -10C 45 80 A +25C 45 80 A +70C VDD = 4.2 V FOSC = 40 MHz (PRI_IDLE mode, EC oscillator) VDD = 5.0V VDD = 2.0V VDD = 3.0V FOSC = 32 kHz(4) (SEC_RUN mode, Timer1 as clock) VDD = 5.0V Shading of rows is to assist in readability of the table. The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode, with all I/O pins in high-impedance state and tied to VDD or VSS and all features that add delta current disabled (such as WDT, Timer1 Oscillator, BOR, etc.). The supply current is mainly a function of operating voltage, frequency and mode. Other factors, such as I/O pin loading and switching rate, oscillator type and circuit, internal code execution pattern and temperature, also have an impact on the current consumption. The test conditions for all IDD measurements in active operation mode are: OSC1 = external square wave, from rail-to-rail; all I/O pins tri-stated, pulled to VDD; MCLR = VDD; WDT enabled/disabled as specified. For RC oscillator configurations, current through REXT is not included. The current through the resistor can be estimated by the formula Ir = VDD/2REXT (mA) with REXT in k. Standard low-cost 32 kHz crystals have an operating temperature range of -10C to +70C. Extended temperature crystals are available at a much higher cost. (c) 2009 Microchip Technology Inc. DS80244D-page 5 PIC18F1220/1320 22.2 DC Characteristics: Power-Down and Supply Current PIC18F1220/1320 (Industrial) PIC18LF1220/1320 (Industrial) (Continued) PIC18LF1220/1320 (Industrial) Standard Operating Conditions (unless otherwise stated) Operating temperature -40C TA +85C for industrial PIC18F1220/1320 (Industrial, Extended) Standard Operating Conditions (unless otherwise stated) Operating temperature -40C TA +85C for industrial -40C TA +125C for extended Param No. Device Typ Max Units Conditions 5.1 9 A -10C 5.8 9 A +25C 7.9 11 A +70C 7.9 12 A -10C 8.9 12 A +25C 10.5 14 A +70C Supply Current (IDD)(2,3) PIC18LF1220/1320 PIC18LF1220/1320 All devices Legend: Note 1: 2: 3: 4: 12.5 20 A -10C 16.3 20 A +25C 18.4 25 A +70C VDD = 2.0V VDD = 3.0V FOSC = 32 kHz(4) (SEC_IDLE mode, Timer1 as clock) VDD = 5.0V Shading of rows is to assist in readability of the table. The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode, with all I/O pins in high-impedance state and tied to VDD or VSS and all features that add delta current disabled (such as WDT, Timer1 Oscillator, BOR, etc.). The supply current is mainly a function of operating voltage, frequency and mode. Other factors, such as I/O pin loading and switching rate, oscillator type and circuit, internal code execution pattern and temperature, also have an impact on the current consumption. The test conditions for all IDD measurements in active operation mode are: OSC1 = external square wave, from rail-to-rail; all I/O pins tri-stated, pulled to VDD; MCLR = VDD; WDT enabled/disabled as specified. For RC oscillator configurations, current through REXT is not included. The current through the resistor can be estimated by the formula Ir = VDD/2REXT (mA) with REXT in k. Standard low-cost 32 kHz crystals have an operating temperature range of -10C to +70C. Extended temperature crystals are available at a much higher cost. DS80244D-page 6 (c) 2009 Microchip Technology Inc. PIC18F1220/1320 REVISION HISTORY Rev A Document (08/2005) First revision of this document. Includes silicon issues 1 (Core), 2 (EUSART), 3 (Reset) and 4 (Oscillator (INTOSC Source)), and Data Sheet Clarification issues 1 (Timer3 (Special Event Trigger)) and 2 (Data EEPROM). Rev B Document (03/2006) Removed previous silicon issue 4 and added new silicon issues 4 (Oscillator/INTOSC) and 5 (Oscillator/INTRC). Data Sheet Clarification issue 1 (CCP) clarified as Timer3/Special Event Trigger. Rev C Document (07/2007) Added data sheet clarification issues 3-4 (Oscillator Configurations) and 5 (DC Characteristics). Rev D Document (02/2009) Added data sheet Characteristics). clarification (c) 2009 Microchip Technology Inc. issue 6 (DC DS80244D-page 7 PIC18F1220/1320 NOTES: DS80244D-page 8 (c) 2009 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * Microchip products meet the specification contained in their particular Microchip Data Sheet. * Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. * There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. * Microchip is willing to work with the customer who is concerned about the integrity of their code. * Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, rfPIC, SmartShunt and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, PICkit, PICDEM, PICDEM.net, PICtail, PIC32 logo, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2009, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. (c) 2009 Microchip Technology Inc. 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