SM802149
156.25MHz/312.5MHz and
78.125MHz/156.25MHz
LVDS Clock Synt h esizer
ClockWorks™ Flex
ClockWorks is a trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
March 1, 2013
Revision 1.1
hbwhelp@micrel.com or (408) 955-1690
General Description
The SM80 2149 is a m ember of the ClockW orks family of
devices from Micrel and provides an extremely low-noise
timing solution. It is based on a unique patented
ClockWorks Flex architec ture that prov ides ver y low phas e
noise.
The device operates from a 3.3V or 2.5V power supply
and synthesizes eight differential LVDS clocks, four at
156.25MHz and four at 3125MHz, or four at 78.125MHz
and four at 156.25MHz.
The SM802 149 acc epts a 2 6.04 166 MHz crysta l or ex ternal
LVCMOS inp ut.
Datasheets and support documentation are available on
Micrel’s web site at: www.micrel.com.
Features
• Generates ei ght differential LVDS clocks: either four at
156.25MHz and four at 312.5MHz, or four at 78.125MHz
and four at 156.25MHz
• 2.5V or 3.3V operating range
• Typical phase jitter (1.875MHz to 20MHz): 99fs
• Industrial temperature range
• Green, RoHS, and PFOS compliant
• Available in 44-p in 7m m × 7mm QFN package
Typical Applic ation
Micrel, Inc.
SM802149
March 1, 2013
2 Revision 1.1
hbwhelp@micrel.com or (408) 955-1690
Ordering Information(1)
Part Number Marking Shipping Temperature Range Package
SM802149UMG 802149 Tray –40°C to +85°C 44-Pin QFN
SM802149UMGR 802149 Tape and Reel –40°C to +85°C 44-Pin QFN
Note:
1. Devices are Green, RoHS, and PFOS compliant.
Pin Configuration
44-Pin QFN
7mmx7mm
(Top View)
Micrel, Inc.
SM802149
March 1, 2013
3 Revision 1.1
hbwhelp@micrel.com or (408) 955-1690
Pin Description
Pin Number Pin Name Pin Type Pin Level Pin Function
25, 26
28, 29
32, 33
35, 36
/Q1, Q1
/Q2, Q2
/Q3, Q3
/Q4, Q4
O, (DIF) LVDS Differential Clock Outputs from Bank 1
312.50MHz/156.25MHz
41, 42
1, 2
4, 5
7, 8
/Q5, Q5
/Q6, Q6
/Q7, Q7
/Q8, Q8
O, (DIF) LVDS Differential Clock Outputs from Bank 2
156.25MHz/78.125MHz
31, 37, 38 VDDO1 PWR Power Supply for the Outputs on Bank 1
43, 44, 16 VDDO2 PWR Power Supply for the Outputs on Bank 2
24, 39 VSSO1 PWR Pow er Supply Ground for the O utputs on Bank 1
3, 6, 40 VSSO2 PWR Pow er Supply Ground for the O utputs on Bank 2
23 GND I, (SE) This pin is not a Power Supply Ground, but MUST be tied to VSS
10 XTAL_SEL I, (SE) LVCMOS
Selects PLL Input Reference Source
0 = REF_IN
1 = XTAL
45kΩ pull-up
11, 20, 27, 30, 34 TEST Factory Test Pins. Do not connect anything to these pins.
12, 13 VDD PWR Core Power Supply
21 VSS
(Exposed Pad) PWR Core Power Supply Ground. The exposed pad must be connected
to the VSS ground plane.
9 PLL_BYPASS I, (SE) LVCMOS
PLL Bypass is a dual-function input. Normal operation selects
output source.
0 = Normal PLL operation
1 = Output from cry s tal os cil lat or
45kΩ pull-down
18 XTAL_IN I, (SE) 10pF crystal Crystal Reference Input. No load caps needed.
See Figure 5.
19 XTAL_OUT O, (SE) 10pF crystal Crystal Reference Output. No load cap s needed .
See Figure 5.
17 REF_IN I, (SE) LVCMOS 26.04166MHz Reference Clock Input
14 FSEL I, (SE) LVCMOS
Frequency Select.
1 = 312.5MHz/156.25 MHz
0 = 156.25MHz/78.125MHz.
Internal 45kΩ pull-up
15 OE1 I, (SE) LVCMOS
Output Enable. Q1−Q4 disables to tri-state.
0 = Disabled
1 = Enabled
45kΩ pull-up
22 OE2 I, (SE) LVCMOS
Output Enable. Q5−Q8 disables to tri-state.
0 = Disabled
1 = Enabled
45kΩ pull-up
Micrel, Inc.
SM802149
March 1, 2013
5 Revision 1.1
hbwhelp@micrel.com or (408) 955-1690
Absolute Maximum Ratings(2)
Supply Voltage (VDD, VDDOX) ........................................ +4.6V
Input Voltage (VIN) .................................. −0.5V to VDD+0.5V
Lead Temperature (soldering, 20s) ............................ 260°C
Case Temperature ..................................................... 115°C
Storage Temperature (Ts) ......................... −65°C to +150°C
Operating Ratings(3)
Supply Voltage (VDD, VDDOX) ................. +2.375V to +3.465V
Ambient Temperature (TA) .......................... –40°C to +85°C
Junction Thermal Resistance(4)
QFN (θJA)
Still-Air ......................................................... 24°C/W
QFN (ψJB)
Junction to Board .......................................... 8°C/W
DC Electrical Characteristics(5)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%, VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5%, T A = −40°C to +85°C.
Symbol Parameter Condition Min. Typ. Max. Units
VDD, VDDO1/2
3.3V Operating Voltage VDDO1 = VDDO2 3.135 3.3 3.465 V
2.5V Operating Voltage VDDO1 = VDDO2 2.375 2.5 2.625 V
Outputs loaded 156. 25MHz 181 235 mA
Outputs loaded 312. 5MHz 216 280
LVCMOS Input (OE1, OE2, PLL_BYPASS) DC Electrical Characteristics(5)
VDD = 3.3V ±5%, or 2.5V ±5%, TA = −40°C to +85°C.
Symbol Parameter Condition Min. Typ. Max. Units
VIH Input High Voltage 2 VDD + 0.3 V
VIL Input Low Voltage −0.3 0.8 V
IIH Input High Current VDD = VIN = 3.465V 150 µA
IIL Input Low Current VDD = 3.465V, VIN = 0V −150 µA
REF_IN DC Electrical Characteristics(5)
VDD = 3.3V ±5%, or 2.5V ±5%, TA = −40°C to +85°C.
Symbol Parameter Condition Min. Typ. Max. Units
VIH Input High Voltage 1.1 VDD + 0.3 V
VIL Input Low Voltage −0.3 0.6 V
IIN Input Current VIN = 0V to VDD −5 5 µA
Notes:
2. Permanent device dam age may occur if absolute maximum ratings are exceeded. This is a stress rating only and funct i onal operati on is not impli ed
at conditions other than those detailed in the operational sections of this datasheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliabil i ty.
3. The datas heet limits are not guaranteed i f the device is operated beyond the operating ratings.
4. Package t hermal resist ance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential on the PCB.
5. The ci rcuit is designed to meet the AC and DC specifications shown in the above tables after thermal equilibrium has been established.
Micrel, Inc.
SM802149
March 1, 2013
6 Revision 1.1
hbwhelp@micrel.com or (408) 955-1690
Crystal Char acteri s tics
Parameter Condition Min. Typ. Max. Units
Mode of Oscillation 10pF load Fundamental, Parallel Resonant
Frequency 26.04166 MHz
Equivalent Series Resistance (ESR) 50 Ω
Shunt Capacitor, C0 1 5 pF
Correlat ion Drive Lev el 10 100 µW
LVDS OUTPUT DC Electrical Characteristics(5)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%, VDD = 3.3V ±5%, VDDO1/2 = 3. 3V ±5% or 2.5V ±5%, TA = −40°C to +85°C.
RL = 100Ω across Q and /Q.
Symbol Parameter Condition Min. Typ. Max. Units
VOD Differential Output Voltage Figure 1, Figure 4 275 350 475 mV
ΔVOD VOD Magnitude Change 40 mV
VOS Offset Voltage 1.15 1.25 1.50 V
ΔVOS VOS Magnitude Change 50 mV
AC Electrical Characteristics(5, 6)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%, VDD = 3.3V ±5%, VDDOX1/2= 3.3V ±5% or 2.5V ±5%, TA = −40°C to +85°C.
Symbol Parameter Condition Min. Typ. Max. Units
FOUT Output Frequency 1 FSEL = 1, Q1−Q4 312.5 MHz
Output Frequency 2 FSEL = 1 , Q5–Q8 156.25 MHz
FOUT Output Frequency 1 FSEL = 0, Q1–Q4 156.25 MHz
Output Frequency 2 FSEL = 0 , Q5–Q8 78.125 MHz
TR/TF Output Rise/Fall Time 20%–80%, Figure 2, Figure 4 100 220 400 ps
TSKEW Output-to-Output Skew Within bank. Note 7 45 ps
ODC Output Duty Cycle LVDS outputs 48 50 52 %
TLOCK PLL Lock Time 20 ms
RMS Phase Jitter(8)
(Output = 156.25MHz) Integration range: 12kHz–20MHz 260 fs
Integration range: 1.875MHZ–20MHz 105 fs
RMS Phase Jitter
(8)
(Output = 312.5MHz) Integration range: 12kHz–20MHz 250 fs
Integration range: 1.875MHz–20MHz 99 fs
Notes:
6. All phase noise meas urem ents were taken with an Agilent 5052B phase noise system.
7. Defined as skew between outputs at t he same supply voltage and with equal load conditi ons; Measured at the out put differential crossing points.
8. Measured using a 26.04166 MHz crys tal as the input reference source. If using an external reference input, use a low phase noise source. With an
external reference, t he phase noise will foll ow the input source phase noise up to about 1MHz.
Micrel, Inc.
SM802149
March 1, 2013
9 Revision 1.1
hbwhelp@micrel.com or (408) 955-1690
Application Information
Input Reference
When operating with a crystal input reference, do not
apply a switching signal to REF_IN.
Crystal Layout
Keep the layers under the crystal as open as possible
and do not place switching signals or noisy supplies
under the crystal.
Crystal load capacitance is built inside the die so no
external capacitance is needed. See the Selecting a
Quartz Crystal for the Clockworks Flex I Family of
Precision Synthesizers application note for further
details.
Contact Micrel’s HBW applications group if you need
assistance to select a suitable crystal for your application
at hbwhelp@micrel.com
LVDS Outputs
Terminate LVDS outputs with 100Ω across Q and /Q.
For best performance, load all outputs. Outputs can be
DC or AC-coupled.
Figure 1. Duty Cycle Timing
Figure 2. All Outputs Rise/Fall Time
Figure 3. RMS Phase/Noise/Jitter
Micrel, Inc.
SM802149
March 1, 2013
11 Revision 1.1
hbwhelp@micrel.com or (408) 955-1690
Package Information(9)
44-pin 7mm
×
7mm QFN package
Note:
9. Package i nformat i on is correct as of the publication date. For updates and most current inform ation, go to www.micrel.com.
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-100 0 WEB http://www.micrel.com
Micrel makes no represent ations or warranties with respec t t o the accuracy or completeness of the information furnis hed in t his data sheet. This
informat i on is not intended as a warranty and Micrel does not assume responsibilit y for its use. Micrel reserves the right to change circuitry,
specificat i ons and descript i ons at any time without notice. No license, whether express , im plied, arisi ng by estoppel or otherwise, t o any intellectual
property rights is granted by this document. Except as provided in Micrel’s term s and condit i ons of sale for such products, Micrel assumes no liabil ity
whatsoever, and Micrel disclaims any express or impli ed warranty relati ng to t he sale and/or use of Micrel products including l i abi l ity or warranties
relating to fitness for a partic ular purpose, merchant abi lit y, or inf ri ngem ent of any patent, copyright or other intel l ect ual property right.
Micrel Products are not designed or authorized for use as components in life support applianc es, devic es or syst ems where malfunction of a product
can reasonably be expected to result in personal injury. Life support devices or systems are devices or syst ems that (a) are intended for surgical
implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant inj ury to the user. A
Purchaser’s use or sale of Micrel Products for use in lif e support appliances, devices or systems is a Purchas er’s own risk a nd Purchaser agrees t o full y
indemnify Mic rel for any damages resulting from such use or sale.
© 2013 Micrel, Incorporated.
