(R) SP1485E PRELIMINARY Enhanced Low Power Half-Duplex RS-485 Transceivers +5V supply Low Power BiCMOS Driver/Receiver Enable for Multi-Drop configurations Available in 8 Pin NSOIC or PDIP packages Enhanced ESD Specifications: 8 VCC RO 1 +15KV Human Body Model +15KV IEC1000-4-2 Air Discharge +8KV IEC1000-4-2 Contact Discharge RE 2 SP1485E DE 3 8 Pin - nSOIC DI 4 7 B 6 A 5 GND DESCRIPTION The SP1485E is a half-duplex transceiver that meets the specifications of RS-485 and RS422 serial protocols with enhanced ESD performance. The ESD tolerance has been improved on this device to over +15KV for both Human Body Model and IEC1000-4-2 Air Discharge Method. This device is pin-to-pin compatible with Sipex's SP485 devices as well as popular industry standards. As with the original version, the SP1485E features Sipex's BiCMOS design allowing low power operation without sacrificing performance. The SP1485E meets the requirements of the RS-485 and RS-422 protocols up to 20Mbps under load. BLOCK DIAGRAM RO 1 8 Vcc R RE 2 7B DE 3 6A DI 4 D 5 GND SP1485E Rev:C Date: 02/26/04 SP1485E Low Power Half-Duplex RS485 Transceivers 1 (c) Copyright 2004 Sipex Corporation ABSOLUTE MAXIMUM RATINGS These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. VCC............................................................................................................+7V Input Voltages Logic........................................................-0.3V to (VCC+0.5V) Drivers..................................................-0.3V to (VCC+0.5V) Receivers................................................................. 15V Output Voltages Logic........................................................-0.3V to (VCC+0.5V) Drivers...................................................................... 15V Receivers............................................-0.3V to (VCC+0.5V) Storage Temperature.......................................................-65C to +150C Power Dissipation per Package 8-pin NSOIC (derate 6.60mW/oC above +70oC)...........................550mW 8-pin PDIP (derate 11.8mW/oC above +70oC)............................1000mW ELECTRICAL CHARACTERISTICS TMIN to TMAX and VCC = 5V 5% unless otherwise noted. PARAMETERS SP1485E DRIVER DC Characteristics Differential Output Voltage Differential Output Voltage MIN. TYP. MAX. UNITS CONDITIONS 3.5 2 VCC VCC Volts Volts Differential Output Voltage Change in Magnitude of Driver Differential Output Voltage for Complimentary States Driver Common-Mode Output Voltage Input High Voltage Input Low Voltage Input Current Driver Short-Circuit Current VOUT = HIGH VOUT = LOW SP1485E DRIVER AC Characteristics Maximum Data Rate 1.5 VCC Volts Unloaded; R = ; see Figure 1 with load; R = 50; (RS-422); see Figure 1 with load; R = 27; (RS-485);see Figure 1 0.2 Volts R = 27 or R = 50; see Figure 1 3 0.8 10 Volts Volts Volts A R = 27 or R = 50; see Figure 1 Applies to DE, DI, RE Applies to DE, DI, RE Applies to DE, DI, RE 250 250 mA mA -7V VO +12V -7V VO +12V Mbps Driver Input to Output 10 RE = 5V, DE = 5V; RDIFF = 54, CL1 = CL2 = 100pF tPLH; RDIFF = 54, CL1 = CL2 = 100pF; see Figures 3 and 5 tPHL; RDIFF = 54, CLI = CL2 = 100pF; 2.0 20 30 40 10 ns ns Driver Skew 3 Driver Rise or Fall Time 8 20 ns Driver Enable to Output High 40 70 ns Driver Enable to Output Low 40 70 ns Driver Disable Time from Low 40 70 ns Driver Disable Time from High 40 70 ns Rev:C Date: 02/26/04 ns see Figures 3 and 5, tSKEW = | tDPLH - tDPHL | From 10% to 90%; RDIFF = 54, CL1 = CL2 = 100pF; see Figures 3 & 6 CL = 100pF; see Figures 4 & 6; S2 closed CL = 100pF; see Figures 4 & 6; S1 closed CL = 100pF; see Figures 4 & 6; S1 closed CL = 100pF; see Figures 4 & 6; S2 closed SP1485E Low Power Half-Duplex RS485 Transceivers 2 (c) Copyright 2004 Sipex Corporation SPECIFICATIONS (continued) TMIN to TMAX and VCC = 5V 5% unless otherwise noted. PARAMETERS MIN. SP1485E RECEIVER DC Characteristics Differential Input Threshold -0.2 Differential Input Threshold -0.4 (SP1485EMN ONLY) Input Hysteresis Output Voltage High 3.5 Output Voltage Low Three-State (High Impedance) Output Current Input Resistance 12 Input Current (A, B); VIN = 12V Input Current (A, B); VIN = -7V Short-Circuit Current 7 SP1485E RECEIVER AC Characteristics Maximum Data Rate 20 Receiver Input to Output 15 TYP. MAX. UNITS CONDITIONS +0.2 +0.4 Volts Volts -7V VCM +12V -7V VCM +12V 0.4 mV Volts Volts VCM = 0V IO = -4mA, VID = +200mV IO = +4mA, VID = -200mV A k mA mA mA 0.4V VO 2.4V; RE = 5V -7V VCM +12V DE = 0V, VCC = 0V or 5.25V, VIN = 12V DE = 0V, VCC = 0V or 5.25V, VIN = -7V 0V VO VCC RE = 0V, DE = 0V tPLH; RDIFF = 54, CL1 = CL2 = 100pF; Figures 3 & 7 tPHL; RDIFF = 54, CLI = CL2 = 100pF RDIFF = 54; CL1 = CL2 = 100pF; Figures 3 & 7 20 1 15 +1.0 -0.8 95 40 50 Mbps ns 5 10 ns ns 45 70 ns CRL = 15pF; Figures 2 & 8; S1 closed 45 45 45 70 70 70 ns ns ns CRL = 15pF; Figures 2 & 8; S2 closed CRL = 15pF; Figures 2 & 8; S1 closed CRL = 15pF; Figures 2 & 8; S2 closed 15 Diff. Receiver Skew ItPLH-tPHLI Receiver Enable to Output Low Receiver Enable to Output High Receiver Disable from Low Receiver Disable from High POWER REQUIREMENTS Supply Voltage Supply Current SP1485E No Load ENVIRONMENTAL AND MECHANICAL Operating Temperature Commercial (_C_) Industrial (_E_) (_M_) Storage Temperature Package Plastic DIP (_P) NSOIC (_N) Rev:C Date: 02/26/04 +4.75 +5.25 900 600 0 -40 -40 -65 Volts A A +70 +85 +125 +150 RE, DI = 0V or VCC; DE = VCC RE = 0V, DI = 0V or 5V; DE = 0V C C C C SP1485E Low Power Half-Duplex RS485 Transceivers 3 (c) Copyright 2004 Sipex Corporation PIN FUNCTION R 8 VCC RE 2 7 B DE 3 6 A 5 GND RO 1 Pin 1 - RO - Receiver Output. Pin 2 - RE - Receiver Output Enable Active LOW. Pin 3 - DE - Driver Output Enable Active HIGH. Pin 4 - DI - Driver Input. Pin 5 - GND - Ground Connection. D DI 4 SP485 Pin 6 - A - Driver Output/Receiver Input Non-inverting. Top View Pin 7 - B - Driver Output/Receiver Input Inverting. SP1485E Pinout (Top View) Pin 8 - Vcc - Positive Supply 4.75V<Vcc< 5.25V. A VOD R Test Point Receiver Output R CRL VOC 1k B CL1 RDIFF A VCC S1 S2 Figure 1. RS-485 Driver DC Test Load Circuit DI 1k A Figure 2. Receiver Timing Test Load Circuit RO Output Under C L Test B B CL2 15pF Figure 4. RS-485 Driver Timing Test Load #2 Circuit f = 1MHz; tR < 1.0ns; tF < 1.0ns +3V 1.5V DI 1.5V 0V B VCC S1 S2 Figure 3. RS-485 Driver/Receiver Timing Test Circuit DRIVER OUTPUT 500 tPLH tPHL VO 1/2VO 1/2VO A tDPLH DIFFERENTIAL VO+ OUTPUT 0V VA - VB VO- tDPHL tR tF tSKEW = | tDPLH - tDPHL | Figure 5. Driver Propagation Delays Rev:C Date: 02/26/04 SP1485E Low Power Half-Duplex RS485 Transceivers 4 (c) Copyright 2004 Sipex Corporation INPUTS RE X X X X DE 1 1 0 1 OUTPUTS LINE DI CONDITION 1 No Fault 0 No Fault X X X Fault B 0 1 Z Z INPUTS RE DE 0 0 0 0 0 0 1 0 A 1 0 Z Z OUTPUTS A-B R +0.2V 1 -0.2V 0 Inputs Open 1 X Z Table 2. Receive Function Truth Table Table 1. Transmit Function Truth Table f = 1MHz; tR < 1.0ns; tF < 1.0ns +3V 1.5V DE 1.5V 0V tZL tLZ 5V 2.3V A, B VOL VOH A, B 2.3V 0V Output normally LOW 0.5V Output normally HIGH 0.5V tZH tHZ Figure 6. Driver Enable and Disable Times V0D2+ A-B 0V INPUT V0D2- VOH 1.5V R VOL tPHL OUTPUT 0V 1.5V tPLH f = 1MHz; tR < 1.0ns; tF < 1.0ns tSKEW = | tPHL - tPLH | Figure 7. Receiver Propagation Delays +3V 1.5V RE 0V f = 1MHz; tR < 1.0ns; tF < 1.0ns tZL 1.5V tLZ 5V 1.5V R VIL Output normally LOW 0.5V Output normally HIGH 0.5V VIH R 1.5V 0V tZH tHZ Figure 8. Receiver Enable and Disable Times Rev:C Date: 02/26/04 SP1485E Low Power Half-Duplex RS485 Transceivers 5 (c) Copyright 2004 Sipex Corporation DESCRIPTION fail-safe feature. Fail-safe guarantees that the receiver output will be in a HIGH state when the input is left unconnected. The SP1485E is half-duplex differential transceivers that meet the requirements of RS-485 and RS-422. Fabricated with a Sipex proprietary BiCMOS process, this product requires a fraction of the power of older bipolar designs. ESD TOLERANCE The SP1485E incorporates ruggedized ESD cells on all driver output and receiver input pins. The ESD structure is improved over our previous family for more rugged applications and environments sensitive to electro-static discharges and associated transients. The improved ESD tolerance is at least 15kV without damage or latch-up. The RS-485 standard is ideal for multi-drop applications and for long-distance interfaces. RS-485 allows up to 32 drivers and 32 receivers to be connected to a data bus, making it an ideal choice for multi-drop applications. Since the cabling can be as long as 4,000 feet, RS-485 transceivers are equipped with a wide (-7V to +12V) common mode range to accommodate ground potential differences. Because RS-485 is a differential interface, data is virtually immune to noise in the transmission line. There are different methods of ESD testing applied: a) MIL-STD-883, Method 3015.7 b) IEC1000-4-2 Air-Discharge c) IEC1000-4-2 Direct Contact Drivers The Human Body Model has been the generally accepted ESD testing method for semiconductors. This method is also specified in MIL-STD-883, Method 3015.7 for ESD testing. The premise of this ESD test is to simulate the human body's potential to store electro-static energy and discharge it to an integrated circuit. The simulation is performed by using a test model as shown in Figure 7. This method will test the IC's capability to withstand an ESD transient during normal handling such as in manufacturing areas where the ICs tend to be handled frequently. The driver outputs of the SP1485E are differential outputs meeting the RS-485 and RS-422 standards. The typical voltage output swing with no load will be 0 Volts to +5 Volts. With worst case loading of 54 across the differential outputs, the drivers can maintain greater than 1.5V voltage levels. The drivers of the SP1485E have an enable control line which is active HIGH. A logic HIGH on DE (pin 3) will enable the differential driver outputs. A logic LOW on DE (pin 3) will tri-state the driver outputs. The transmitters of the SP1485E will operate up to at least 20Mbps. The IEC-1000-4-2, formerly IEC801-2, is generally used for testing ESD on equipment and systems. For system manufacturers, they must guarantee a certain amount of ESD protection since the system itself is exposed to the outside environment and human presence. The premise with IEC1000-4-2 is that the system is required to withstand an amount of static electricity when ESD is applied to points and surfaces of the equipment that are accessible to personnel during normal usage. The transceiver IC receives most of the ESD current when the ESD source is applied to the connector pins. The test circuit for Receivers The SP1485E receivers have differential inputs with an input sensitivity as low as 200mV. Input impedance of the receivers is typically 15k (12k minimum). A wide common mode range of -7V to +12V allows for large ground potential differences between systems. The receivers of the SP1485E have a tri-state enable control pin. A logic LOW on RE (pin 2) will enable the receiver, a logic HIGH on RE (pin 2) will disable the receiver. The receiver for the SP1485E will operate up to at least 20Mbps. The receiver for each of the two devices is equipped with the Rev:C Date: 02/26/04 SP1485E Low Power Half-Duplex RS485 Transceivers 6 (c) Copyright 2004 Sipex Corporation IEC1000-4-2 is shown on Figure 8. There are two methods within IEC1000-4-2, the Air Discharge method and the Contact Discharge method. R RS S R RC C SW2 SW2 SW1 SW1 Device Under Test C CS S DC Power Source Figure 7. ESD Test Circuit for Human Body Model Contact-Discharge Module R RS S R RC C RV SW2 SW2 SW1 SW1 Device Under Test C CS S DC Power Source RS and RV add up to 330 for IEC1000-4-2. Figure 8. ESD Test Circuit for IEC1000-4-2 Rev:C Date: 02/26/04 SP1485E Low Power Half-Duplex RS485 Transceivers 7 (c) Copyright 2004 Sipex Corporation i With the Air Discharge Method, an ESD voltage is applied to the equipment under test (EUT) through air. This simulates an electrically charged person ready to connect a cable onto the rear of the system only to find an unpleasant zap just before the person touches the back panel. The high energy potential on the person discharges through an arcing path to the rear panel of the system before he or she even touches the system. This energy, whether discharged directly or through air, is predominantly a function of the discharge current rather than the discharge voltage. Variables with an air discharge such as approach speed of the object carrying the ESD potential to the system and humidity will tend to change the discharge current. For example, the rise time of the discharge current varies with the approach speed. 30A 15A 0A t=0ns Figure 9. ESD Test Waveform for IEC1000-4-2 voltage stored in the capacitor is then applied through RS, the current limiting resistor, onto the device under test (DUT). In ESD tests, the SW2 switch is pulsed so that the device under test receives a duration of voltage. The Contact Discharge Method applies the ESD current directly to the EUT. This method was devised to reduce the unpredictability of the ESD arc. The discharge current rise time is constant since the energy is directly transferred without the air-gap arc. In situations such as hand held systems, the ESD charge can be directly discharged to the equipment from a person already holding the equipment. The current is transferred on to the keypad or the serial port of the equipment directly and then travels through the PCB and finally to the IC. For the Human Body Model, the current limiting resistor (RS) and the source capacitor (CS) are 1.5k an 100pF, respectively. For IEC-1000-42, the current limiting resistor (RS) and the source capacitor (CS) are 330 an 150pF, respectively. The higher CS value and lower RS value in the IEC1000-4-2 model are more stringent than the Human Body Model. The larger storage capacitor injects a higher voltage to the test point when SW2 is switched on. The lower current limiting resistor increases the current charge onto the test point. The circuit model in Figures 7 and 8 represent the typical ESD testing circuit used for all three methods. The CS is initially charged with the DC power supply when the first switch (SW1) is on. Now that the capacitor is charged, the second switch (SW2) is on while SW1 switches off. The SP1481E, SP1485E FAMILY Driver Outputs Receiver Inputs Rev:C Date: 02/26/04 HUMAN BODY MODEL 15kV 15kV t=30ns t Air Discharge IEC1000-4-2 Direct Contact Level 15kV 15kV 8kV 8kV 4 4 SP1485E Low Power Half-Duplex RS485 Transceivers 8 (c) Copyright 2004 Sipex Corporation PACKAGE: PLASTIC DUAL-IN-LINE (NARROW) E1 E D1 = 0.005" min. (0.127 min.) A1 = 0.015" min. (0.381min.) D A = 0.210" max. (5.334 max). C A2 B1 B e = 0.100 BSC (2.540 BSC) O L eA = 0.300 BSC (7.620 BSC) ALTERNATE END PINS (BOTH ENDS) DIMENSIONS (Inches) Minimum/Maximum (mm) 8-PIN A2 0.115/0.195 (2.921/4.953) B 0.014/0.022 (0.356/0.559) B1 0.045/0.070 (1.143/1.778) C 0.008/0.014 (0.203/0.356) D 0.355/0.400 (9.017/10.160) E 0.300/0.325 (7.620/8.255) E1 0.240/0.280 (6.096/7.112) L 0.115/0.150 (2.921/3.810) O 0/ 15 (0/15) Rev:C Date: 02/26/04 SP1485E Low Power Half-Duplex RS485 Transceivers 9 (c) Copyright 2004 Sipex Corporation PACKAGE: 8 PIN NSOIC D e E/2 E1 E SEE VIEW C E1/2 1 b INDEX AREA (D/2 X E1/2) O1 A TOP VIEW Gauge Plane L2 Seating Plane O1 O L L1 VIEW C A2 A SEATING PLANE A1 SIDE VIEW DIMENSIONS Minimum/Maximum (mm) b WITH PLATING 8 Pin NSOIC (JEDEC MS-012, AA - VARIATION) COMMON HEIGHT DIMENSION SYMBOL A A1 A2 b c D E E1 e L L1 L2 O O1 Rev:C Date: 02/26/04 MIN NOM MAX 1.75 1.35 0.25 0.10 1.25 1.65 0.31 0.51 0.17 0.25 4.90 BSC 6.00 BSC 3.90 BSC 1.27 BSC 0.40 1.27 1.04 REF 0.25 BSC 0 8 5 15 c BASE METAL CONTACT AREA PACKAGE: 8 PIN NSOIC SP1485E Low Power Half-Duplex RS485 Transceivers 10 (c) Copyright 2004 Sipex Corporation ORDERING INFORMATION Model Temperature Range Package SP1485ECN ..................................................... 0C to +70C ............................................... 8-pin Narrow SOIC SP1485ECP ...................................................... 0C to +70C ................................................... 8-pin Plastic DIP SP1485EEN .................................................... -40C to +85C ............................................. 8-pin Narrow SOIC SP1485EEP .................................................... -40C to +85C ................................................. 8-pin Plastic DIP SP1485EMN .................................................. -40C to +125C ............................................ 8-pin Narrow SOIC Please consult the factory for pricing and availability on a Tape-On-Reel option. REVISION HISTORY DATE 11/11/03 12/18/03 02/26/04 REVISION A B C DESCRIPTION Implemented tracking revision. Added Driver and Receiver TPLH/TPHL AC Characteristics. Changed Driver Input to Output values from 20ns (typ), 30ns (max) to 30ns (typ), 40ns (max). Changed Receiver Input to Output values from 25ns (typ), 70ns (max) to 40ns (typ), 50ns (max) . Corporation ANALOG EXCELLENCE Sipex Corporation Headquarters and Sales Office 233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600 Sales Office 22 Linnell Circle Billerica, MA 01821 TEL: (978) 667-8700 FAX: (978) 670-9001 e-mail: sales@sipex.com Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Rev:C Date: 02/26/04 SP1485E Low Power Half-Duplex RS485 Transceivers 11 (c) Copyright 2004 Sipex Corporation