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STRUCTURE Silicon Monolithic Integrated Circuit
PRODUCT NAME 1ch DCDC Converter Controller IC with Built-in Synchronous Rectifier
TYPE
BD9121GUL
FEATURES Output VoltageFixed(1.2V, 1.3V, 1.4V), Output Current0.3A
Fast transient response with current mode PWM control system
High efficiency with sy nchronous re ct ifier
ABSOLUTE MAXIMUM RATINGTa=25℃)
Parameter Symbol Limit Unit
Supply Voltage VCC -0.3+7 *1 V
PVCC -0.3+7 *1 V
SEL Voltage SEL -0.3+7 V
SWITH Voltage SW, ITH -0.3+7 V
SW Output Current ISW 0.5 *1 A
Power Dissipation 1 Pd1 660 *2 mW
Operating Temperature Range Topr -25+85
S torage Temperature Range Tstg -55+150
Maximum Junction Temperature Tjmax +150
*1 Pd, ASO, and Tjmax=150 should not be exceeded.
*2 Derating is 5.28mW/ for temperatures above Ta=25 (when mounted on 50mm×58mm×1.6mm glass epoxy PCB).
OPERATING CONDITIONSTa=-25+85℃)
Parameter Symbol Min.
Typ. Max. Unit
Supply Voltage VCC 2.55 3 3.6 V
PVCC 2.55 3 3.6 V
SW Average Output Current ISW - - 0.3*3 A
*3 Pd and ASO should not be exceeded.
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ELECTRICAL CHARACTERISTICS (Unless otherwise specified, Ta=25, VCC=PVCC=3V, VOUT=1.3V
Parameter Symbol Limit Unit Condition
Min. Typ. Max.
Bias Current ICC - 400 640
μA
Output Voltage1 VOUT1 -2 - +2 %
Output Voltage2 VOUT2 -3 - +3 %
Ta=-2585
Oscillation Frequency1 FOSC1 2.4 3 3.6 MHz
Oscillation Frequency2 FOSC2 2.1 3 3.9 MHz
Ta=2585
Pch FET ON Resistance RONP - 0.3 0.6
Ω PVCC=3V
Nch FET ON Resistance RONN - 0.2 0.4 Ω PVCC=3V
ITH Sink Current ITHSI 10 20 - μA VOUT=2V, SEL=OPEN
ITH Source Current ITHSO 10 20 - μA VOUT=0.8V, SEL=OPEN
UVLO Threshold Volt age VUVLO1 2.1 2.25 2.4 V
VCC=30V
UVLO Release Voltage VUVLO2 2.12 2.3 2.5 V
VCC=03V
Soft Start Time TSS 25 50 100
μs
Timer Latch Time TLATCH 0.68 1.36 2.72 ms
SCP/TSD
Operational Mode
Output Short circuit
Threshold Voltage VSCP - 0.65 1 V
VOUT=1.30V,
SEL=OPEN
PHYSICAL DIMENSION BLOCK DIAGRAMAPPLICATION CIRCUIT
VCSP50L2 (UNIT:mm)
9 1 2 1
Lot No.
3V
Input
PVCC
PGND
SW
GND
Output
Gm Amp L
VCC
R
SQ
OSC
UVLO
TSD
+
4.7
μ
F
VCC
CLK
SLOPE
Current
Comp
Soft
Start
Current
Sense/
Protect
+
Driver
Logic
+
VREF
ITH
VOUT
RITH CITH
SCP
SEL
4.7μF
10Ω
0.1
μ
F
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REV. A
PIN DISTRIBUTION [Bottom View]
B1
SW
B2 PVCC
B3 VCC
B4 VOUT
A1
PGND
A2 GND
A3 SEL
A4 ITH
SETTING THE OUTPUT VOLTAGE PIN No.PIN NAME
SEL Output VoltageV PIN No. PIN NAME
GND 1.2 A1 PGND
OPEN 1.3 A2 GND
VCC 1.4 A3 SEL
Cannot switch in operational mode. A4 ITH
B1 SW
B2 PVCC
B3 VCC
B4 VOUT
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NOTES FOR USE
(1) Absolute maximum rating
Although the quality of this IC is rigorously controlled and will function properly in normal operating c onditions, the IC ma y
be destroyed when applied voltage or operating temperature exceeds its absolute maximum rating. Because short mode
or open mode cannot be specified when the IC is destroyed, it is important to take physical safety measures such as
fusing if a special mode in excess of absolute rating limits is to be implemented.
(2) GND potential
Make sure the potential for the GND pin is always kept at the minimum, regardless of the operating mode. In addition,
verify that the GND voltage is lower than the potential of all terminals except SW, PGND and GND in all conditions,
including electric transient events.
(3) Thermal design
Do not exceed the power dissipation (Pd) of the package specification rating under actual operation. Provide sufficient
margin in the thermal design to account for the Pd expected in actual use.
(4) Short-circuits between pins and incorrect mounting position
When mounting the IC onto the s et PCB, be extremely careful about the orientation and position of the IC. The IC may
be destroyed if it is incorrectly positioned for mounting. Do not short-circuit between pins, or betwee n a pin and the power
supply or ground terminal. Note that introducing foreign matter in these paths will cause shorts and may damage the IC.
(5) Operation in strong electromagnetic fields
Use in strong electromagnetic fields may cause malfunctions. Use extreme caution with electromagnetic fields.
(6) ASO (Area of Safe Operation)
Do not exceed the maximum ASO parameter or the absolute maximum ratings of the output driver.
(7) TSD (Thermal Shutdown) circuit
This product is provided with a built-in thermal shutdown (TSD) circuit, which is activated when the IC chip temperature
rises to the threshold value. In this case, TSD automatically latches output OFF. Output is restored when UVLO is
deactivated. Note that the TSD circuit is provided for the exclusive purpose shutting down the IC in the presence of
extreme heat, and is not designed to protect the IC per se or guarantee performance when or after extreme heat
conditions occur. Therefore, do not operate the IC with the expectation of continued use or subsequent operation once the
TSD is activated.
(8) GND wiring pattern
When both a small-signal GND and high current GND are present, single-point grounding (at the standard point on the
circuit set board) is recommended. This will separate the small-signal and high current patterns, and serves to ensure that
the high current flow and wire impedance will not change the small-signal GND voltage. In the same way, care must be
taken to avoid wiring pattern fluctuations in any connected external component GND.
(9) Operation in supply voltage range
Circuit functionality is guaranteed within the operating ambient temperature, as long as the operation is within the supply
voltage range. The standard electrical characteristics cannot be guaranteed.
However, any variation in these values will be small, as long as the operation is within the supply voltage range.
(10) The application schematic presented above is an example of recommended circuit layout. Although the circuit example is
sound, actual circuit characteristics should be checked carefully before use. Be sure to allow sufficient margins to
accommodate variations between external devices and this IC when employing the depicted circuit with other circuit
constants modified. Both static and transient characteristics should be considered in establishing these margins. When
switching noise is substantial and may impact the system, a low pass filter should be inserted between the Vcc and PVcc
pins, and a Schottky barrier diode established between the SW and PGND pins.
(11) Overcurrent protection circuit/Output short protection circuit
The overcurrent protection circuit is built into output, and functions as the current limit.
Note that if the protection circuit operates more than a specified time period (when the output short-circuit protection
circuit detects a load short or other similar state) the output will be latched OFF.
Output is restored when UVLO is deactivated. Although the protection circuits effectively prevent IC destruction under
fault conditions, they should not be employed continuously.
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