General Description
The MAX9729 stereo DirectDrive® headphone amplifier
features bass boost, volume control, an input mux, and
an I2C/SMBus-compatible serial interface. This makes
the MAX9729 ideal for portable audio applications where
space is at a premium and performance is essential. The
MAX9729 operates from a single 1.8V to 3.6V, and uses
Maxim’s DirectDrive architecture, eliminating the need for
large DC-blocking capacitors. The headphone amplifiers
deliver 52mW into a 32Ω load, feature low 0.03% THD+N,
and high 90dB PSRR. Maxim’s industry-leading click-and-
pop suppression circuitry reduces audible transients during
power and shutdown cycles.
The BassMax feature boosts the bass response of the ampli-
fier, improving audio reproduction for low-end headphones.
The integrated volume control features 32 discrete volume
levels along with a ramping function to ensure smooth
transitions during shutdown cycles and input selection. The
MAX9729’s eight programmable maximum gain settings
allow for a wide range of input signal levels. A 3:1 multi-
plexer/mixer allows the selection and summation of multiple
stereo input signal sources. The MAX9729 also includes a
dedicated BEEP input with independent attenuation control.
BassMax, volume control, gain settings, and input selection
are controlled using the I2C/SMBus-compatible serial inter-
face. A lowpower, 5μA shutdown mode is controlled through
an external logic input or the serial interface.
The MAX9729 consumes only 4.8mA of supply current,
provides short-circuit and thermal-overload protection,
and is specified over the -40°C to +85°C extended tem-
perature range. The MAX9729 is available in a spacesav-
ing 28-pin thin QFN package (5mm x 5mm x 0.8mm).
Features
● DirectDrive Headphone Amplifier Eliminates
● Bulky DC-Blocking Capacitors
● 3:1 Input Multiplexer with Digital-Fade Circuitry
●Software-Enabled Bass Boost
●32-Step Integrated Volume Control
● Beep Input with Programmable Output Level
● Low Quiescent Current
● Industry-Leading Click-and-Pop Suppression
●I2C-Compatible 2-Wire Interface
● Short-Circuit Protection
● 1.8V to 3.6V Single-Supply Operation
● Available in Space-Saving, Thermally Efficient
28-Pin TQFN-EP (5mm x 5mm x 0.8mm)
Applications
Pin Configuration appears at end of data sheet.
19-0857; Rev 1; 5/14
● Portable CD/DVD/MD
Players
● Cell Phones
● MP3/PMP Players
● Flat-Panel TVs
Note: This device operates over the -40°C to +85°C operating
temperature range.
+Denotes lead-free package.
*Last digit of slave address is pin programmable.
**EP = Exposed pad.
DirectDrive is a registered trademark of Maxim Integrated
Products, Inc.
PART PIN-
PACKAGE
SLAVE
ADDRESS*
MAX9729ETI+ 28 TQFN-EP** 101000_
I
2
C INTERFACE
MUX
MIXER
FADER
CONTROL
VOLUME
CONTROL
BassMax
BassMax
1.8V TO 3.6V
SCL
SDA
INL1
INL2
INL3
INR1
INR2
INR3
BEEP
OUTL
BML
BMR
MAX9729
Σ
Σ
PGA
OUTR
PGA
MAX9729 Stereo Headphone Amplifier with BassMax,
Volume Control, and Input Mux
Simplied Block Diagram
Ordering Information
EVALUATION KIT AVAILABLE
VDD, PVDD to PGND or SGND ...............................-0.3V to +4V
VDD to PVDD .............................................. Internally Connected
PVSS to SVSS ....................................................................±0.3V
SGND to PGND ..................................................................±0.3V
C1P to PGND ........................................... -0.3V to (VDD + 0.3V)
C1N to PGND ......................................... (PVSS - 0.3V) to +0.3V
PVSS, SVSS to PGND ............................................. +0.3V to -4V
INL_, INR_, BEEP to SGND .......(SVSS - 0.3V) to (VDD + 0.3V)
SDA, SCL, BEEP_EN to PGND .............................. -0.3V to +4V
SHDN to PGND ........................................ -0.3V to (VDD + 0.3V)
OUT_ to PGND ..........................................................-3V to +3V
BM_ to SGND.............................................................-2V to +2V
Duration of OUT_ Short Circuit to PGND..................Continuous
Continuous Current Into/Out of:
VDD, C1P, C1N, PGND, PVSS, SVSS, or OUT_ ......... ±0.85A
All other pins .................................................................±20mA
Continuous Power Dissipation (TA = +70°C, multilayer board)
28-Pin Thin QFN (derate 28.6mW/°C above +70°C) 0.2286mW
Junction-to-Ambient Thermal Resistance (θJA)
28-Pin TQFN ...............................................................35°C/W
Operating Temperature Range ........................... -40°C to +85°C
Junction Temperature ...................................................... +150°C
Storage Temperature Range ............................ -65°C to +150°C
OUT_ ESD Protection (Human Body Model) ...................... ±8kV
ESD Protection of All Other Pins ......................................... ±2kV
Lead Temperature (soldering, 10s) .................................+300°C
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1μF, BM_ = 0V, maximum gain setting = 6dB, volume attenuation
setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N mea-
surement BW = 22Hz to 22kHz. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
GENERAL
Supply Voltage Range VDD (Note 2) 1.8 3.6 V
Charge-Pump and Logic Supply
Voltage PVDD (Note 2) 1.8 3.6 V
Quiescent Supply Current IDD No load, BEEP_EN = VDD (Note 3) 5.5 8 mA
Shutdown Supply Current IDD_SHDN VSHDN = 0V 510 µA
Turn-On Time tON From shutdown mode to full operation 200 µs
Beep Enable Time tON_BEEP 12 µs
Thermal Shutdown Threshold TTHRES 146 °C
Thermal Shutdown Hysteresis THYST 13 °C
HEADPHONE AMPLIFIER
Input Resistance RIN Applicable to all maximum gain and
volume settings 14 25 35 kΩ
Output Offset Voltage VOSHP Measured between OUT_ and SGND,
overall gain = -10dB (Note 3) ±0.7 ±3.5 mV
BMR, BML Input Bias Current IBIAS_BM ±10 ±100 nA
MAX9729 Stereo Headphone Amplier with BassMax,
Volume Control, and Input Mux
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Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics (3V Supply)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1μF, BM_ = 0V, maximum gain setting = 6dB, volume attenuation
setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N mea-
surement BW = 22Hz to 22kHz. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Power-Supply Rejection Ratio PSRR (Note 3)
VDD = 1.8V to 3.6V, overall
gain = 6dB 72 95
dB
f = 217Hz, 100mVP-P ripple,
overall gain = 26dB 90
f = 1kHz, 100mVP-P ripple,
overall gain = 26dB 82
f = 20kHz, 100mVP-P ripple,
overall gain = 26dB 58
Output Power POUT
THD+N = 1%,
fIN = 1kHz, overall
gain = 1.8dB,
TA = +25°C (Note 4)
RL = 16Ω 12 49
mW
RL = 32Ω 21 52
Total Harmonic Distortion Plus
Noise THD+N
fIN = 1kHz, overall
gain = 3.5dB
(Note 4)
RL = 16Ω,
POUT = 42mW 0.04
%
RL = 32Ω,
POUT = 40mW 0.04
Maximum Gain AVMAX
Register 0x01, B[2:0] = 000 3.5
dB
Register 0x01, B[2:0] = 001 6
Register 0x01, B[2:0] = 010 8
Register 0x01, B[2:0] = 011 10
Register 0x01, B[2:0] = 100 19.5
Register 0x01, B[2:0] = 101 22
Register 0x01, B[2:0] = 110 24
Register 0x01, B[2:0] = 111 26
Beep Input Attenuation AV_BEEP
Register 0x01, B[7:5] = 000 10
dB
Register 0x01, B[7:5] = 001 20
Register 0x01, B[7:5] = 010 30
Register 0x01, B[7:5] = 011 40
Register 0x01, B[7:5] = 100 50
Register 0x01, B[7:5] = 101 52
Register 0x01, B[7:5] = 110 54
Register 0x01, B[7:5] = 111 56
Signal-to-Noise Ratio SNR RL = 32Ω,
VOUT = 1VRMS
BW = 22Hz to 22kHz 99
dB
BW = 22Hz to 22kHz
and A-weighted 101
Slew Rate SR 0.5 V/µs
Capacitive Drive No sustained oscillations 200 pF
Output Resistance in Shutdown ROUT_SHDN VSHDN = 0V, measured from OUT_ to
SGND 20 kΩ
MAX9729 Stereo Headphone Amplier with BassMax,
Volume Control, and Input Mux
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Electrical Characteristics (3V Supply) (continued)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1μF, BM_ = 0V, maximum gain setting = 6dB, volume attenuation
setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N mea-
surement BW = 22Hz to 22kHz. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
(VDD = PVDD = SHDN = 2.4V, PGND = SGND = 0V, C1 = C2 = C3 = 1μF, BM_ = 0V, maximum gain setting = 6dB, volume attenuation
setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N mea-
surement BW = 22Hz to 22kHz. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Click-and-Pop Level KCP
Peak voltage,
A-weighted, 32
samples per second
(Notes 3 and 5)
Into shutdown 81
dBV
Out of shutdown 80
Charge-Pump Switching
Frequency fCP 505 600 730 kHz
Crosstalk L to R, or R to L, f = 10kHz, VOUT =
1VRMS, RL = 32Ω, both channels loaded 78 dB
DIGITAL INPUTS (SHDN, SDA, SCL, BEEP_EN)
Input High Voltage VIH 1.4 V
Input Low Voltage VIL 0.4 V
Input Leakage Current -1 +1 µA
DIGITAL OUTPUTS (SDA)
Output Low Voltage VOL IOL = 3mA 0.4 V
Output High Current IOH VSDA = VDD 1 µA
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Quiescent Current IDD No load (Note 3) 4.5 mA
Shutdown Current ISHDN VSHDN = 0V 4µA
Output Power POUT
THD+N = 1%,
fIN = 1kHz, overall
gain = 3.5dB,
TA = +25°C
(Note 4)
RL = 16Ω 32
mW
RL = 32Ω 32
Total Harmonic Distortion Plus
Noise THD+N
fIN = 1kHz, overall
gain = 3.5dB
(Note 4)
RL = 16Ω,
POUT = 23mW 0.03
%
RL = 32Ω,
POUT = 23mW 0.03
Power-Supply Rejection Ratio PSRR 100mVP-P ripple
(Note 3)
f = 217Hz 90
dBf = 1kHz 85
f = 10kHz 61
MAX9729 Stereo Headphone Amplier with BassMax,
Volume Control, and Input Mux
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Electrical Characteristics (3V Supply) (continued)
Electrical Characteristics (2.4V Supply)
(VDD = PVDD = SHDN = 2.4V, PGND = SGND = 0V, C1 = C2 = C3 = 1μF, BM_ = 0V, maximum gain setting = 6dB, volume attenuation
setting = -16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. THD+N mea-
surement BW = 22Hz to 22kHz. TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1μF, BM_ = 0V, maximum gain setting = 6dB, volume setting =
-16dB (overall gain = -10dB), BassMax disabled. Load connected between OUT_ and PGND where specified. TA = TMIN to TMAX,
unless otherwise noted. Typical values are at TA = +25°C.) (Notes 1 and 6)
Note 1: All specifications are 100% tested at TA = +25°C. Temperature limits are guaranteed by design.
Note 2: VDD and PVDD must be connected together.
Note 3: Inputs AC-coupled to SGND.
Note 4: Both channels loaded and driven in phase.
Note 5: Headphone testing performed with a 32Ω resistive load connected to PGND. Mode transitions are controlled by SHDN. KCP
level is calculated as 20log[(peak voltage during mode transition, no input signal)/1VRMS]. Units are expressed in dBV.
Note 6: Guaranteed by design.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Signal-to-Noise Ratio SNR
RL = 32Ω,
VOUT = 1VRMS,
overall gain =
3.5dB
BW = 22Hz to 22kHz 98
dB
BW = 22Hz to 22kHz
and A-weighted 101
Click-and-Pop Level KCP
Peak voltage,
A-weighted,
32 samples per
second
(Notes 3 and 5)
Into shutdown 79
dBV
Out of shutdown 79
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Serial Clock Frequency fSCL 0 400 kHz
Bus Free Time Between a STOP and a
START Condition tBUF 1.3 µs
Hold Time Repeated for a START
Condition tHD:STA 0.6 µs
Low Period of the SCL Clock tLOW 1.3 µs
High Period of the SCL Clock tHIGH 0.6 µs
Setup Time for a Repeated START
Condition tSU:STA 0.6 µs
Data Hold Time tHD:DAT 0 0.9 µs
Data Setup Time tSU:DAT 100 ns
Rise Time of Both SDA and SCL Signals tr300 ns
Fall Time of Both SDA and SCL Signals tf300 ns
Setup Time for STOP Condition tSU:STO 0.6 µs
Pulse Width of Suppressed Spike tSP 50 ns
Capacitive Load for Each Bus Line CL_BUS 400 pF
MAX9729 Stereo Headphone Amplier with BassMax,
Volume Control, and Input Mux
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Timing Characteristics
Electrical Characteristics (2.4V Supply) (continued)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1μF, CIN = 1μF (1206 case size, X7R dielectric ceramic capacitor),
BM_ = 0V, maximum gain setting = 3.5dB, volume attenuation setting = 0dB (total voltage gain = 3.5dB), BassMax disabled. Load con-
nected between OUT_ and PGND where specied. THD+N measurement BW = 22Hz to 22kHz. Both channels loaded and driven in
phase. TA = +25°C, unless otherwise noted.)
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWER
MAX9729 toc02
OUTPUT POWER PER CHANNEL (mW)
THD+N (%)
50 60 7010 20 30 400 80
100
0.01
0.1
1
10
VDD = 3V
RL = 32Ω
fIN = 100Hz
fIN = 1kHz
fIN = 5kHz
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWER
MAX9729 toc03
OUTPUT POWER PER CHANNEL (mW)
THD+N (%)
0 5 10 15 20 25 30 35 40 45 50
100
0.01
0.1
1
10
VDD = 2.4V
RL = 16Ω
fIN = 100Hz
fIN = 1kHz
fIN = 5kHz
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWER
MAX9729 toc04
OUTPUT POWER PER CHANNEL (mW)
THD+N (%)
0 5 10 15 20 25 30 35 40 45 50
100
0.01
0.1
1
10
VDD = 2.4V
RL = 32Ω
fIN = 100Hz
fIN = 1kHz
fIN = 5kHz
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY
MAX9729 toc05
FREQUENCY (Hz)
THD+N (%)
10k1k100
0.1
0.01
1
0.001
10 100k
VDD = 3V
RL = 16Ω
POUT = 42mW
POUT = 9mW
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY
MAX9729 toc06
FREQUENCY (Hz)
THD+N (%)
10k1k100
0.01
0.1
1
0.001
10 100k
VDD = 3V
RL = 32Ω
POUT = 40mW
POUT = 5mW
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY
MAX9729 toc07
FREQUENCY (Hz)
THD+N (%)
10k1k100
0.01
0.1
1
0.001
10 100k
VDD = 2.4V
RL = 16Ω
POUT = 23mΩ
POUT = 8mΩ
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. OUTPUT POWER
MAX9729 toc01
OUTPUT POWER PER CHANNEL (mW)
THD+N (%)
50 60 7010 20 30 400 80
100
0.01
0.1
1
10
VDD = 3V
RL = 16Ω
fIN = 100Hz
fIN = 5kHz
fIN = 1kHz
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY
MAX9729 toc08
FREQUENCY (Hz)
THD+N (%)
10k1k100
0.01
0.1
1
0.001
10 100k
VDD = 2.4V
RL = 32Ω
POUT = 23mΩ
POUT = 3mΩ
0
50
200
100
150
300
250
350
0 20 40 60 80 100 140120 160 180
POWER DISSIPATION
vs. OUTPUT POWER
MAX9729 toc09
OUTPUT POWER (mW)
POWER DISSIPATION (mW)
V
DD
= 3V
f
IN
= 1kHz
P
OUT
= P
OUTL
+ P
OUTR
RL = 32Ω
RL = 16Ω
MAX9729 Stereo Headphone Amplier with BassMax,
Volume Control, and Input Mux
Maxim Integrated
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Typical Operating Characteristics
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1μF, CIN = 1μF (1206 case size, X7R dielectric ceramic capacitor),
BM_ = 0V, maximum gain setting = 3.5dB, volume attenuation setting = 0dB (total voltage gain = 3.5dB), BassMax disabled. Load con-
nected between OUT_ and PGND where specied. THD+N measurement BW = 22Hz to 22kHz. Both channels loaded and driven in
phase. TA = +25°C, unless otherwise noted.)
90
0
10 100 1000
OUTPUT POWER
vs. LOAD RESISTANCE
MAX9729 toc11
LOAD RESISTANCE (Ω)
OUTPUT POWER PER CHANNEL (mW)
10
20
30
40
50
80
70
60
VDD = 3V
fIN = 1kHz
THD+N = 10%
THD+N = 1%
50
0
10 100 1000
OUTPUT POWER
vs. LOAD RESISTANCE
MAX9729 toc12
LOAD RESISTANCE (Ω)
OUTPUT POWER PER CHANNEL (mW)
10
5
15
20
25
30
45
40
35
VDD = 2.4V
fIN = 1kHz
THD+N = 10%
THD+N = 1%
120
100
80
60
40
20
0
OUTPUT POWER
vs. SUPPLY VOLTAGE
MAX9729 toc13
SUPPLY VOLTAGE (V)
OUTPUT POWER PER CHANNEL (mW)
3.43.22.8 3.02.2 2.4 2.62.01.8 3.6
fIN = 1kHz
RL = 16Ω
THD+N = 10%
THD+N = 1%
120
100
80
60
40
20
0
OUTPUT POWER
vs. SUPPLY VOLTAGE
MAX9729 toc14
SUPPLY VOLTAGE (V)
OUTPUT POWER PER CHANNEL (mW)
3.43.22.8 3.02.2 2.4 2.62.01.8 3.6
fIN = 1kHz
RL = 32Ω
THD+N = 10%
THD+N = 1%
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY
MAX9729 toc15
FREQUENCY (Hz)
PSRR (dB)
10k1k100
0
-120
-100
-80
-60
-40
-20
10
100k
VDD = 3V
SUPPLY RIPPLE 100mVP-P
RL = 32Ω
HPR
HPL
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY
MAX9729 toc16
FREQUENCY (Hz)
PSRR (dB)
10k1k100
0
-120
-100
-80
-60
-40
-20
10 100k
VDD = 2.4V
SUPPLY RIPPLE 100mVP-P
RL = 32Ω
HPR
HPL
0
50
150
100
200
250
0 40 6020 80 100 120
POWER DISSIPATION
vs. OUTPUT POWER
MAX9729 toc10
OUTPUT POWER (mW)
POWER DISSIPATION (mW)
VDD = 2.4V
fIN = 1kHz
POUT = POUTL + POUTR
RL = 32Ω
RL = 16Ω
CROSSTALK vs. FREQUENCY
MAX9729 toc17
FREQUENCY (Hz)
CROSSTALK (dB)
10k1k100
0
-120
-100
-80
-60
-40
-20
10 100k
GAIN = 3.5dB
VOUT = 1VP-P
RL = 32Ω
R TO L
L TO R
CROSSTALK vs. FREQUENCY
MAX9729 toc18
FREQUENCY (Hz)
CROSSTALK (dB)
10k1k100
0
-120
-100
-80
-60
-40
-20
10 100k
GAIN = 19.5dB
VOUT = 1VP-P
RL = 32Ω
L TO R
R TO L
MAX9729 Stereo Headphone Amplier with BassMax,
Volume Control, and Input Mux
Maxim Integrated
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Typical Operating Characteristics (continued)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1μF, CIN = 1μF (1206 case size, X7R dielectric ceramic capacitor),
BM_ = 0V, maximum gain setting = 3.5dB, volume attenuation setting = 0dB (total voltage gain = 3.5dB), BassMax disabled. Load con-
nected between OUT_ and PGND where specied. THD+N measurement BW = 22Hz to 22kHz. Both channels loaded and driven in
phase. TA = +25°C, unless otherwise noted.)
CROSSTALK vs. FREQUENCY
MAX9729 toc20
FREQUENCY (Hz)
CROSSTALK (dB)
10k1k100
0
-120
-100
-80
-60
-40
-20
10 100k
GAIN = 19.5dB
VOUT = 1VP-P
RL = 16Ω
L TO R
R TO L
BASS BOOST FREQUENCY
RESPONSE
-5
0
5
10
15
20
-10
MAX9729 toc21
FREQUENCY (Hz)
GAIN (dB)
10k1k10010 100k
NO LOAD
R1 = 47kΩ
DISABLED
R2 = 36kΩ
C4 = 0.068µF
R2 = 22kΩ
C6 = 0.1µF
R2 = 10kΩ
C6 = 0.22µF
-160
-120
-140
-100
-40
-20
-60
-80
0
0 4 6 8 102 12 14 16 18 20
OUTPUT SPECTRUM
MAX9729 toc22
FREQUENCY (kHz)
OUTPUT MAGNITUDE (dBV)
VDD = 3V
fIN = 1kHz
RL = 32Ω
OUTPUT POWER vs. CHARGE-PUMP
CAPACITANCE AND LOAD RESISTANCE
MAX9729 toc23
LOAD RESISTANCE (Ω)
OUTPUT POWER (mW)
402010 30 50
60
0
10
20
30
40
50
0 60
VDD = 3V
fIN = 1kHz
THD+N = 1%
C1 = C2 = 0.68µF
C1 = C2 = 1µF
OUTPUT POWER vs. CHARGE-PUMP
CAPACITANCE AND LOAD RESISTANCE
MAX9729 toc24
LOAD RESISTANCE (Ω)
OUTPUT POWER (mW)
4020 30 5010
5
10
15
20
25
30
35
40
0
0 60
VDD = 2.4V
fIN = 1kHz
THD+N = 1%
C1 = C2 = 0.68µF
C1 = C2 = 1µF
POWER-UP/POWER-DOWN
WAVEFORM
MAX9729 toc25
100ms/div
VOUT_
10mV/div
VDD
2V/div
CROSSTALK vs. FREQUENCY
MAX9729 toc19
FREQUENCY (Hz)
CROSSTALK (dB)
10k1k100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
-100
10 100k
GAIN = 3.5dB
VOUT = 1VP-P
RL = 16Ω
L TO R
R TO L
EXITING SHUTDOWN
MAX9729 toc26
40µs/div
VOUT_
2V/div
VSHDN
2V/div
ENTERING SHUTDOWN
MAX9729 toc27
40µs/div
VOUT_
2V/div
VSHDN
2V/div
MAX9729 Stereo Headphone Amplier with BassMax,
Volume Control, and Input Mux
Maxim Integrated
│
8
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Typical Operating Characteristics (continued)
(VDD = PVDD = SHDN = 3V, PGND = SGND = 0V, C1 = C2 = C3 = 1μF, CIN = 1μF (1206 case size, X7R dielectric ceramic capacitor),
BM_ = 0V, maximum gain setting = 3.5dB, volume attenuation setting = 0dB (total voltage gain = 3.5dB), BassMax disabled. Load con-
nected between OUT_ and PGND where specied. THD+N measurement BW = 22Hz to 22kHz. Both channels loaded and driven in
phase. TA = +25°C, unless otherwise noted.)
PIN NAME FUNCTION
1INR2 Right-Channel Input 2
2INR3 Right-Channel Input 3
3SGND Signal Ground. Connect SGND to PGND at a single point on the PCB near the device.
4, 8, 15,
22 N.C. No Connection. Not internally connected.
5 ADD Slave Address Selection Input. Connect ADD to VDD to set the device slave address to 1010001 or to
PGND to set the device slave address to 1010000.
6PVSS Charge-Pump Output. Connect to SVSS.
7 SDA Serial Data Input. Connect a pullup resistor greater than 500Ω from SDA to PVDD.
9C1N Charge-Pump Flying Capacitor Negative Terminal. Connect a 1µF capacitor between C1P and C1N.
10 PGND Power Ground. Connect PGND to SGND at a single point on the PCB near the device.
11 C1P Charge-Pump Flying Capacitor Positive Terminal. Connect a 1µF capacitor between C1P and C1N.
12 SCL Serial Clock Input. Connect a pullup resistor greater than 500Ω from SCL to PVDD.
13 PVDD
Charge-Pump and Logic Power-Supply Input. Bypass PVDD to PGND with a 1µF capacitor and connect
to VDD. PVDD and VDD are internally connected and should each have a 1µF bypass capacitor located
as close to the device as possible.
14 SVSS Headphone Amplier Negative Power-Supply Input. Connect to PVSS and bypass with a 1µF capacitor
to PGND.
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX9729 toc29
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (mA)
3.43.23.02.82.62.42.22.0
3
4
5
6
2
1.8 3.6
NO LOAD
INPUTS AC-GROUNDED
SHUTDOWN CURRENT
vs. SUPPLY VOLTAGE
MAX9729 toc30
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (µA)
3.43.23.02.82.62.42.22.0
7
0
2
1
3
4
5
6
1.8 3.6
MAX9729 toc28
20ms/div
200mV/div
200mV/div
100mV/div
FADER OPERATION
MAX9729 Stereo Headphone Amplier with BassMax,
Volume Control, and Input Mux
Maxim Integrated
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Typical Operating Characteristics (continued)
Pin Description
Detailed Description
The MAX9729 stereo headphone amplifier features
Maxim’s DirectDrive architecture, eliminating the large
output-coupling capacitors required by conventional sin-
gle-supply headphone amplifiers. The MAX9729 consists
of two 52mW Class AB headphone amplifiers, 3:1 stereo
input multiplexer/mixer, two adjustable gain preamplifiers,
a dedicated beep amplifier with independent gain control,
hardware/software shutdown control, inverting charge
pump, integrated 32-level volume control, BassMax cir-
cuitry, comprehensive click-and-pop suppression cir-
cuitry, and an I2C/SMBus-compatible interface (see the
Functional Diagram/Typical Operating Circuit). A negative
power supply (PVSS) is created internally by inverting the
positive supply (PVDD). Powering the amplifiers from VDD
and PVSS increases the dynamic range of the amplifiers
to almost twice that of other single-supply amplifiers,
increasing the total available output power.
An I2C/SMBus-compatible interface allows serial com-
munication between the MAX9729 and a microcontroller.
The MAX9729’s slave address is programmed to one of
two different values using the ADD input allowing two
MAX9729 ICs to share the same bus (see Table 1). The
internal command registers control the shutdown mode of
the MAX9729, select/mix input signal sources, enable the
BassMax circuitry, headphone and beep amplifier gains,
and set the volume level (see Table 2). The MAX9729’s
BassMax circuitry improves audio reproduction by boost-
ing the bass response of the amplifier, compensating for
any low-frequency attenuation introduced by the head-
phone. External components set the MAX9729’s overall
gain allowing for custom gain settings (see the BassMax
Gain-Setting Components section).
DirectDrive
Traditional single-supply headphone amplifiers have
their outputs biased about a nominal DC voltage, typi-
cally half the supply, for maximum dynamic range.
Large coupling capacitors are needed to block this DC
bias from the headphone. Without these capacitors,
a significant amount of DC current flows to the head-
phone, resulting in unnecessary power dissipation and
PIN NAME FUNCTION
16 BMR
Right BassMax Input. Connect an external passive network between OUTR and BMR to apply bass
boost to the right-channel output. See the BassMax Gain-Setting Components section. Connect BMR to
SGND if BassMax is not used.
17 OUTR Right Headphone Output
18 OUTL Left Headphone Output
19 BML
Left BassMax Input. Connect an external passive network between OUTL and BML to apply bass boost
to the left-channel output. See the BassMax Gain-Setting Components section. Connect BML to SGND,
if BassMax is not used.
20 BEEP_EN Beep Enable Input. Connect BEEP_EN to PVDD to enable the beep amplier or to PGND to disable the
beep amplier.
21 SHDN Active-Low Shutdown Input. Drive SHDN low to disable the MAX9729. Connect SHDN to VDD while B7
in command register 0x00 is equal to 1 for normal operation (see Command Registers section).
23 VDD
Power-Supply Input. Bypass VDD to PGND with a 1µF capacitor and connect to PVDD. VDD and PVDD
are internally connected and should each have a 1µF bypass capacitor located as to close to the device
as possible.
24 BEEP Beep Input
25 INL1 Left-Channel Input 1
26 INL2 Left-Channel Input 2
27 INL3 Left-Channel Input 3
28 INR1 Right-Channel Input 1
EP EP Exposed Paddle. Connect EP to SVSS or leave unconnected.
MAX9729 Stereo Headphone Amplier with BassMax,
Volume Control, and Input Mux
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Pin Description (continued)
possible damage to both headphone and headphone
amplifier. In addition to the cost and size disadvantages,
the DC-blocking capacitors required by conventional
headphone amplifiers limit low-frequency response and
can distort the audio signal.
Maxim’s DirectDrive architecture uses a charge pump to
create an internal negative supply voltage. This allows
the MAX9729 headphone amplifier outputs to be biased
about ground, almost doubling the dynamic range while
operating from a single supply (see Figure 1). With no DC
component, there is no need for the large DC-blocking
capacitors. Instead of two large (up to 220μF) tantalum
capacitors, the MAX9729 charge pump requires only two
small 1μF ceramic capacitors, conserving board space,
reducing cost, and improving the frequency response
of the headphone amplifier. See the Output Power vs.
Charge-Pump Capacitance and Load Resistance graph
in the Typical Operating Characteristics for details of the
possible capacitor sizes.
Charge Pump
The MAX9729 features a low-noise charge pump. The
610kHz switching frequency is well beyond the audio
range, and does not interfere with the audio signals. This
enables the MAX9729 to achieve an SNR of 99dB. The
switch drivers feature a controlled switching speed that
minimizes noise generated by turn-on and turn-off tran-
sients. Limiting the switching speed of the charge pump
also minimizes di/dt noise caused by the parasitic bond
wire and trace inductances.
Click-and-Pop Suppression
In conventional single-supply headphone amplifiers, the
output-coupling capacitor is a major contributor of audible
clicks and pops. The amplifier charges the coupling
capacitor to its output bias voltage at startup. During
shutdown, the capacitor is discharged. The charging and
discharging results in a DC shift across the capacitor,
which appears as an audible transient at the headphone
speaker. Since the MAX9729 headphone amplifier does
not require output-coupling capacitors, no audible tran-
sients occur.
Additionally, the MAX9729 features extensive click-and-
pop suppression that eliminates any audible transient
sources internal to the device. The Power-Up/Power-
Down Waveform in the Typical Operating Characteristics
shows that there are minimal transients at the output upon
startup or shutdown.
In most applications, the preamplifier driving the MAX9729
has a DC bias of typically half the supply. The input-
coupling capacitor is charged to the preamplifier’s bias
voltage through the MAX9729’s input resistor (RIN) during
startup. The resulting shift across the capacitor creates a
voltage transient that must settle before the 50ms turn-on
time has elapsed. Delay the rise of SHDN by at least 4
time constants (4 x RIN x CIN) relative to the start of the
preamplifier to avoid clicks/pops caused by the input filter.
Shutdown
The MAX9729 features a 5μA, low-power shutdown mode
that reduces quiescent current consumption and extends
battery life. Shutdown is controlled by the SHDN logic
input or software interface. Driving the SHDN input low
disables the drive amplifiers, bias circuitry, charge pump,
and sets the headphone amplifier output resistance to
20kΩ. Similarly, the MAX9729 enters shutdown when bit
seven (B7) in the command register, 0x00, is set to 0 (see
the Command Registers section). SHDN and B7 must be
high to enable the MAX9729. The I2C/SMBus interface is
active and the contents of the command register are not
V
OUT
V
OUT
V
DD
/ 2
GND
V
DD
+V
DD
GND
-V
DD
CONVENTIONAL DRIVER BIASING SCHEME
DirectDrive BIASING SCHEME
V
DD
2V
DD
Figure 1. Traditional Amplifier Output vs. MAX9729 DirectDrive
Output
MAX9729 Stereo Headphone Amplier with BassMax,
Volume Control, and Input Mux
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11
affected when in shutdown. This allows the master device
to write to the MAX9729 while in shutdown.
When a shutdown is activated, either hardware (SHDN
pin) or software (I2C register), the volume is smoothly
reduced, according to a constant slope ramp. Similarly,
when a shutdown is deactivated, either hardware or soft-
ware, the volume is smoothly increased, according to a
constant slope ramp, until the volume programmed in the
register file is reached.
BassMax (Bass Boost)
Typical headphones do not have a flat-frequency response.
The small physical size of the diaphragm does not allow
the headphone speaker to efficiently reproduce low fre-
quencies. This physical limitation results in attenuated bass
response. The MAX9729 includes a bass boost feature
that compensates for the headphone’s poor bass response
by increasing the amplifier gain at low frequencies.
The DirectDrive output of the MAX9729 has more head-
room than typical single-supply headphone amplifiers.
This additional headroom allows boosting the bass fre-
quencies without the output signal clipping.
Program the BassMax gain and cutoff frequency with
external components connected between OUT_ and BM_
(see the BassMax Gain-Setting Components section and
the Functional Diagram/Typical Operating Circuit). Use
the I2C-compatible interface to program the command
register to enable/disable the BassMax circuit.
BM_ is connected to the noninverting input of the output
amplifier when BassMax is enabled. BM_ is pulled to
SGND when BassMax is disabled. The typical application
of the BassMax circuit involves feeding a lowpass- filtered
version of the output signal back to the amplifier. This is
realized using positive feedback from OUT_ to BM_.
Figure 2 shows the connections needed to implement
BassMax.
Maximum Gain Control
The MAX9729 features eight different programmable
maximum gain settings ranging from +3.5dB to +26dB
(see Table 8). Bits [2:0] in command register 0x01 control
the maximum gain setting (AV_MAX).
Volume Control
The MAX9729 includes a 32-level volume control that
adjusts the total voltage gain of the headphone amplifier
according to the values of bits [4:0] in the 0x00 command
register. With BassMax disabled, the total voltage gain of
the MAX9729 is equal to:
AV_TOTAL = AV_MAX − ATTEN(dB)
where AV_TOTAL is the total voltage gain in dB, AV_MAX is
the maximum gain setting in dB, and ATTEN is the volume
attenuation in dB.
Tables 5a, 5b, 5c show all the possible volume attenua-
tion settings and the resulting AV_TOTAL with BassMax
disabled. Figure 8 shows the volume control transfer func-
tion. Mute attenuation is typically better than 100dB when
driving a 32Ω load. To perform smooth-sounding volume
changes, step through all intermediate volume settings
at a rate of approximately 2ms per step when a volume
change occurs.
Automatic Volume Ramping During Mode
Transitions and Input Source Selection
The MAX9729 implements an automatic volume rampup/
ramp-down function when exiting/entering shutdown and
when selecting different input signal paths with the inter-
nal 3:1 multiplexer. The automatic volume rampup/ ramp-
down function steps through each intermediate volume
setting at a rate of 1.5ms per step allowing for smooth
sounding volume transitions. When exiting/entering shut-
down, the volume ramp-up/rampdown function is imple-
mented regardless of whether the shutdown command is
initiated by an I2C command or the SHDN input. When
exiting shutdown, the volume is ramped up to the value
stored in register 0x00 (see Table 2). When selecting a
new input signal path with the multiplexer, the MAX9729
first ramps down the volum, selects the new input source,
and then ramps the volume back up to the value stored in
register 0x00. This prevents any audible clicks and pops
due to abrupt changes in signal amplitude when selecting
a different input signal source.
Figure 2. BassMax External Connections
C6R2
R1
R
R
OUT_
BM_
FROM
VOLUME
ATTENUATOR
STAGE
MAX9729
BassMax
ENABLE
TO HEADPHONE
SPEAKER
MAX9729 Stereo Headphone Amplier with BassMax,
Volume Control, and Input Mux
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BEEP Input
The MAX9729 features a BEEP input with eight different
attenuation settings (see Table 6). The BEEP input is use-
ful for applications requiring the routing of a system alert
signal to the stereo audio path. The attenuation value of
the BEEP input is set by bits [7:5] in the 0x01 command
register (see Tables 2 and 6). The attenuation settings of
the BEEP input are independent of the volume settings
stored in register 0x00 (see Table 2). The BEEP input
is enabled when BEEP_EN is connected to VDD and
disabled when driven low. When BEEP_EN is high, the
selected INL_ and INR_ inputs are disconnected from the
signal path and the BEEP input signal is routed to both
headphone outputs after being attenuated by the value
set by bits [7:5] in register 0x01. When BEEP_EN is low,
the BEEP input is disconnected from the signal path and
the selected INL_ and INR_ inputs are reconnected.
Input Multiplexer/Mixer
The MAX9729 includes a stereo 3:1 multiplexer/mixer,
allowing selection and mixing of three different stereo input
sources. Bits [6:5] in register 0x00 control the selection/mix-
ing of the input signal sources (see Tables 2 and 4). When
all three stereo inputs are selected (Bits [6:5] = 11), the
stereo signals are summed (mixed) together and connected
to the signal path. The MAX9729 implements the automatic
volume ramping function when an input source change
occurs to ensure smooth sounding transitions. Clipping may
occur if three high level signals are summed. Reprogram
the preamplifier maximum gain setting to compensate.
Serial Interface
The MAX9729 features an I2C/SMBus-compatible 2-wire
serial interface consisting of a serial data line (SDA) and a
serial clock line (SCL). SDA and SCL facilitate bidirection-
al communication between the MAX9729 and the master
at clock rates up to 400kHz. Figure 3 shows the 2-wire
interface timing diagram. The MAX9729 is a transmit/
receive slave-only device, relying upon a master device
to generate the clock signal. The master device, typically
a microcontroller, initiates data transfer on the bus and
generates SCL to permit that transfer.
A master device communicates to the MAX9729 by trans-
mitting the slave address with the Read/Write (R/W) bit
followed by the data word. Each transmit sequence is
framed by a START (S) or REPEATED START (Sr) con-
dition and a STOP (P) condition. Each word transmitted
over the bus is 8 bits long and is always followed by an
acknowledge or not acknowledge clock pulse.
The MAX9729 SDA line operates as both an input and an
open-drain output. A pullup resistor, greater than 500Ω, is
required on the SDA bus. The MAX9729 SCL line oper-
ates as an input only. A pullup resistor, greater than 500Ω,
is required on SCL unless the MAX9729 is operating in
a single-master system where the master device has a
push-pull SCL output. Series resistors in line with SDA and
SCL are optional. Series resistors protect the digital inputs
of the MAX9729 from highvoltage spikes on the bus lines,
and minimize crosstalk and undershoot of the bus signals.
Bit Transfer
One data bit is transferred during each SCL cycle. The
data on SDA must remain stable during the high period
of the SCL pulse since changes in SDA while SCL is
high are control signals (see the START and STOP
Conditions section). SDA and SCL idle high when the
I2C bus is not busy.
Figure 3. 2-Wire Serial-Interface Timing Diagram
SCL
SDA
START
CONDITION
STOP
CONDITION
REPEATED
START
CONDITION
START
CONDITION
t
HD, STA
t
SU, STA
t
HD, STA
t
SP
t
BUF
t
SU, STO
t
LOW
t
SU, DAT
t
HD, DAT
t
HIGH
t
R
t
F
MAX9729 Stereo Headphone Amplier with BassMax,
Volume Control, and Input Mux
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START and STOP Conditions
SDA and SCL idle high when the bus is not in use. A mas-
ter device initiates communication by issuing a START
condition. A START condition is a high-to-low transition
on SDA with SCL high. A STOP condition is a low-to-high
transition on SDA while SCL is high (see Figure 4). A
START condition from the master signals the beginning
of a transmission to the MAX9729. The master terminates
transmission, and frees the bus, by issuing a STOP con-
dition. The bus remains active if a REPEATED START
condition is generated instead of a STOP condition.
Early STOP Conditions
The MAX9729 recognizes a STOP condition at any point
during data transmission except if the STOP condition
occurs in the same high clock pulse as a START condi-
tion. At least one clock pulse must separate any START
and STOP conditions.
Slave Address
The slave address of the MAX9729 is pin programmable
using the ADD input to one of two different values (see
Table 1). The slave address is defined as the 7 most
significant bits (MSBs) of the serial data transmission.
The first byte of information sent to the MAX9729 after
the START condition must contain the slave address and
R/W bit. R/W bit indicates whether the master is writing
to or reading from the MAX9729 (R/W = 0 selects the
write condition, R/W = 1 selects the read condition). After
receiving the proper address, the MAX9729 issues an
ACK by pulling SDA low for one clock cycle.
Acknowledge
The acknowledge bit (ACK) is the ninth bit attached to any
byte transmitted over the serial interface (see Figure 5).
ACK is always generated by the receiving device. The
MAX9729 generates an ACK when receiving a slave
address or data by pulling SDA low during the ninth clock
period. The SDA line must remain stable and low during
the high period of the ACK clock pulse. When transmit-
ting data, the MAX9729 waits for the receiving device
to generate an ACK. Monitoring ACK allows detection
of unsuccessful data transfers. An unsuccessful data
transfer occurs if a receiving device is busy or if a system
fault has occurred. In the event of an unsuccessful data
transfer, the bus master should reattempt communication
at a later time.
Write Data Format
A write to the MAX9729 includes transmission of a START
condition, the slave address with the R/W bit set to 0
(see Table 1), one or two command bytes to configure
the command registers, and a STOP condition. Figure
6a illustrates the proper data transmission for writing to
register 0x00 in a single frame. Figure 6b illustrates the
proper data transmission for writing to both registers 0x00
and 0x01 in a single frame.
As shown in Figures 6a and 6b, the MAX9729 com-
municates an ACK after each byte of information is
received. The MAX9729 latches each command byte into
the respective command registers after an ACK is com-
municated. The master device terminates the write data
transmission by issuing a STOP condition.
When writing to register 0x01, register 0x00 must be writ-
ten to first in the same data frame as shown in Figure 6b.
In other words, when updating register 0x01 both regis-
ters must be written to.
Table 1. MAX9729 Slave Address with
R/W Bit
Figure 4. START, STOP, and REPEATED START Conditions Figure 5. Acknowledge
ADD
MAX9729 SLAVE ADDRESS
R/W
A6
(MSB) A5 A4 A3 A2 A1 A0
GND 1010 0 0 0 0
VDD 1010 0 0 10
SCL
SDA
S Sr P
1
SCL
START
CONDITION
SDA
2 8 9
CLOCK PULSE FOR
ACKNOWLEDGMENT
ACKNOWLEDGE
NOT ACKNOWLEDGE
MAX9729 Stereo Headphone Amplier with BassMax,
Volume Control, and Input Mux
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Read Data Format
A read from the MAX9729 includes transmission of a
START condition, the slave address with the R/W bit
set to 1, one or two bytes of register data sent by the
MAX9729, and a STOP condition. Once the MAX9729
acknowledges the receipt of the slave address and R/W
bit, the data direction of the SDA line reverses and the
MAX9729 writes the contents of the command register
0x00 and 0x01 to the bus in that order. Each byte sent
by the MAX9729 should be acknowledged by the master
device unless the byte is the last data byte of the trans-
mission, in which case, the master device should com-
municate a not acknowledge (NACK). After the NACK
is communicated, the master device terminates the read
data transmission by issuing a STOP condition. Figure
7a illustrates the proper data transmission for reading the
contents of register 0x00. Figure 7b illustrates the proper
data transmission for reading the contents of both regis-
ters 0x00 and 0x01 in a single frame. Data sent by the
MAX9729 is valid on the rising edge of SCL.
When reading register 0x01, register 0x00 must be read
first in the same data frame as shown in Figure 7b.
In other words, when reading register 0x01 both registers
must be read.
Command Registers
The MAX9729 utilizes two command registers to enable/
disable shutdown, control the multiplexer/mixer, set the
volume, set the BEEP input attenuation, enable/disable
BassMax, and set the maximum gain. Table 2 describes
the function of the bits contained in the command registers.
Set B7 to 0 in register 0x00 to shut down the MAX9729.
The MAX9729 exits shutdown when B7 is set to 1 provid-
ed SHDN is high. SHDN must be high and B7 must be set
to 1 for the MAX9729 to operate normally (see Table 3).
Bits [6:5] in register 0x00 control the input multiplexer/
mixer. Select the desired input path and enable mixing of
all three stereo input sources with these bits (see Table 4).
Adjust the MAX9729’s volume with bits [4:0] in register
0x00. The volume is adjustable to one of 32 steps rang-
ing from full mute to the maximum gain set by bits [B2:B0]
in register 0x01. Tables 5a, 5b, 5c list all the possible
volume settings and resulting total voltage gains for the
Figure 6a. Write Data Format for Writing to Register 0x00 Only
Figure 6b. Write Data Format for Writing to Registers 0x00 and 0x01
ACK
0SLAVE ADDRESS COMMAND BYTE FOR REGISTER 0x00
B1 B0B3 B2B5 B4B7 B6
ACKS P
COMMAND BYTE IS
STORED AFTER ACK
STOP
CONDITION
START
CONDITION
FROM MAX9729
FROM MAX9729
R/W FROM MASTER DEVICE
FROM MASTER DEVICE
ACK
0ASLAVE ADDRESS COMMAND BYTE FOR REGISTER 0x01
B1 B0B3 B2B5 B4B7 B6
ACKS P
COMMAND BYTE IS
STORED AFTER ACK
STOP
CONDITION
START
CONDITION
FROM MAX9729
FROM MAX9729
R/W FROM MASTER DEVICE
COMMAND BYTE FOR REGISTER 0x00
B1 B0B3 B2B5 B4B7 B6
COMMAND BYTE IS
STORED AFTER ACK
FROM MAX9729
FROM MASTER DEVICE
FROM MASTER DEVICE
MAX9729 Stereo Headphone Amplier with BassMax,
Volume Control, and Input Mux
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15
MAX9729. Figure 8 shows the volume control transfer
function for the MAX9729.
Use bits [B7:B5] in register 0x01 to set the BEEP input
attenuation. The BEEP input attenuation is adjustable to
one of eight different values ranging from -10dB to -56dB
(see Table 6).
Set B3 in register 0x01 to 1 to enable BassMax (see
Table 7). The output signal’s low-frequency response will
be boosted according to the external components con-
nected between OUT_ and BM_. See the BassMax Gain-
Setting Components section for details on choosing the
external components.
Use bits [2:0] in register 0x01 to set the maximum gain
of the MAX9729 to one of eight different values ranging
from +3.5dB to +26dB (see Table 8). The maximum gain
setting in conjunction with the volume setting determines
the overall voltage gain of the MAX9729 (see Tables 5a,
5b, 5c).
Figure 7a. Read Data Format for Reading Register 0x00 Only
Figure 7b. Read Data Format for Reading Registers 0x00 and 0x01
X = Don’t Care.
Table 3. Shutdown Control (Register 0x00),
SHDN = VDD
Table 2. MAX9729 Command Registers
B7 MODE
0MAX9729 disabled
1 MAX9729 enabled
REGISTER B7 B6 B5 B4 B3 B2 B1 B0
0x00 SHUTDOWN
(see Table 3)
MUX/MIXER CONTROL
(see Table 4) VOLUME CONTROL (see Table 5)
0x01 BEEP INPUT ATTENUATION (see Table 6) 1
BassMax
ENABLE
(see Table 7)
MAXIMUM GAIN CONTROL (see Table 8)
NACK
1SLAVE ADDRESS CONTENTS OF REGISTER 0x00
B1 B0B3 B2B5 B4B7 B6
ACKS P
COMMAND BYTE IS
STORED AFTER ACK
STOP
CONDITION
START
CONDITION
FROM MAX9729
FROM MASTER DEVICE
R/W FROM MAX9729
FROM MASTER DEVICE
NACK
1ASLAVE ADDRESS COMMAND BYTE FOR REGISTER 0x01
B1 B0B3 B2B5 B4B7 B6
ACKS P
STOP
CONDITION
START
CONDITION
FROM MAX9729
FROM MASTER DEVICE
R/W FROM MAX9729
COMMAND BYTE FOR REGISTER 0x00
B1 B0B3 B2B5 B4B7 B6
FROM MASTER DEVICE
FROM MAX9729
FROM MASTER DEVICE
MAX9729 Stereo Headphone Amplier with BassMax,
Volume Control, and Input Mux
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16
Power-On Reset
The MAX9729 features internal power-on reset (POR)
circuitry that initializes the device upon power-up. The
contents of the MAX9729’s command registers at power-
on are shown in Table 9.
Applications Information
Power Dissipation and Heat Sinking
Linear power amplifiers can dissipate a significant amount
of power under normal operating conditions. The maxi-
mum power dissipation for each package is given in the
Absolute Maximum Ratings section under Continuous
Power Dissipation or can be calculated by the following
equation:
J( MAX ) A
D( MAX )
JA
TT
P
−
=
θ
where TJ(MAX) is +150°C, TA is the ambient temperature,
and θJA is the reciprocal of the derating factor in °C/W as
specified in the Absolute Maximum Ratings section. For
example, θJA for the thin QFN package is +35°C/W.
If the power dissipation exceeds the rated package dis-
sipation, reduce VDD, increase load impedance, decrease
the ambient temperature, or add heatsinking. Large output,
supply, and ground traces decrease θJA, allowing more
heat to be transferred from the package to surrounding air.
Output Dynamic Range
Dynamic range is the difference between the noise
floor of the system and the output level at 1% THD+N.
It is essential that a system’s dynamic range be known
before setting the maximum output gain. Output clipping
will occur if the output signal is greater than the dynamic
range of the system. The DirectDrive architecture of the
MAX9729 has increased dynamic range (for a given VDD)
compared to other single-supply amplifiers. Due to the
absolute maximum ratings of the MAX9729 and to limit
power dissipation, the MAX9729 includes internal circuitry
that limits the output voltage to approximately ±2.5V.
Use the THD+N vs. Output Power graph in the Typical
Operating Characteristics to identify the system’s dynam-
ic range. Find the output power that causes 1% THD+N
for a given load. This point will indicate what output power
causes the output to begin to clip. Use the following equa-
tion to determine the peak-to-peak output voltage that
causes 1% THD+N for a given load:
OUT_( P P ) OUT_1% L
V 2 2(P R )
−= ×
where POUT_1% is the output power that causes 1%
THD+N, RL is the load resistance, and VOUT_(P-P) is the
peak-to-peak output voltage. Determine the total voltage
gain (AV_TOTAL) necessary to attain this output volt-
age based on the maximum peak-to-peak input voltage
(VIN_(P-P)):
OUT_( P P )
V_TOTAL IN_(P P )
V
AV
−
−
=
The AV_TOTAL setting is determined by the maximum
voltage gain setting, volume setting, and bass boost gain
if BassMax is enabled (see the Maximum Gain Control,
Volume Control, and BassMax Gain-Setting Components
sections).
UVLO
The MAX9729 features an undervoltage lockout (UVLO)
function that prevents the device from operating if the
supply voltage is less than 1.65V. This feature ensures
proper operation during brownout conditions and prevents
deep battery discharge. Once the supply voltage exceeds
the UVLO threshold, the MAX9729 charge pump is turned
on, the amplifiers are powered (provided that SHDN is
high), and the command registers are reset to their POR
values (see Table 9).
Component Selection
Charge-Pump Capacitor Selection
Use ceramic capacitors with a low ESR for optimum per-
formance. For optimal performance over the extended tem-
perature range, select capacitors with an X7R dielectric.
Table 4. Multiplexer/Mixer Control (Register 0x00)
B6 B5 OUTL OUTR
0 0 INL1 x AV_TOTAL INR1 x AV_TOTAL
01INL2 x AV_TOTAL INR2 x AV_TOTAL
10 INL3 x AV_TOTAL INR3 x AV_TOTAL
1 1 (INL1 + INL2 + INL3) x AV_TOTAL (INR1 + INR2 + INR3) x AV_TOTAL
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Table 5a. Volume Control (Register 0x00)
B4 B3 B2 B1 B0
ATTEN FROM
MAX GAIN
SETTING (dB)
AV_TOTAL (dB)
WITH AV_MAX = +3.5dB WITH AV_MAX = +6dB WITH AV_MAX = +8dB
0 0 0 0 0 -0 +3.5 +6 +8
0 0 0 0 1 -1.7 +1.8 +4.3 +6.3
0 0 0 10 -3.4 +0.1 +2.6 +4.6
0 0 0 1 1 -4.8 -1.3 +1.2 +3.2
0 0 10 0 -6.2 -2.7 -0.2 +1.8
0 0 101 -7.6 -4.1 -1.6 +0.4
0 0 110-9 -5.5 -3 -1
0 0 111 -10.4 -6.9 -4.4 -2.4
01000 -11.8 -8.3 -5.8 -3.8
01001 -13.2 -9.7 -7.2 -5.2
01010 -14.6 -11.1 -8.6 -6.6
0101 1 -16 -12.5 -10 -8
01 1 0 0 -17.4 -13.9 -11.4 -9.4
01 1 01 -18.8 -15.3 -12.8 -10.8
01110 -20.2 -16.7 -14.2 -12.2
01 1 1 1 -21.6 -18.1 -15.6 -13.6
10 0 0 0 -23.1 -19.6 -17.1 -15.1
10001-24.4 -20.9 -18.4 -16.4
10 0 10-26 -22.5 -20 -18
10 0 1 1 -27.1 -23.6 -21.1 -19.1
1010 0 -28.6 -25.1 -22.6 -20.6
10101-30.1 -26.6 -24.1 -22.1
10110-32.3 -28.8 -26.3 -24.3
101 1 1 -35.1 -31.6 -29.1 -27.1
1 1 000 -38.6 -35.1 -32.6 -30.6
1 1 001-42.1 -38.6 -36.1 -34.1
1 1 010 -46.2 -42.7 -40.2 -38.2
1 1 01 1 -50.7 -47.2 -44.7 -42.7
1 1 1 0 0 -54.2 -50.7 -48.2 -46.2
1 1 1 01-60.2 -56.7 -54.2 -52.2
1 1 1 1 0 -70 -66.5 -64 -62
1 1 1 1 1 MUTE MUTE MUTE MUTE
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Table 5b. Volume Control (Register 0x00)
B4 B3 B2 B1 B0
ATTEN FROM
MAX GAIN
SETTING (dB)
AV_TOTAL (dB)
WITH AV_MAX = +10dB WITH AV_MAX = +19.5dB WITH AV_MAX = +22dB
0 0 0 0 0 -0 +10 +19.5 +22
0 0 0 0 1 -1.7 +8.3 +17.8 +20.3
0 0 0 10 -3.4 +6.6 +16.1 +18.6
0 0 0 1 1 -4.8 +5.2 +14.7 +17.2
0 0 10 0 -6.2 +3.8 +13.3 +15.8
0 0 101 -7.6 +2.4 +11.9 +14.4
0 0 110-9 +1 +10.5 +13
0 0 111 -10.4 -0.4 +9.1 +11.6
01000 -11.8 -1.8 +7.7 +0.2
01001 -13.2 -3.2 +6.3 +8.8
01010 -14.6 -4.6 +4.9 +7.4
0101 1 -16 -6 +3.5 +6
01 1 0 0 -17.4 -7.4 +2.1 +4.6
01 1 01 -18.8 -8.8 +0.7 +3.2
01110 -20.2 -10.2 -0.7 +1.8
01 1 1 1 -21.6 -11.6 -2.1 +0.4
10 0 0 0 -23.1 -13.1 -3.6 -1.1
10001-24.4 -14.4 -4.9 -2.4
10 0 10-26 -16 -6.5 -4
10 0 1 1 -27.1 -17.1 -7.6 -5.1
1010 0 -28.6 -18.6 -9.1 -6.6
10101-30.1 -20.1 -10.6 -8.1
10110-32.3 -22.3 -12.8 -10.3
101 1 1 -35.1 -25.1 -15.6 -13.1
1 1 000 -38.6 -28.6 -19.1 -16.6
1 1 001-42.1 -32.1 -22.6 -20.1
1 1 010 -46.2 -36.2 -26.7 -24.2
1 1 01 1 -50.7 -40.7 -31.2 -28.7
1 1 1 0 0 -54.2 -44.2 -34.7 -32.2
1 1 1 01-60.2 -50.2 -40.7 -38.2
1 1 1 1 0 -70 -60 -50.5 -48
1 1 1 1 1 MUTE MUTE MUTE MUTE
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Table 5c. Volume Control (Register 0x00)
B4 B3 B2 B1 B0
ATTEN FROM
MAX GAIN
SETTING (dB)
AV_TOTAL (dB)
WITH AV_MAX = +24dB WITH AV_MAX = +26dB
0 0 0 0 0 -0 +24 +26
0 0 0 0 1 -1.7 +22.3 +24.3
0 0 0 10 -3.4 +20.6 +22.6
0 0 0 1 1 -4.8 +19.2 +21.2
0 0 10 0 -6.2 +17.8 +19.8
0 0 101 -7.6 +16.4 +18.4
0 0 1 1 0-9 +15 +17
0 0 1 1 1 -10.4 +13.6 +15.6
010 0 0 -11.8 +12.2 +14.2
010 0 1 -13.2 +10.8 +12.8
01010 -14.6 +9.4 +11.4
0101 1 -16 +8 +10
01 1 0 0 -17.4 +6.6 +8.6
01 1 01 -18.8 +5.2 +7.2
01 1 1 0 -20.2 +3.8 +5.8
01 1 1 1 -21.6 +2.4 +4.4
10 0 0 0 -23.1 +0.9 +2.9
10 0 0 1-24.4 -0.4 +1.6
10 0 10-26 -2 +0
10 0 1 1 -27.1 -3.1 -1.1
1010 0 -28.6 -4.6 -2.6
10101-30.1 -6.1 -4.1
101 1 0-32.3 -8.3 -6.3
101 1 1 -35.1 -11.1 -9.1
1 1 0 0 0 -38.6 -14.6 -12.6
1 1 0 0 1-42.1 -18.1 -16.1
1 1 010 -46.2 -22.2 -20.2
1 1 01 1 -50.7 -26.7 -24.7
1 1 1 0 0 -54.2 -30.2 -28.2
1 1 1 01-60.2 -36.2 -34.2
1 1 1 1 0 -70 -46 -44
1 1 1 1 1 MUTE MUTE MUTE
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Charge-Pump Flying Capacitor (C1)
The charge-pump flying capacitor connected between
C1N and C1P affects the charge pump’s load regula-
tion and output impedance. Choosing too small a flying
capacitor degrades the MAX9729’s ability to provide
sufficient current drive and leads to a loss of output volt-
age. Increasing the value of the flying capacitor improves
load regulation and reduces the chargepump output
impedance. See the Output Power vs. Charge-Pump
Capacitance and Load Resistance graph in the Typical
Operating Characteristics. Place C1 physically close to
C1P and C1N. Use a 1μF capacitor for C1 in most appli-
cations.
Charge-Pump Hold Capacitor (C2)
The hold capacitor’s value and ESR directly affect the
ripple at PVSS. Ripple is reduced by increasing the value
of the hold capacitor. Choosing a capacitor with lower
ESR reduces ripple and output impedance. Lower capaci-
tance values can be used in systems with low maximum
output power levels. See the Output Power vs. Charge-
Pump Capacitance and Load Resistance graph in the
Typical Operating Characteristics. C2 should be equal to
the value of C1. Place C2 physically close to PVSS and
SVSS. Connect PVSS and SVSS together at C2. Use a
1μF capacitor for C2 in most applications.
PVDD Bypass Capacitor (C3)
The PVDD bypass capacitor lowers the output imped-
ance of the power supply and reduces the impact of the
MAX9729’s charge-pump switching transients. C3 should
be greater than or equal to C1. Place C3 physically close
to PVDD.
Figure 8. MAX9729 Volume Control Transfer Function
BEEP level referenced to a 3V BEEP input.
Table 7. BassMax Control (Register 0x01)
Table 6. Beep Level (Register 0x01)
Table 9. Initial Power-Up Command Register Status
B3 MODE
0BassMax Disabled
1 BassMax Enabled
B2 B1 B0 MAXIMUM GAIN (dB)
0 0 0 3.5
0 0 1 6
0108
01 1 10
10 0 19.5
101 22
1 1 0 24
1 1 1 26
B7 B6 B5 BEEP LEVEL (dBV)
0 0 0 -10
0 0 1-20
010 -30
01 1 -40
10 0 -50
101 -52
1 1 0 -54
1 1 1 -56
Table 8. Maximum Gain Control
(Register 0x01)
REGISTER B7 B6 B5 B4 B3 B2 B1 B0 POR SETTINGS
0x00 1000101 1 Shutdown mode disabled (assuming VSHDN = VDD), INL1 and
INR1 inputs selected, ATTEN = 16dB (AV_TOTAL = -10dB)
0x01 111110 0 1 Beep input attenuation = 56dB, BassMax enabled, AV_MAX = 6dB
100
70
80
90
50
60
10
20
30
40
0
0 5 10 15 20 25 30 35
MAX9729 VOLUME CONTROL
TRANSFER FUNCTION
CODE (DECIMAL)
ATTENUATION (dB)
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Input-Coupling Capacitor
The AC-coupling capacitor (CIN) and input resistor (RIN)
form a highpass filter that removes any DC bias from
an input signal. See the Functional Diagram/Typical
Operating Circuit. CIN prevents any DC components from
the input signal source from appearing at the amplifier
outputs. The -3dB point of the highpass filter, assuming
zero source impedance due to the input signal source, is
given by:
3 dB IN IN
1
f (Hz )
2R C
−=
π× ×
Choose CIN such that f-3dB is well below the lowest
frequency of interest. Setting f-3dB too high affects the
amplifier’s low-frequency response. Use capacitors with
low-voltage coefficient dielectrics. Aluminum electrolytic,
tantalum, or film dielectric capacitors are good choices
for AC-coupling capacitors. Capacitors with high-voltage
coefficients, such as ceramics (non-C0G dielectrics), can
result in increased distortion at low zero frequencies. If a
ceramic capacitor is selected due to board space or cost
constraints, use the largest package possible to minimize
voltage coefficient effects. In addition, use X7R dielectrics
as opposed to X5R, Y5V, or Z5U.
BassMax Gain-Setting Components
The bass boost, low-frequency response when BassMax
is enabled, is set by the ratio of R1 to R2 (see Figure 2),
by the following equation:
V_BOOST R1 R2
A 20 log (dB)
R1 R2
+
= ×
−
where AV_BOOST is the gain boost, in dB, at low frequen-
cies. AV_BOOST is added to the gain realized by the maxi-
mum gain setting and the volume setting. The total gain at
low frequencies is equal to:
V_TOTAL_BM V_MAX V_BOOST
A A ATTEN A ( dB )= −+
where AV_TOTAL_BM is the total voltage gain at low fre-
quencies in dB, AV_MAX is the maximum gain setting in
dB, and ATTEN is the volume attenuation in dB. To main-
tain circuit stability, the ratio:
R2
R1 R2+
must not exceed 1/2. A ratio equaling 1/3 is recommend-
ed. The switch that shorts BM_ to SGND, when BassMax
is disabled, can have an on-resistance as high as 300Ω.
Choose a value for R1 that is greater than 40kΩ to ensure
that positive feedback is negligible when BassMax is
disabled. Table 10 contains a list of R2 values, with R1
= 47kΩ, and the corresponding low-frequency gain boost
values.
The low-frequency boost attained by the BassMax circuit
is added to the gain realized by the maximum gain set-
ting and volume setting. Select the BassMax gain so that
the output signal will remain within the dynamic range of
the MAX9729. Output signal clipping will occur at low fre-
quencies if the BassMax gain boost is excessively large.
See the Output Dynamic Range section.
Capacitor C4 forms a pole and a zero according to the
following equations:
POLE
ZERO
R1 R2
f (Hz )
2 C6 R1 R2
R1 R2
f (Hz )
2 C6 R1 R2
−
=
π× × ×
+
=
π× × ×
fPOLE is the frequency at which the gain boost begins to
roll off. fPOLE is the frequency at which the bass boost
gain no longer affects the transfer function. At frequencies
greater than or equal to fPOLE, the gain set by the maxi-
mum gain setting and the volume control attenuation dom-
inate. Table 11 contains a list of capacitor values and the
corresponding poles and zeros for a given DC gain. See
Figure 9 for an example of a gain profile using BassMax.
Layout and Grounding
Proper layout and grounding are essential for optimum
performance. Connect PGND and SGND together at
a single point (star ground point) on the PCB near the
MAX9729. Connect PVSS and SVSS together at C2.
Place C2 physically close to PVSS and SVSS and connect
it to PGND. Bypass PVDD to PGND with C3. Connect C3
as close to PVDD as possible. Bypass VDD to SGND with
a 1μF capacitor. Place the VDD bypass capacitor as close
to VDD as possible. Route PGND and all traces that carry
Table 10. BassMax Gain Examples,
R1 = 47kΩ
R2 (kΩ) AV_BOOST (dB)
39 20.6
33 15.1
27 11.3
22 8.8
15 5.7
10 3.7
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switching transients away from SGND and the audio sig-
nal path. Route digital signal traces away from the audio
signal path. Make traces perpendicular to each other
when routing digital signals over or under audio signals.
The thin QFN package features an exposed paddle that
improves thermal efficiency. Ensure that the exposed
paddle is electrically isolated from PGND, SGND, and
VDD. Connect the exposed paddle to SVSS when the
board layout dictates that the exposed paddle cannot
be left unconnected.
Table 11. BassMax Pole and Zero
Examples for a Gain Boost of 8.8dB
(R1 = 47kΩ, R2 = 22kΩ)
Figure 9. BassMax Gain Profile Example
C6 (nF) fPOLE (Hz) fZERO (Hz)
100 38 106
82 47 130
68 56 156
56 68 190
47 81 230
22 174 490
10 384 1060
GAIN PROFILE WITH AND
WITHOUT BassMax
FREQUENCY (Hz)
AV (dB)
1k10010
-8
-6
-4
-2
0
2
4
6
8
10
-10
1 10k
MAX9729
CMD REGISTER
CODE = 0xFF
R1 = 47kΩ
R2 = 22kΩ
C3 = 0.1µF
fPOLE
WITH
BassMax
WITHOUT
BassMax
fZERO
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0 TO 100dB
ATTENUATOR
I2C INTERFACE/CONTROL LOGIC
1.8V TO 3.6V
CHARGE PUMP
SVSS
PVSS
PGND
SGND
C1P
C1N
SDA SCL
OUTR
BMR
BML
23
11
10
9
6
721
12
3
16
17
18
19
TO I2C
MASTER
R1
47kΩ
R
BASS-BOOST CIRCUIT CONFIGURED FOR AV_BOOST = +8.8dB, fPOLE = 38Hz, fZERO = 106Hz.
() USCP PACKAGE
SVSS
VDD
VDD
SVSS
VDD R
R
VDD
SVSS
R
R
R
13
RIGHT AUDIO
INPUT 1
RIGHT AUDIO
INPUT 2
RIGHT AUDIO
INPUT 3
BEEP
BEEP INPUT
SGND PGND
BEEP_EN
20
25 INL1
INL2
INL3
26
27
25kΩ
25kΩ
25kΩ
25kΩ
28 INR1
INR2
INR3
1
2
CIN
1µF
LEFT AUDIO
INPUT 1
LEFT AUDIO
INPUT 2
LEFT AUDIO
INPUT 3
24 14
ADD
5
BEEP ENABLE
BEEP
ENABLE
BassMax
ENABLE
CIN
1µF
CIN
1µF
CIN
1µF
CIN
1µF
CIN
1µF VDD
CIN
1µF C2
1µF
SVSS
10kΩ10kΩ
R
VDD
SVSS
VDD
SVSS
OUTL
VDD
C3
1µF
C1
1µF
R2
22kΩ
R2
22kΩ
R1
47kΩ
C6
0.1µF
C6
0.1µF
VDD
SVSS
1µF
25kΩ
25kΩ
25kΩ
MAX9729
VDD
SHDN
PVDD
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Functional Diagram/Typical Operating Circuit
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System Diagram
R1
47kΩ
R1
47kΩ
R2
22kΩ
OUTL
BML
BMR
OUTR
PVSS SVSS
10kΩ10kΩ
C2
1µF
SGNDC1P C1N
PVDD
VDD
C3
1µF
MAX9729
CONTROLLER
SDA
SCL
BEEP_EN
R2
22kΩ
C4
0.1µF
C4
0.1µF
C1
1µF
PGND
1µF
1.8V TO
3.6V
CIN
1µF
BEEP
AUDIO CODEC
CIN
1µF
INL1
CIN
1µF
INR1
BASEBAND IC
CIN
1µF
INL2
CIN
1µF
INR2
FM RADIO IC
CIN
1µF
INL3
CIN
1µF
INR3
ADD
SHDN
21
1 2 3 4 5 6 7
20 19 18 17 16 15
8
9
10
11
12
13
14
28
27
26
25
24
23
22
MAX9729
TQFN
TOP VIEW
VDD
N.C.
BEEP
INL1
INL2
INL3
INR1
BEEP_EN
BML
OUTL
OUTR
BMR
N.C.
SVSS
PVDD
SCL
C1P
PGND
C1N
N.C.
SDA
PVSS
ADD
N.C.
SGND
INR3
INR2
+
SHDN
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Pin Conguration
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character,
but the drawing pertains to the package regardless of RoHS
status.
PACKAGE
TYPE
PACKAGE
CODE OUTLINE NO.
LAND
PATTERN
NO.
28 TQFN-EP T2855-5 21-0140 90-0025
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
MAX9729 Stereo Headphone Amplier with BassMax,
Volume Control, and Input Mux
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Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 7/07 Initial release —
15/14 Removed automotive reference from Applications section 1
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