REG102
SBVS024F NOVEMBER 2000 – REVISED SEPTEMBER 2005
www.ti.com
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 2000-2005, Texas Instruments Incorporated
DMOS
250mA Low-Dropout Regulator
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
FEATURES
NEW DMOS TOPOLOGY:
Ultra Low Dropout Voltage:
150mV typ at 250mA
Output Capacitor
not
Required for Stability
FAST TRANSIENT RESPONSE
VERY LOW NOISE:
28
µ
Vrms
HIGH ACCURACY: ±1.5% max
HIGH EFFICIENCY:
I
GND
= 600
µ
A at I
OUT
= 250mA
Not Enabled: IGND = 0.01µA
2.5V, 2.8V, 2.85V, 3.0V, 3.3V, AND 5.0V
ADJUSTABLE OUTPUT VERSIONS
OTHER OUTPUT VOLTAGES AVAILABLE UPON
REQUEST
FOLDBACK CURRENT LIMIT
THERMAL PROTECTION
SMALL SURFACE-MOUNT PACKAGES:
SOT23-5, SOT223-5, and SO-8
APPLICATIONS
PORTABLE COMMUNICATION DEVICES
BATTERY-POWERED EQUIPMENT
PERSONAL DIGITAL ASSISTANTS
MODEMS
BAR-CODE SCANNERS
BACKUP POWER SUPPLIES
DESCRIPTION
The REG102 is a family of low-noise, low-dropout linear
regulators with low ground pin current. The new DMOS
topology provides significant improvement over previous
designs, including low-dropout voltage (only 150mV typ at
full load), and better transient performance. In addition, no
output capacitor is required for stability, unlike conventional
low-dropout regulators that are difficult to compensate and
require expensive low ESR capacitors greater than 1µF.
Typical ground pin current is only 600µA (at IOUT = 250mA)
and drops to 10nA when not enabled. Unlike regulators with
PNP pass devices, quiescent current remains relatively con-
stant over load variations and under dropout conditions.
The REG102 has very low output noise (typically 28µVrms
for VOUT = 3.3V with CNR = 0.01µF), making it ideal for use
in portable communications equipment. On-chip trimming
results in high output voltage accuracy. Accuracy is main-
tained over temperature, line, and load variations. Key pa-
rameters are tested over the specified temperature range
(–40°C to +85°C).
The REG102 is well protected—internal circuitry provides a
current limit that protects the load from damage; furthermore,
thermal protection circuitry keeps the chip from being dam-
aged by excessive temperature. The REG102 is available in
SOT23-5, SOT223-5, and SO-8 packages.
REG102
(Fixed Voltage
Versions)
Enable
GND
0.1µFCOUT(1)
+
+VOUT
VIN
NR
NR = Noise Reduction NOTE: (1) Optional.
REG102-A
GND
Enable
0.1µF
+COUT(1)
+
VOUT
VIN
R2
R1
Adj
REG102
REG102
All trademarks are the property of their respective owners.
REG102
2SBVS024F
www.ti.com
PIN CONFIGURATIONS
Top View
V
OUT(2)
V
OUT(2)
NR/Adjust
(1)
GND
V
IN(3)
V
IN(3)
NC
Enable
SO-8
1
2
3
4
8
7
6
5
NOTES: (1) For REG102A-A: voltage setting resistor pin.
All other models: noise reduction capacitor pin.
(2) Both pin 1 and pin 2 must be connected.
(3) Both pin 7 and pin 8 must be connected.
SOT223-5
(U Package)
V
IN
GND
Enable
V
OUT
NR/Adjust
(1)
SOT23-5
1
2
3
5
4
(N Package)
(G Package)
Tab is GND
Enable
NR/Adjust(1)
GNDVIN
12345
VOUT
ABSOLUTE MAXIMUM RATINGS(1)
Supply Input Voltage, VIN .......................................................0.3V to 12V
Enable Input Voltage, VEN ....................................................... 0.3V to VIN
Feedback Voltage, VFB ........................................................ 0.3V to 6.0V
NR Pin Voltage, VNR .............................................................0.3V to 6.0V
Output Short-Circuit Duration ......................................................Indefinite
Operating Temperature Range (TJ) ................................ 55°C to +125°C
Storage Temperature Range (TA) ................................... 65°C to +150°C
Lead Temperature (soldering, 3s).................................................. +240°C
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper han-
dling and installation procedures can cause damage.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
PACKAGE/ORDERING INFORMATION(1)
PRODUCT VOUT(2)
REG102xx-
yyyy/zzz
XX is package designator.
YYYY is typical output voltage (5 = 5.0V, 2.85 = 2.85V, A = Adjustable).
ZZZ is package quantity.
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com.
(2) Output voltages from 2.5V to 5.1V in 50mV increments are available; minimum order quantities apply. Contact factory for details and availability.
REG102 3
SBVS024F www.ti.com
ELECTRICAL CHARACTERISTICS
Boldface limits apply over the specified temperature range, TJ = 40°C to +85°C.
At TJ = +25°C, VIN = VOUT + 1V (VOUT = 2.5V for REG102-A), VENABLE = 1.8V, IOUT = 5mA, CNR = 0.01µF, and COUT = 0.1µF(1), unless otherwise noted.
REG102NA
REG102GA
REG102UA
PARAMETER CONDITION MIN TYP MAX UNITS
OUTPUT VOLTAGE
Output Voltage Range VOUT
REG102-2.5 2.5 V
REG102-2.8 2.8 V
REG102-2.85 2.85 V
REG102-3.0 3.0 V
REG102-3.3 3.3 V
REG102-5 5V
REG102-A 2.5 5.5 V
Reference Voltage VREF 1.26 V
Adjust Pin Current IADJ 0.2 1 µA
Accuracy ±0.5 ±1.5 %
Over Temperature ±2.3 %
vs Temperature dVOUT/dT 50 ppm/°C
vs Line and Load
IOUT = 5mA to 250mA, VIN = (VOUT + 0.4V) to 10V
±0.8 ±2.0 %
Over Temperature VIN = (VOUT + 0.6V) to 10V ±2.8 %
DC DROPOUT VOLTAGE(2) VDROP IOUT = 5mA 4 10 mV
For all models IOUT = 250mA 150 220 mV
Over Temperature IOUT = 250mA 270 mV
VOLTAGE NOISE
f = 10Hz to 100kHz Vn
Without CNR (all models) CNR = 0, COUT = 0 23µVrms/V VOUT µVrms
With CNR (all fixed voltage models) CNR = 0.01µF, COUT = 10µF7µVrms/V VOUT µVrms
OUTPUT CURRENT
Current Limit(3) ICL 340 400 470 mA
Over Temperature 300 490 mA
Short-Circuit Current Limit ISC 150 mA
RIPPLE REJECTION
f = 120Hz 65 dB
ENABLE CONTROL
VENABLE High (output enabled) VENABLE 1.8 VIN V
VENABLE Low (output disabled) 0.2 0.5 V
IENABLE High (output enabled) IENABLE VENABLE = 1.8V to VIN, VIN = 1.8V to 6.5(4) 1 100 nA
IENABLE Low (output disabled) VENABLE = 0V to 0.5V 2 100 nA
Output Disable Time COUT = 1.0µF, RLOAD = 1350 µs
Output Enable Softstart Time COUT = 1.0µF, RLOAD = 131.5 ms
THERMAL SHUTDOWN
Junction Temperature
Shutdown 160 °C
Reset from Shutdown 140 °C
GROUND PIN CURRENT
Ground Pin Current IGND IOUT = 5mA 400 500 µA
IOUT = 250mA 600 800 µA
Enable Pin Low VENABLE 0.5V 0.01 0.2 µA
INPUT VOLTAGE VIN
Operating Input Voltage Range(5) 1.8 10 V
Specified Input Voltage Range VIN > 1.8V VOUT + 0.4 10 V
Over Temperature VIN > 1.8V VOUT + 0.6 10 V
TEMPERATURE RANGE
Specified Range TJ40 +85 °C
Operating Range TJ55 +125 °C
Storage Range TA65 +150 °C
Thermal Resistance
SOT23-5 Surface-Mount
θ
JA Junction-to-Ambient 200 °C/W
SO-8 Surface-Mount
θ
JA Junction-to-Ambient 150 °C/W
SOT223-5 Surface-Mount
θ
JC Junction-to-Case 15 °C/W
θ
JA Junction-to-Ambient See Figure 8 °C/W
NOTES: (1) The REG102 does not require a minimum output capacitor for stability, however, transient response can be improved with proper capacitor selection.
(2) Dropout voltage is defined as the input voltage minus the output voltage that produces a 2% change in the output voltage from the value at VIN = V OUT
+ 1V at fixed load.
(3) Current limit is the output current that produces a 10% change in output voltage from VIN = VOUT + 1V and IOUT = 5mA.
(4) For VENABLE > 6.5V, see typical characteristic
IENABLE vs V ENABLE
.
(5) The REG102 no longer regulates when VIN < VOUT + VDROP (MAX). In dropout, the impedance from V IN to VOUT is typically less than 1 at TJ = +25°C.
REG102
4SBVS024F
www.ti.com
TYPICAL CHARACTERISTICS
For all models, at TJ = +25°C and VENABLE = 1.8V, unless otherwise noted.
500 10025 75 150125 175 200 225 250
0.80
0.60
0.40
0.20
0
0.20
0.40
0.60
0.80
Output Voltage Change (%)
I
OUT
(mA)
OUTPUT VOLTAGE CHANGE vs I
OUT
(V
IN
= V
OUT
+ 1V, Output Voltage % Change
Referred to I
OUT
= 125mA at +25°C)
55°C
+125°C
+25°C
2550 0 7525 50 100 125
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
Output Voltage Change (%)
Temperature (°C)
LOAD REGULATION vs TEMPERATURE
(V
IN
= V
OUT
+ 1V)
5mA < I
OUT
< 250mA
25mA < I
OUT
< 250mA
012345 867
20
15
10
5
0
5
10
15
20
Output Voltage Change (mV)
V
IN
V
OUT
(V)
LINE REGULATION
(Referred to V
IN
= V
OUT
+ 1V at I
OUT
= 125mA)
I
OUT
= 5mA
All Fixed Output
Voltage Versions
I
OUT
= 125mA
I
OUT
= 250mA
50 25 0 25 50 75 100 125
0
0.05
0.10
0.15
0.20
0.25
0.30
Output Voltage Change (%)
Temperature (°C)
LINE REGULATION vs TEMPERATURE
IOUT = 250mA
(VOUT + 1V) < VIN < 10V
(VOUT + 0.4V) < VIN < 10V
0 50 150100 200 250
+125°C
250
200
150
100
50
0
DC Dropout Voltage (mV)
I
OUT
(mA)
DC DROPOUT VOLTAGE vs I
OUT
+25°C
55°C
50 125100755025025
250
200
150
100
50
0
DC Dropout Voltage (mV)
Temperature (°C)
DC DROPOUT VOLTAGE vs TEMPERATURE
IOUT = 250mA
REG102 5
SBVS024F www.ti.com
TYPICAL CHARACTERISTICS (Cont.)
For all models, at TJ = +25°C and VENABLE = 1.8V, unless otherwise noted.
1.0
0.8
0.6
0.4
0.2
0.0
0.2
0.4
0.6
0.8
1.0
18
16
14
12
10
8
6
4
2
0
Percentage of Units (%)
Error (%)
OUTPUT VOLTAGE ACCURACY HISTOGRAM
0
10
20
30
40
50
60
70
80
90
100
5
15
25
35
45
55
65
75
85
95
30
25
20
15
10
5
0
Percentage of Units (%)
VOUT Drift (ppm/°C)
OUTPUT VOLTAGE DRIFT HISTOGRAM
50 2525 0 50 75 100 125
0.80
0.60
0.40
0.20
0
0.20
0.40
0.60
0.80
1.00
Output Voltage Change (%)
Temperature (°C)
OUTPUT VOLTAGE vs TEMPERATURE
(Output Voltage % Change Refered
to I
OUT
= 125mA at +25°C)
I
OUT
= 5mA
I
OUT
= 250mA
I
OUT
= 125mA
50 2525 0 50 75 100 125
1µ
100n
10n
1n
100p
I
GND
(A)
Temperature (°C)
GROUND PIN CURRENT, NOT ENABLED
vs TEMPERATURE
V
ENABLE
= 0.5V
V
IN
= V
OUT
+ 1V
0507525 125100 175150 225200 250
800
700
600
500
400
300
200
100
0
I
GND
(µA)
I
OUT
(mA)
GROUND PIN CURRENT vs I
OUT
V
OUT
= 2.5V
V
OUT
= 3.3V
V
OUT
= 5.0V
50 25 0 25 50 75 125100
750
725
700
675
650
625
600
575
550
IGND (µA)
Temperature (°C)
GROUND PIN CURRENT vs TEMPERATURE
IOUT = 250mA
VOUT = 5V
VOUT = 3.3V
VOUT = 2.5V
REG102
6SBVS024F
www.ti.com
TYPICAL CHARACTERISTICS (Cont.)
For all models, at TJ = +25°C and VENABLE = 1.8V, unless otherwise noted.
10 100 1k 10k 100k 10M1M
80
70
60
50
40
30
20
10
0
Ripple Rejection (dB)
Frequency (Hz)
RIPPLE REJECTION vs FREQUENCY
I
OUT
= 2mA
I
OUT
= 100mA
I
OUT
= 2mA
C
OUT
= 10µFI
OUT
= 100mA
C
OUT
= 10µF
C
OUT
= 0µF
1.0 0.9 0.60.8 0.7 0.5 0.4 0.3 00.2 0.1
30
25
20
15
10
5
0
Ripple Rejection (dB)
VIN VOUT (V)
RIPPLE REJECTION vs (VIN VOUT)
Frequency = 100kHz
COUT = 10µF
VOUT = 3.3V
IOUT = 100mA
1 100 1k10
REG102-5.0
REG102-3.3
REG102-2.5
10k
110
100
90
80
70
60
50
40
30
20
Noise Voltage (µVrms)
CNR (pF)
RMS NOISE VOLTAGE vs CNR
COUT = 0µF
10Hz < BW < 100kHz
10 100 1k 10k 100k
10
1
0.1
0.01
eN (µV/Hz)
Frequency (Hz)
NOISE SPECTRAL DENSITY
IOUT = 100mA
CNR = 0µF
COUT = 1µF
COUT = 0µF
COUT = 10µF
10 100 1k 10k 100k
10
1
0.1
0.01
eN (µV/Hz)
Frequency (Hz)
NOISE SPECTRAL DENSITY
IOUT = 100mA
CNR = 0.01µF
COUT = 1µF
COUT = 0µF
COUT = 10µF
0.1 1 10
60
50
40
30
20
10
0
Noise Voltage (µVrms)
C
OUT
(µF)
RMS NOISE VOLTAGE vs C
OUT
REG102-5.0
REG102-3.3
REG102-2.5
C
OUT
= 0.01µF
10Hz < BW < 100kHz
REG102 7
SBVS024F www.ti.com
TYPICAL CHARACTERISTICS (Cont.)
For all models, at TJ = +25°C and VENABLE = 1.8V, unless otherwise noted.
0 50 100 150 200 250 300 350
ISC
ICL
400 450
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
Output Voltage (V)
Output Current (mA)
CURRENT LIMIT FOLDBACK
REG102-3.3
50 25 0 25 50 75 125100
450
400
350
300
250
200
150
100
I
OUT
(mA)
Temperature (°C)
CURRENT LIMIT vs TEMPERATURE
V
IN
= V
OUT
+ 1V
I
CL
= Current Limit
I
SC
= Short-Circuit Current
LOAD TRANSIENT RESPONSE
10µs/div
REG102-3.3
V
IN
= 4.3V
250mA
200mV/div200mV/div
I
OUT
V
OUT
V
OUT
25mA
C
OUT
= 0µF
C
OUT
= 10µF
LINE TRANSIENT RESPONSE
50µs/div
5.3V
50mV/div50mV/div
V
IN
V
OUT
V
OUT
4.3V
REG102-3.3
I
OUT
= 250mA
C
OUT
= 0
C
OUT
= 10µF
TURN-ON
250µs/div
1V/div1V/div
V
ENABLE
V
OUT
REG102-3.3
VIN = VOUT + 1V
CNR = 0.01µF
COUT = 10µF
RLOAD = 13
COUT = 0µF
RLOAD = 13
COUT = 0µF
RLOAD = 660
TURN-OFF
200µs/div
1V/div1V/div
V
ENABLE
V
OUT
REG102-3.3
COUT = 10µF
RLOAD = 13
COUT = 1.0µF
RLOAD = 13
COUT = 0µF
RLOAD = 660
REG102
8SBVS024F
www.ti.com
TYPICAL CHARACTERISTICS (Cont.)
For all models, at TJ = +25°C and VENABLE = 1.8V, unless otherwise noted.
678910
10µ
1.0µ
100n
10n
1n
I
ENABLE
(A)
V
ENABLE
(V)
I
ENABLE
vs V
ENABLE
T = +25°C
T = 55°C
T = +125°C
POWER UP/POWER DOWN
1s/div
500mV/div
V
OUT
= 3.0V
R
LOAD
= 12
10 100 1k 10k 100k
80
70
60
50
40
30
20
V
N
(rms)
C
ADJ
(pF)
RMS NOISE VOLTAGE vs C
ADJ
V
OUT
= 3.3V
C
OUT
= 0.1µF
10Hz < frequency < 100kHz
50 25 0 25 50 75 100 125
0.350
0.300
0.250
0.200
0.150
0.100
0.050
0
IADJ (µA)
Temperature (°C)
ADJUST PIN CURRENT vs TEMPERATURE
200mV/div
200mV/div
25mA
VOUT
COUT = 0
REG102A
VIN = 4.3V
VOUT = 3.3V
COUT = 10µFVOUT
IOUT
250mA
LOAD TRANSIENT-ADJUSTABLE VERSION
50mV/div
50mV/div
4.3V
V
OUT
C
OUT
= 0
REG102A
I
OUT
= 250mA
C
FB
= 0.01µF
V
OUT
= 3.3V
C
OUT
= 10µFV
OUT
V
IN
5.3V
LINE TRANSIENT-ADJUSTABLE VERSION
REG102 9
SBVS024F www.ti.com
FIGURE 1. Fixed Voltage Nominal Circuit for the REG102.
REG102
Enable
VOUT
COUT
VIN
0.1µF
CNR
0.01µF
GND NR
In Out
Optional
FIGURE 2. Adjustable Voltage Circuit for the REG102A.
FIGURE 3. Foldback Current Limit of the REG102-3.3 at 25°C.
V
OUT
= (1 + R
1
/R
2
) 1.26V
Pin numbers for the SOT-223 package.
REG102
V
IN
0.1µF
3
1
Gnd
V
OUT
R
1
C
FB
0.01µFC
OUT
Adj
R
2
I
ADJ
Load
2
4
5
Enable
To reduce current through divider, increase resistor
values (see table at right).
As the impedance of the resistor divider increases,
I
ADJ
(~200nA) may introduce an error.
C
FB
improves noise and transient response.
V
OUT
(V) R
1
()
(1)
R
2
()
(1)
2.5 11.3k 11.5k
1.13k 1.15k
3.0 15.8k 11.5k
1.58k 1.15k
3.3 18.7k 11.5k
1.87k 1.15k
5.0 34.0k 11.5k
3.40k 1.15k
NOTE: (1) Resistors are standard 1% values.
EXAMPLE RESISTOR VALUES
Optional
0 50 100 150 200 250 300 350
I
SC
I
CL
400 450
3.5
3
2.5
2
1.5
1
0.5
0
Output Voltage (V)
Output Current (mA)
CURRENT LIMIT FOLDBACK
REG102-3.3
BASIC OPERATION
The REG102 series of LDO (low dropout) linear regulators
offers a wide selection of fixed output voltage versions and
an adjustable output version as well. The REG102 belongs
to a family of new generation LDO regulators that use a
DMOS pass transistor to achieve ultra low-dropout perfor-
mance and freedom from output capacitor constraints. Ground
pin current remains under 1mA over all line, load, and
temperature conditions. All versions have thermal and over-
current protection, including foldback current limit.
The REG102 does not require an output capacitor for regulator
stability and is stable over most output currents and with almost
any value and type of output capacitor up to 10µF or more. For
applications where the regulator output current drops below
several milliamps, stability can be enhanced by adding a 1k
to 2k load resistor, using capacitance values smaller than
10µF, or keeping the effective series resistance greater than
0.05 including the capacitor ESR and parasitic resistance in
printed circuit board traces, solder joints, and sockets.
Although an input capacitor is not required, it is a good
standard analog design practice to connect a 0.1µF low ESR
capacitor across the input supply voltage. This is recom-
mended to counteract reactive input sources and improve
ripple rejection by reducing input voltage ripple.
Figure 1 shows the basic circuit connections for the fixed
voltage models. Figure 2 gives the connections for the adjust-
able output version (REG102A) and example resistor values for
some commonly used output voltages. Values for other volt-
ages can be calculated from the equation shown in Figure 2.
INTERNAL CURRENT LIMIT
The REG102 internal current limit has a typical value of
400mA. A foldback feature limits the short-circuit current to a
typical short-circuit value of 150mA, which helps to protect
the regulator from damage under all load conditions. A
characteristic of VOUT versus IOUT is given in Figure 3 and in
the Typical Characteristics section.
REG102
10 SBVS024F
www.ti.com
FIGURE 4. Block Diagram.
FIGURE 5. Output Noise versus Noise Reduction Capacitor.
0.1 100 1k10 10k
110
100
90
80
70
60
50
40
30
20
Noise Voltage (Vrms)
CNR (pF)
RMS NOISE VOLTAGE vs CNR
REG102-5.0
REG102-3.3
REG102-2.5
COUT = 0µF
10Hz < BW < 100kHz
Over-Current
Over Temp
Protection
V
REF
(1.26V)
Low-Noise
Charge Pump
DMOS
Output
R
1
NOTE: R
1
and R
2
are internal
on fixed output versions.
V
OUT
Adj
(adjustable
versions)
R
2
NR
(fixed output
versions only)
Enable
REG102
V
IN
C
NR
(optional)
ENABLE
The Enable pin is active high and compatible with standard
TTL-CMOS levels. Inputs below 0.5V (max) turn the regula-
tor off and all circuitry is disabled. Under this condition,
ground pin current drops to approximately 10nA. When not
used, the Enable pin can be connected to VIN. When a pull-
up resistor is used, and operation below 1.8V is required, use
pull-up resistor values below 50k.
OUTPUT NOISE
A precision bandgap reference is used to generate the
internal reference voltage, VREF. This reference is the domi-
nant noise source within the REG102 and generates approxi-
mately 29µVrms in the 10Hz to 100kHz bandwidth at the
reference output. The regulator control loop gains up the
reference noise, so that the noise voltage of the regulator is
approximately given by:
V VrmsRR
RVrms V
V
NOUT
REF
+ 29 229
12
(1)
As the value of VREF is 1.26V, this relationship reduces to:
VVrms
VV
NOUT
=µ23
(2)
Connecting a capacitor, CNR, from the Noise Reduction (NR)
pin to ground forms a low-pass filter for the voltage refer-
ence. Adding CNR (as shown in Figure 4) forms a low-pass
filter for the voltage reference. For CNR = 10nF, the total noise
in the 10Hz to 100kHz bandwidth is reduced by approxi-
mately a factor of 2.8 for VOUT = 3.3V. This noise reduction
effect is shown in Figure 5 and as
RMS Noise Voltage vs C
NR
in the Typical Characteristics section.
Noise can be further reduced by carefully choosing an output
capacitor, COUT. Best overall noise performance is achieved
with very low (< 0.22µF) or very high (> 2.2µF) values of COUT
(see the
RMS Noise Voltage vs C
OUT
typical characteristic).
The REG102 uses an internal charge pump to develop an
internal supply voltage sufficient to drive the gate of the
DMOS pass element above VIN. The charge-pump switching
noise (nominal switching frequency = 2MHz) is not measur-
able at the output of the regulator over most values of IOUT
and COUT.
The REG102 adjustable version does not have the noise-
reduction pin available; however, the adjust pin is the sum-
ming junction of the error amplifier. A capacitor, CFB, con-
nected from the output to the adjust pin can reduce both the
output noise and the peak error from a load transient (see the
typical characteristics for output noise performance).
REG102 11
SBVS024F www.ti.com
FIGURE 6. Transient and DC Dropout.
350
300
250
200
150
100
50
0
Dropout Voltage (mV)
0 50 100 150 200
DC
250
I
OUT
(mA)
DROPOUT VOLTAGE vs I
OUT
0mA to I
OUT
Transient
DROPOUT VOLTAGE
The REG102 uses an N-channel DMOS as the pass element.
When (V
IN
V
OUT
) is less than the drop-out voltage (V
DROP
),
the DMOS pass device behaves like a resistor; therefore, for
low values of (V
IN
V
OUT
), the regulator input-to-output
resistance is the Rds
ON
of the DMOS pass element (typically
600m). For static (DC) loads, the REG102 typically main-
tains regulation down to a (V
IN
V
OUT
) voltage drop of 150mV
at full rated output current. In Figure 6, the bottom line (DC
dropout) shows the minimum V
IN
to V
OUT
voltage drop re-
quired to prevent dropout under DC load conditions.
For large step changes in load current, the REG102 requires
a larger voltage drop across it to avoid degraded transient
response. The boundary of this transient drop-out region is
shown as the top line in Figure 6 and values of VIN to VOUT
voltage drop above this line insure normal transient re-
sponse.
case conditions (full-scale load change with (VIN V
OUT)
voltage drop close to DC dropout levels), the REG102 can
take several hundred microseconds to re-enter the specified
window of regulation.
TRANSIENT RESPONSE
The REG102 response to transient line and load conditions
improves at lower output voltages. The addition of a capacitor
(nominal value 0.47µF) from the output pin to ground can
improve the transient response. In the adjustable version, the
addition of a capacitor, CFB (nominal value 10nF), from the
output to the adjust pin can also improve the transient
response.
THERMAL PROTECTION
Power dissipated within the REG102 can cause the junction
temperature to rise. The REG102 has thermal shutdown
circuitry that protects the regulator from damage which dis-
ables the output when the junction temperature reaches
approximately 160°C, allowing the device to cool. When the
junction temperature cools to approximately 140°C, the out-
put circuitry is again enabled. Depending on various condi-
tions, the thermal protection circuit can cycle on and off. This
limits the dissipation of the regulator, but can have an
undesirable effect on the load.
Any tendency to activate the thermal protection circuit indi-
cates excessive power dissipation or an inadequate heat
sink. For reliable operation, junction temperature must be
limited to 125°C, maximum. To estimate the margin of safety
in a complete design (including heat sink), increase the
ambient temperature until the thermal protection is triggered;
use worst-case loads and signal conditions. For good reliabil-
ity, thermal protection should trigger more than 35°C above
the maximum expected ambient condition of the application.
This produces a worst-case junction temperature of 125°C at
the highest expected ambient temperature and worst-case
load.
The internal protection circuitry of the REG102 is designed to
protect against overload conditions and is not intended to
replace proper heat sinking. Continuously running the REG102
into thermal shutdown will degrade reliability.
In the transient dropout region between DC and Transient,
transient response recovery time increases. The time required
to recover from a load transient is a function of both the
magnitude and rate of the step change in load current and the
available headroom VIN to VOUT voltage drop. Under worst-
REG102
12 SBVS024F
www.ti.com
FIGURE 7. Maximum Power Dissipation versus Ambient Temperature for the Various Packages and PCB Heat Sink Configurations.
FIGURE 8. Thermal Resistance versus PCB Area for the Five-Lead SOT-223.
THERMAL RESISTANCE vs PCB COPPER AREA
180
160
140
120
100
80
60
40
20
0
Thermal Resistance, JA (°C/W)
θ
012345
Copper Area (inches2)
Circuit-Board Copper Area
REG102
SOT-223 Surface-Mount Package
REG102
Surface-Mount Package
1 oz. copper
2.5
2
1.5
1
0.5
0
Power Dissipation (Watts)
0 25 50 75 125100
Ambient Temperature (°C)
DEVICE DISSIPATION vs TEMPERATURE
CONDITION P ACKAGE PCB AREA
JA
1 SOT-223 4in2 Top Side Only 53°C/W
2 SOT-223 0.5in2 Top Side Only 110°C/W
3 SO-8 150°C/W
4 SOT-23 200°C/W
CONDITIONS
#1
#2
#3
#4
θ
POWER DISSIPATION
The REG102 is available in three different package configu-
rations. The ability to remove heat from the die is different for
each package type and, therefore, presents different consid-
erations in the printed circuit board (PCB) layout. The PCB
area around the device that is free of other components
moves the heat from the device to the ambient air. Although
it is difficult to impossible to quantify all of the variables in a
thermal design of this type, performance data for several
simplified configurations are shown in Figure 7. In all cases,
the PCB copper area is bare copper (free of solder resist
mask), not solder plated, and are for 1-ounce copper. Using
heavier copper will increase the effectiveness in moving the
heat from the device. In those examples where there is
copper on both sides of the PCB, no connection has been
provided between the two sides. The addition of plated
through holes will improve the heat sink effectiveness.
Power dissipation depends on input voltage, load conditions,
and duty cycle and is equal to the product of the average
output current times the voltage across the output element,
VIN to VOUT voltage drop.
PVV I
DIN
OUT OUT
=•()
(3)
Power dissipation can be minimized by using the lowest
possible input voltage necessary to assure the required
output voltage.
REGULATOR MOUNTING
The tab of the SOT-223 package is electrically connected to
ground. For best thermal performance, this tab must be
soldered directly to a circuit-board copper area. Increasing
the copper area improves heat dissipation, as shown in
Figure 8.
Although the tab of the SOT-223 is electrical ground, it is not
intended to carry current. The copper pad that acts as a heat
sink should be isolated from the rest of the circuit to prevent
current flow through the device from the tab to the ground
pin. Solder pad footprint recommendations for the various
REG102 devices are presented in Application Bulletin
Solder
Pad Recommendations for Surface-Mount Devices
(SBFA015), available from the Texas Instruments web site
(www.ti.com).
PACKAGE OPTION ADDENDUM
www.ti.com 17-Aug-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
REG102GA-2.5 ACTIVE SOT-223 DCQ 6 78 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102GA-2.5G4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102GA-2.85 ACTIVE SOT-223 DCQ 6 78 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102GA-2.85G4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102GA-3 ACTIVE SOT-223 DCQ 6 78 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102GA-3.3 ACTIVE SOT-223 DCQ 6 78 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102GA-3.3/2K5 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102GA-3.3/2K5G4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102GA-3.3G4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102GA-3G4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102GA-5 ACTIVE SOT-223 DCQ 6 78 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102GA-5/2K5 ACTIVE SOT-223 DCQ 6 TBD Call TI Call TI
REG102GA-5/2K5G4 ACTIVE SOT-223 DCQ 6 TBD Call TI Call TI
REG102GA-5G4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102GA-A ACTIVE SOT-223 DCQ 6 78 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102GA-A/2K5 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102GA-A/2K5G4 ACTIVE SOT-223 DCQ 6 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102GA-AG4 ACTIVE SOT-223 DCQ 6 78 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
PACKAGE OPTION ADDENDUM
www.ti.com 17-Aug-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
REG102NA-2.5/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-2.5/250G4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-2.8/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-2.8/250G4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-2.85/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-2.85/3K ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-2.85/3KG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-285/250G4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-3.3/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-3.3/250G4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-3.3/3K ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-3.3/3KG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-3/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-3/250G4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-3/3K ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-3/3KG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-5/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-5/250G4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 17-Aug-2012
Addendum-Page 3
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
REG102NA-5/3K ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-5/3KG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-A/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-A/250G4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-A/3K ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102NA-A/3KG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
REG102UA-2.5 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102UA-2.5G4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102UA-3 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102UA-3.3 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102UA-3.3/2K5 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102UA-3.3/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102UA-3.3G4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102UA-3G4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102UA-5 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102UA-5/2K5 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102UA-5/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102UA-5G4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
PACKAGE OPTION ADDENDUM
www.ti.com 17-Aug-2012
Addendum-Page 4
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
REG102UA-A ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102UA-A/2K5 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102UA-A/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
REG102UA-AG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
REG102GA-3.3/2K5 SOT-223 DCQ 6 2500 330.0 12.4 6.8 7.3 1.88 8.0 12.0 Q3
REG102GA-A/2K5 SOT-223 DCQ 6 2500 330.0 12.4 6.8 7.3 1.88 8.0 12.0 Q3
REG102NA-2.5/250 SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG102NA-2.8/250 SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG102NA-2.85/250 SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG102NA-2.85/3K SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG102NA-3.3/250 SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG102NA-3.3/3K SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG102NA-3/250 SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG102NA-3/3K SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG102NA-5/250 SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG102NA-5/3K SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG102NA-A/250 SOT-23 DBV 5 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG102NA-A/3K SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
REG102UA-3.3/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
REG102UA-5/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
REG102UA-A/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 17-Aug-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
REG102GA-3.3/2K5 SOT-223 DCQ 6 2500 358.0 335.0 35.0
REG102GA-A/2K5 SOT-223 DCQ 6 2500 358.0 335.0 35.0
REG102NA-2.5/250 SOT-23 DBV 5 250 203.0 203.0 35.0
REG102NA-2.8/250 SOT-23 DBV 5 250 203.0 203.0 35.0
REG102NA-2.85/250 SOT-23 DBV 5 250 203.0 203.0 35.0
REG102NA-2.85/3K SOT-23 DBV 5 3000 203.0 203.0 35.0
REG102NA-3.3/250 SOT-23 DBV 5 250 203.0 203.0 35.0
REG102NA-3.3/3K SOT-23 DBV 5 3000 203.0 203.0 35.0
REG102NA-3/250 SOT-23 DBV 5 250 203.0 203.0 35.0
REG102NA-3/3K SOT-23 DBV 5 3000 203.0 203.0 35.0
REG102NA-5/250 SOT-23 DBV 5 250 203.0 203.0 35.0
REG102NA-5/3K SOT-23 DBV 5 3000 203.0 203.0 35.0
REG102NA-A/250 SOT-23 DBV 5 250 203.0 203.0 35.0
REG102NA-A/3K SOT-23 DBV 5 3000 203.0 203.0 35.0
REG102UA-3.3/2K5 SOIC D 8 2500 367.0 367.0 35.0
REG102UA-5/2K5 SOIC D 8 2500 367.0 367.0 35.0
REG102UA-A/2K5 SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 17-Aug-2012
Pack Materials-Page 2
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