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FEATURES
TO–220 (KC) PACKAGE
(TOP VIEW)
1
2
3
4
5
EN
IN
GND
OUTPUT
FB/PG
1
TO–263 (KTT) PACKAGE
(TOP VIEW)
2
3
4
5
EN
IN
GND
OUTPUT
FB/PG
DESCRIPTION
TJ – Junction Temperature – °C
–40 35 11050
– Dropout Voltage – mV
VDO
TPS75933
DROPOUT VOLTAGE
vs
JUNCTION TEMPERATURE
600
125
500
400
300
200
100
0
IO = 7.5 A
–25 –10 –5 20 65 9580 t – Time – µs
TPS75915
LOAD TRANSIENT RESPONSE
I – Output Current – A
O
–200
0
0 604020 80 100 140120 160 180 200
0
100
–100
VO = 1.5 V
Co = 100 µF
10
5
200
di
dt 1 A
s
VO
∆– Change in Output Voltage – mV
TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
POWER GOOD FAST-TRANSIENT RESPONSE 7.5-ALOW-DROPOUT VOLTAGE REGULATORS
•7.5-A Low-Dropout Voltage Regulator•Available in 1.5-V, 1.8-V, 2.5-V, and 3.3-VFixed-Output and Adjustable Versions•Open Drain Power-Good (PG) Status Output(Fixed Options Only)•Dropout Voltage Typically 400 mV at 7.5 A(TPS75933)
•Low 125 µA Typical Quiescent Current•Fast Transient Response•3% Tolerance Over Specified Conditions forFixed-Output Versions•Available in 5-Pin TO-220 and TO-263Surface-Mount Packages•Thermal Shutdown Protection
The TPS759xx family of 7.5-A low dropout (LDO) regulators contains four fixed voltage option regulators withintegrated power-good (PG) and an adjustable voltage option regulator. These devices are capable of supplying7.5 A of output current with a dropout of 400 mV (TPS75933). Therefore, the devices are capable of performing a3.3-V to 2.5-V conversion. Quiescent current is 125 µA at full load and drops below 10 µA when the devices aredisabled. The TPS759xx is designed to have fast transient response for large load current changes.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2000–2004, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
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(1) See application information section for capacitor selection details.
PG
OUT
2
1
IN
EN
GND
3
5
4
VIPG
VO
47 µF
+Co(1)
1 µF
TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 400 mV atan output current of 7.5 A for the TPS75933) and is directly proportional to the output current. Additionally, sincethe PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of outputloading (typically 125 µA over the full range of output current, 1 mA to 7.5 A). These two key specifications yielda significant improvement in operating life for battery-powered systems.
The device is enabled when EN is connected to a low-level voltage. This LDO family also features a sleep mode;applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to less than1 µA at T
J
= 25°C. The power-good terminal (PG) is an active low, open drain output, which can be used toimplement a power-on reset or a low-battery indicator.
The TPS759xx is offered in 1.5-V, 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in an adjustable version(programmable over the range of 1.22 V to 5 V). Output voltage tolerance is specified as a maximum of 3% overline, load, and temperature ranges. The TPS759xx family is available in a 5-pin TO-220 (KC) and TO-263 (KTT)packages.
AVAILABLE OPTIONS
OUTPUT VOLTAGE TO-220 TO-263T
J
(TYP) (KC) (KTT)
(1)
3.3 V TPS75933KC TPS75933KTT2.5 V TPS75925KC TPS75925KTT-40°C to 125°C 1.8 V TPS75918KC TPS75918KTT1.5 V TPS75915KC TPS75915KTTAdjustable 1.22 V to 5 V TPS75901KC TPS75901KTT
(1) The TPS75901 is programmable using an external resistor divider (see application information). Add Tfor KTT devices in 50-piece reel.Add Rfor KTT devices in 500-piece reel.
Figure 1. Typical Application Configuration (For Fixed Output Options)
Terminal Functions (TPS759xx)
TERMINAL
I/O DESCRIPTIONNAME NO.
EN 1 I Enable inputFB/PG 5 I/O Feedback input voltage for adjustable device/PG output for fixed optionsGND 3 Regulator groundIN 2 I Input voltageOUTPUT 4 O Regulated output voltage
2
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_+
Thermal
Shutdown
Bandgap
Reference
VIN
Current
Sense
R2
VIN
GND
EN
VOUT
SHUTDOWN
Vref = 1.22 V
UVLO
ILIM
External to
the Device
FB
R1
UVLO
_+
Thermal
Shutdown
Falling
Edge Delay
VIN
Current
Sense
R1
R2
VIN
GND
EN
VOUT
PG
SHUTDOWN
Vref = 1.22 V
UVLO
ILIM
Bandgap
Reference
UVLO
TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
FUNCTIONAL BLOCK DIAGRAM - ADJUSTABLE VERSION
FUNCTIONAL BLOCK DIAGRAM - FIXED VERSION
3
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TPS759xx PG TIMING DIAGRAM
NOTE A: VIT –Trip voltage is typically 9% lower than the output voltage (91%VO) VIT– to VIT+ is the hysteresis voltage.
t
t
t
Threshold
Voltage
PG
Output
VIT+(see Note A)
VIN1
VOUT
VIT–
(see Note A)
VUVLO
VUVLO
DETAILED DESCRIPTION
PIN FUNCTIONS
Enable (EN)
Power-Good (PG)
Feedback (FB)
TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
The TPS759xx family includes four fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, and 3.3 V), and anadjustable regulator, the TPS75901 (adjustable from 1.22 V to 5 V). The bandgap voltage is typically 1.22 V.
The EN terminal is an input which enables or shuts down the device. If EN is a logic high, the device will be inshutdown mode. When EN goes to logic low, then the device will be enabled.
The PG terminal for the fixed voltage option devices is an open drain, active low output that indicates the statusof V
O
(output of the LDO). When V
O
reaches approximately 91% of the regulated voltage, PG will go to a lowimpedance state. It will go to a high-impedance state when V
O
falls below 91% (i.e., over load condition) of theregulated voltage. The open drain output of the PG terminal requires a pullup resistor.
FB is an input terminal used for the adjustable-output option and must be connected to the output terminal eitherdirectly, in order to generate the minimum output voltage of 1.22 V, or through an external feedback resistordivider for other output voltages. The FB connection should be as short as possible. It is essential to route it insuch a way to minimize/avoid noise pickup. Adding RC networks between FB terminal and V
O
to filter noise isnot recommended because it may cause the regulator to oscillate.
4
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Input Voltage (IN)
Output Voltage (OUTPUT)
ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATING TABLE
RECOMMENDED OPERATING CONDITIONS
TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
The V
IN
terminal is an input to the regulator.
The V
OUTPUT
terminal is an output to the regulator.
over operating junction temperature range (unless otherwise noted)
(1)
TPS759XX
Input voltage range
(2)
V
I
-0.3 V to 6 VVoltage range at EN -0.3 V to 6 VMaximum PG voltage (TPS759xx) 6 VPeak output current Internally limitedContinuous total power dissipation See Dissipation Rating TableOutput voltage V
O
(OUTPUT, FB) 5.5 VOperating junction temperature range T
J
-40°C to 150°CStorage temperature range T
stg
-65°C to 150°CESD rating HBM 2 kVCDM 500 V
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under recommended operatingconditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) All voltage values are with respect to network terminal ground.
PACKAGE R
ΘJC
(°C/W) R
ΘJA
(°C/W)
(1)
TO-220 2 58.7
(2)
TO-263 2 38.7
(3)
(1) For both packages, the R
ΘJA
values were computed using JEDEChigh K board (2S2P) with 1 ounce internal copper plane and groundplane. There was no air flow across the packages.(2) R
ΘJA
was computed assuming a vertical, free standing TO-220package with pins soldered to the board. There is no heatsinkattached to the package.(3) R
ΘJA
was computed assuming a horizontally mounted TO-263package with pins soldered to the board. There is no copper padunderneath the package.
MIN MAX UNIT
V
I
(1)
Input voltage 2.8 5.5 VV
O
Output voltage range 1.22 5 VI
O
Output current 0 7.5 AT
J
Operating virtual junction temperature -40 125 °C
(1) To calculate the minimum input voltage for your maximum output current, use the following equation: V
I(min)
= V
O(max)
+ V
DO(max load)
.
5
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Line regulator (mV) (%V)
VOVImax VO1V
100 1000
ELECTRICAL CHARACTERISTICS
TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
over recommended operating junction temperature range (T
J
= -40°C to 125°C), V
I
= V
O(typ)
+ 1 V, I
O
= 1 mA, EN = 0 V,C
O
= 100 µF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
1.22 V ≤V
O
≤5.5 V, T
J
= 25°C V
O
1.22 V ≤V
O
≤5.5 V 0.97 V
O
1.03 V
OAdjustable voltage V1.22 V ≤V
O
≤5.5 V, T
J
= 0 to
0.98 V
O
1.02 V
O125°C
(2)
T
J
= 25°C, 2.8 V < V
I
< 5.5 V 1.51.5 V Output
2.8 V ≤V
I
≤5.5 V 1.455 1.545
VOutput voltage
(1)
T
J
= 25°C, 2.8 V < V
I
< 5.5 V 1.81.8 V Output
2.8 V ≤V
I
≤5.5 V 1.746 1.854T
J
= 25°C, 3.5 V < V
I
< 5.5 V 2.52.5 V Output V3.5 V ≤V
I
≤5.5 V 2.425 2.575T
J
= 25°C, 4.3 V < V
I
< 5.5 V 3.33.3 V Output V4.3 V ≤V
I
≤5.5 V 3.201 3.399T
J
= 25°C 125Quiescent current (GND current)
(3), (4)
µA200V
O
+ 1 V ≤V
I
≤5.5 V, T
J
= 25°C 0.04Output voltage line regulation (∆V
O
/V
O
)
(4)
%/VV
O
+ 1 V ≤V
I
< 5.5 V 0.1Load regulation
(3)
0.35 %/VBW = 300 Hz to 50 kHz, T
J
= 25°C,Output noise voltage TPS75915 35 µVrmsV
I
= 2.8 VOutput current limit V
O
= 0 V 8 10 14 AThermal shutdown junction temperature 150 °CEN = V
I
, T
J
= 25°C 0.1 µAStandby current
EN = V
I
10 µAFB input current TPS75901 FB = 1.5 V -1 1 µAPower supply ripple rejec- f = 100 Hz, T
J
= 25°C, V
I
= 2.8 V,TPS75915 58 dBtion I
O
= 7.5 AMinimum input voltage for valid PG I
O(PG)
= 300 µA, V
(PG)
≤0.8 V 0 VPG trip threshold voltage Fixed options only V
O
decreasing 89 93 %V
O
PGhysteresis voltage Fixed options only Measured at V
O
0.5 %V
O
PGoutput low voltage Fixed options only V
I
= 2.8 V, I
O(PG)
= 1 mA 0.15 0.4 VPG leakage current Fixed options only V
(PG)
= 5 V 1 µAEN = V
I
-1 1 µAInput current (EN)
EN = 0 V -1 0 1 µAHigh level EN input voltage 2 VLow level EN input voltage 0.7 V
(1) I
O
= 0 mA to 7.5 A(2) The adjustable option operates with a 2% tolerance over T
J
= 0 to 125°C.(3) I
O
= 0 mA to 7.5 A(4) If V
O
≤1.8 V then V
Imin
= 2.8 V, V
Imax
= 5.5 V:
If V
O
≥2.5 V then V
Imin
= V
O
+ 1 V, V
Imax
= 5.5 V:
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TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
ELECTRICAL CHARACTERISTICS (continued)over recommended operating junction temperature range (T
J
= -40°C to 125°C), V
I
= V
O(typ)
+ 1 V, I
O
= 1 mA, EN = 0 V,C
O
= 100 µF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I
O
= 7.5 A, V
I
= 3.2 V, T
J
= 25°C 400 mVDropout voltage (3.3 V out-put)
(5)V
O
I
O
= 7.5 A, V
I
= 3.2 V 750 mVDischarge transistor current VO = 1.5 V, T
J
= 25°C 10 25 mAUVLO T
J
= 25°C, V
I
rising 2.2 2.75 VV
I
UVLO hysteresis T
J
= 25°C, V
I
falling 100 mV
(5) IN voltage equals V
O
(Typ) - 100 mV; TPS75915, TPS75918, and TPS75925 dropout voltage limited by input voltage range limitations(i.e., TPS75933 input voltage is set to 3.2 V for the purpose of this test).
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TYPICAL CHARACTERISTICS
Table of Graphs
IO − Output Current − A
1.530
1.485
1.515
1.5
1.470
1.545
0
− Output Voltage − V
VO
1.455 1.5 7.53
VI = 2.8 V
TJ = 25°C
4.5 6
IO − Output Current − A
3.330
3.270
3.315
3.285
3.255 1.5 7.5
3.345
0
− Output Voltage − V
VO
4.5
VI = 4.3 V
TJ = 25°C
3 6
3.3
TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
FIGURE
vs Output current 2, 3V
O
Output voltage
vs Junction temperature 4, 5Ground current vs Junction temperature 6Power supply ripple rejection vs Frequency 7Output spectral noise density vs Frequency 8z
o
Output impedance vs Frequency 9vs Input voltage 10V
DO
Dropout voltage
vs Junction temperature 11V
I
Minimum required input voltage vs Output voltage 12Line transient response 13, 15Load transient response 14, 16V
O
Output voltage and enable voltage vs Time (start-up) 17Equivalent series resistance (ESR) vs Output current 19, 20
TPS75933 TPS75915OUTPUT VOLTAGE OUTPUT VOLTAGEvs vsOUTPUT CURRENT OUTPUT CURRENT
Figure 2. Figure 3.
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TJ − Junction Temperature − °C
− Output Voltage − V
VO
3.315
5 125
3.33
3.3
20 80
3.270
3.285
3.255
3.345 VI = 4.3 V
−40 −25 10 35 50 65 11095
TJ − Junction Temperature − °C
− Output Voltage − V
VO
1.470
1.485
1.455
1.530
VI = 2.8 V
1.5
1.515
1.545
−40 20 11035 95−25 −10 5 50 65 80 125
−40 −25 −10 5 20 35 50 65 80 95 110 125
TJ − Junction Temperature − °C
Ground Current − Aµ
102
104
106
108
110
112
114
116
118 VI = 5 V
IO = 7.5 A
100k10k
PSRR − Power Supply Ripple Rejection − dB
f − Frequency − Hz
70
60
50
40
30
20
10
0
90
80
1k10010 1M
IO = 1 mA
IO = 7.5 A
10M
VI = 4.3 V
Co = 100 µF
TJ = 25°C
TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
TYPICAL CHARACTERISTICS (continued)
TPS75933 TPS75915OUTPUT VOLTAGE OUTPUT VOLTAGEvs vsJUNCTION TEMPERATURE JUNCTION TEMPERATURE
Figure 4. Figure 5.
TPS759xx TPS75933GROUND CURRENT POWER SUPPLY RIPPLE REJECTIONvs vsJUNCTION TEMPERATURE FREQUENCY
Figure 6. Figure 7.
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0
0.5
1
1.5
2
2.5
IO = 7.5 A
IO = 1 mA
f − Frequency − Hz
1010 100 1k 10k 100k
VI = 4.3 V
VO = 3.3 V
Co = 100 µF
TJ = 25°C
V/ HzOutput Spectral Noise Density − µ
f − Frequency − Hz
− Output Impedance −zoΩ
10 100 100k 1M
0.001
10k1k 10M
1
100
IO = 1 mA
0.01
0.1
10
IO = 7.5 A
0.0001
0.00001
VI = 4.3 V
Co = 100 µF
TJ = 25°C
VI − Input Voltage − V
03 4
500
400
300
3.52.5
− Dropout Voltage − mV
200
4.5 5
VDO
700
600
IO = 7.5 A
TJ = 25°C
TJ = −40°C
TJ = 125°C
100
TJ − Junction Temperature − °C
−40 35 11050
− Dropout Voltage − mV
VDO
600
125
500
400
300
200
100
0
IO = 7.5 A
−25 −10 −5 20 65 9580
TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
TYPICAL CHARACTERISTICS (continued)
TPS75933 TPS75933OUTPUT SPECTRAL NOISE DENSITY OUTPUT IMPEDANCEvs vsFREQUENCY FREQUENCY
Figure 8. Figure 9.
TPS75901 TPS75933DROPOUT VOLTAGE DROPOUT VOLTAGEvs vsINPUT VOLTAGE JUNCTION TEMPERATURE
Figure 10. Figure 11.
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3.7
50
0
VI
t − Time − µs
015010050 200 250 350300 400 450 500
− Input Voltage − V
VO = 1.5 V
IO = 7.5 A
Co = 100 µF
2.8
−50
−100
VO
∆− Change in Output Voltage − mV
2
3
4
1.5 2.5 3.52 3
− Minimum Required Input Voltage − V
VO − Output Voltage − V
VI
2.8
1.75 2.25 2.75 3.25
IO = 7.5 A
TJ = 125°C
TJ = 25°C
TJ = −40°C
t − Time − µs
I − Output Current − A
O
−200
0
0 604020 80 100 140120 160 180 200
0
100
−100
VO = 1.5 V
Co = 100 µF
10
5
200
di
dt 1 A
s
VO
∆− Change in Output Voltage − mV
t − Time − µs
VI− Input Voltage − V
15010050 200 250 350300 400 450 5000
−100
5.3
−50
4.3
VO = 3.3 V
IO = 7.5 A
Co = 100 µF
50
0
VO
∆− Change in Output Voltage − mV
TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
TYPICAL CHARACTERISTICS (continued)
MINIMUM REQUIRED INPUT VOLTAGEvs TPS75915OUTPUT VOLTAGE LINE TRANSIENT RESPONSE
Figure 12. Figure 13.
TPS75915 TPS75933LOAD TRANSIENT RESPONSE LINE TRANSIENT RESPONSE
Figure 14. Figure 15.
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t − Time − µs
I − Output Current − A
O
7.5
604020 80 100 140120 160 180 2000
0
100
−100
VO = 3.3 V
Co = 100 µF
−200
5
0
10
200
di
dt 1 A
s
VO
∆− Change in Output Voltage − mV
t − Time (Start-Up) − ms
0
3.3
0
0
4.3
0.2 10.4 0.6 0.8
− Output Voltage − V
VO
Enable Voltage − V
VI = 4.3 V
IO = 10 mA
TJ = 25°C
TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
TYPICAL CHARACTERISTICS (continued)
TPS75933OUTPUT VOLTAGE AND ENABLE VOLTAGETPS75933 vsLOAD TRANSIENT RESPONSE TIME (START-UP)
Figure 16. Figure 17.
12
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IN
EN
OUT
+
GND Co
ESR
RL
VITo Load
0.010 7.5
10
IO − Output Current − A
ESR − Equivalent Series Resistance − Ω
1
0.1
Region of Stability
0.015 Region of Instability
Co = 680 µF
TJ = 25°C
1.5 3 4.5 6
0.010 7.5
10
IO − Output Current − A
1
0.2
ESR − Equivalent Series Resistance − Ω
Co = 47 µF
TJ = 25°C
Region of Stability
Region of Instability
1.5 3 4.5 6
TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
TYPICAL CHARACTERISTICS (continued)
Figure 18. Test Circuit for Typical Regions of Stability(See Figure 19 and Figure 20 ) (Fixed Output Options)
TYPICAL REGION OF STABILITY TYPICAL REGION OF STABILITYEQUIVALENT SERIES RESISTANCE
(A)
EQUIVALENT SERIES RESISTANCE
(A)
vs vsOUTPUT CURRENT OUTPUT CURRENT
Figure 19. Figure 20.
A. Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, ayseries resistance added externally, and PWB trace resistance to C
O
.
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THERMAL INFORMATION
PDmax VI(avg) VO(avg)IO(avg) VI(avg)x I(Q)
(1)
A
B
C
A
B
C
TJ
A
RθJC
TC
B
RθCS
TA
C
RθSA
(a)
(b)
TO–263 Package
TO–220 Package
TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
The amount of heat that an LDO linear regulator generates is directly proportional to the amount of power itdissipates during operation. All integrated circuits have a maximum allowable junction temperature (T
J
max)above which normal operation is not assured. A system designer must design the operating environment so thatthe operating junction temperature (T
J
) does not exceed the maximum junction temperature (T
J
max). The twomain environmental variables that a designer can use to improve thermal performance are air flow and externalheatsinks. The purpose of this information is to aid the designer in determining the proper operating environmentfor a linear regulator that is operating at a specific power level.
In general, the maximum expected power (P
D(max)
) consumed by a linear regulator is computed as:
Where:
•V
I(avg)
is the average input voltage.•V
O(avg)
is the average output voltage.•I
O(avg)
is the average output current.•I
(Q)
is the quiescent current.
For most TI LDO regulators, the quiescent current is insignificant compared to the average output current;therefore, the term V
I(avg)
x I
(Q)
can be neglected. The operating junction temperature is computed by adding theambient temperature (T
A
) and the increase in temperature due to the regulator's power dissipation. Thetemperature rise is computed by multiplying the maximum expected power dissipation by the sum of the thermalresistances between the junction and the case (R
ΘJC
), the case to heatsink (R
ΘCS
), and the heatsink to ambient(R
ΘSA
). Thermal resistances are measures of how effectively an object dissipates heat. Typically, the larger thedevice, the more surface area available for power dissipation and the lower the object's thermal resistance.
Figure 21 illustrates these thermal resistances for (a) a TO-220 package attached to a heatsink, and (b) aTO-263 package mounted on a JEDEC High-K board.
Figure 21. Thermal Resistances
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TJTAPDmax x RθJC RθCS RθSA
(2)
TJTAPDmax x RθJA
(3)
RθJA
TJ–TA
PDmax
(4)
TO-220 POWER DISSIPATION
PDmax (3.3 – 2.5)V x 3 A 2.4 W
(5)
RθJAmax (125 – 55) °C2.4 W 29 °CW
(6)
TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
THERMAL INFORMATION (continued)Equation 2 summarizes the computation:
The R
ΘJC
is specific to each regulator as determined by its package, lead frame, and die size provided in theregulator's data sheet. The R
ΘSA
is a function of the type and size of heatsink. For example, black body radiatortype heatsinks, like the one attached to the TO-220 package in Figure 21 (a), can have R
ΘCS
values ranging from5°C/W for very large heatsinks to 50°C/W for very small heatsinks. The R
ΘCS
is a function of how the package isattached to the heatsink. For example, if a thermal compound is used to attach a heatsink to a TO-220 package,R
ΘCS
of 1°C/W is reasonable.
Even if no external black body radiator type heatsink is attached to the package, the board on which theregulator is mounted will provide some heatsinking through the pin solder connections. Some packages, like theTO-263 and TI's TSSOP PowerPAD™ packages, use a copper plane underneath the package or the circuitboard's ground plane for additional heatsinking to improve their thermal performance. Computer aided thermalmodeling can be used to compute very accurate approximations of an integrated circuit's thermal performance indifferent operating environments (e.g., different types of circuit boards, different types and sizes of heatsinks,different air flows, etc.). Using these models, the three thermal resistances can be combined into one thermalresistance between junction and ambient (R
ΘJA
). This R
ΘJA
is valid only for the specific operating environmentused in the computer model.
Equation 2 simplifies into Equation 3 :
Rearranging Equation 3 gives Equation 4 :
Using Equation 3 and the computer model generated curves shown in Figure 22 and Figure 25 , a designer canquickly compute the required heatsink thermal resistance/board area for a given ambient temperature, powerdissipation, and operating environment.
The TO-220 package provides an effective means of managing power dissipation in through-hole applications.The TO-220 package dimensions are provided in the Mechanical Data section at the end of the data sheet. Aheatsink can be used with the TO-220 package to effectively lower the junction-to-ambient thermal resistance.
To illustrate, the TPS75925 in a TO-220 package was chosen. For this example, the average input voltage is3.3 V, the output voltage is 2.5 V, the average output current is 3 A, the ambient temperature 55°C, the air flow is150 LFM, and the operating environment is the same as documented below. Neglecting the quiescent current,the maximum average power is:
Substituting T
J
max for T
J
into Equation 4 gives Equation 6 :
From Figure 22 , R
ΘJA
vs Heatsink Thermal Resistance, a heatsink with R
ΘSA
= 22°C/W is required to dissipate2.4 W. The model operating environment used in the computer model to construct Figure 22 consisted of astandard JEDEC High-K board (2S2P) with a 1 oz. internal copper plane and ground plane. Since the packagepins were soldered to the board, 450 mm
2
of the board was modeled as a heatsink. Figure 23 shows the sideview of the operating environment used in the computer model.
15
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5
15
25
35
45
55
65
0510152025
RθSA − Heatsink Thermal Resistance − °C/W
− Thermal Resistance −
θJA
R C/W
°
No Heatsink
Natural Convection
Air Flow = 150 LFM
Air Flow = 250 LFM
Air Flow = 500 LFM
1 oz. Copper
Power Plane
1 oz. Copper
Ground Plane
0.21 mm 0.21 mm
TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
THERMAL INFORMATION (continued)
Figure 22. Thermal Resistance vs Heatsink Thermal Resistance
Figure 23.
From the data in Figure 22 and rearranging Equation 4 , the maximum power dissipation for a different heatsinkR
ΘSA
and a specific ambient temperature can be computed (see Figure 24 ).
16
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1
10
01020
− Power Dissipation Limit − W
PD
RθSA − Heatsink Thermal Resistance − °C/W
No Heatsink
TA = 55°C
Natural Convection
Air Flow = 150 LFM
Air Flow = 250 LFM
Air Flow = 500 LFM
PDmax (3.3 – 2.5)V x 3 A 2.4 W
(7)
RθJAmax (125 – 55) °C2.4 W 29 °CW
(8)
TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
THERMAL INFORMATION (continued)
Figure 24. Power Dissipation vs Heatsink Thermal Resistance
The TO-263 package provides an effective means of managing power dissipation in surface mount applications.The TO-263 package dimensions are provided in the Mechanical Data section at the end of the data sheet. Theaddition of a copper plane directly underneath the TO-263 package enhances the thermal performance of thepackage.
To illustrate, the TPS75925 in a TO-263 package was chosen. For this example, the average input voltage is3.3V, the output voltage is 2.5 V, the average output current is 3 A, the ambient temperature 55°C, the air flow is150 LFM, and the operating environment is the same as documented below. Neglecting the quiescent current,the maximum average power is:
Substituting T
J
max for T
J
into Equation 4 gives Equation 8 :
From Figure 25 , R
ΘJA
vs Copper Heatsink Area, the ground plane needs to be 2 cm
2
for the part to dissipate2.4W. The model operating environment used in the computer model to construct Figure 25 consisted of astandard JEDEC High-K board (2S2P) with a 1 oz. internal copper plane and ground plane. The package issoldered to a 2 oz. copper pad. The pad is tied through thermal vias to the 1 oz. ground plane. Figure 26 showsthe side view of the operating environment used in the computer model.
17
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15
20
25
30
35
40
0 0.01 0.1 1 10 100
Copper Heatsink Area − cm2
− Thermal Resistance −
θJA
R C/W
°
No Air Flow
150 LFM
250 LFM
1 oz. Copper
Power Plane
1 oz. Copper
Ground Plane
2 oz. Copper
Solder Pad
with 25 Thermal
Vias
Thermal Vias, 0.3 mm
Diameter, 1.5 mm Pitch
TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
THERMAL INFORMATION (continued)
Figure 25. Thermal Resistance vs Copper Heatsink Area
Figure 26.
From the data in Figure 25 and rearranging Equation 4 , the maximum power dissipation for a different groundplane area and a specific ambient temperature can be computed (see Figure 27 ).
18
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1
2
3
4
5
0 0.01 0.1 1 10 100
− Maximum Power Dissipation − W
PD
Copper Heatsink Area − cm2
TA = 55°C
No Air Flow
150 LFM
250 LFM
TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
THERMAL INFORMATION (continued)
Figure 27. Maximum Power Dissipation vs Copper Heatsink Area
19
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APPLICATION INFORMATION
PROGRAMMING THE TPS75901 ADJUSTABLE LDO REGULATOR
VOVref 1R1
R2
Where:
Vref = 1.224 V typ (the internal reference voltage)
(9)
R1 VO
Vref 1R2
(10)
VO
VI
OUT
FB
R1
R2
GND
EN
IN
≤ 0.7 V
≥ 2 V
TPS75901
1 µF
Co
OUTPUT VOLTAGE
PROGRAMMING GUIDE
OUTPUT
VOLTAGE R1 R2
2.5 V
3.3 V
3.6 V
UNIT
31.6
51
58.3
30.1
30.1
30.1
kΩ
kΩ
kΩ
REGULATOR PROTECTION
INPUT CAPACITOR
TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
The output voltage of the TPS75901 adjustable regulator is programmed using an external resistor divider asshown in Figure 28 . The output voltage is calculated using:
Resistors R1 and R2 should be chosen for approximately 40-µA divider current. Lower value resistors can beused but offer no inherent advantage and waste more power. Higher values should be avoided as leakagecurrents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 30.1 kΩto set the divider current at 40 µA and then calculate R1 using:
Figure 28. TPS75901 Adjustable LDO Regulator Programming
The TPS759xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the inputvoltage drops below the output voltage (e.g., during power down). Current is conducted from the output to theinput and is not internally limited. When extended reverse voltage is anticipated, external limiting may beappropriate.
The TPS759xx also features internal current limiting and thermal protection. During normal operation, theTPS759xx limits output current to approximately 10 A. When current limiting engages, the output voltage scalesback linearly until the overcurrent condition ends. While current limiting is designed to prevent gross devicefailure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of thedevice exceeds 150°C (typ), thermal-protection circuitry shuts it down. Once the device has cooled below 130°C(typ), regulator operation resumes.
For a typical application, a ceramic input bypass capacitor (0.22 µF-1 µF) is recommended to ensure devicestability. This capacitor should be as close as possible to the input pin. Due to the impedance of the input supply,large transient currents will cause the input voltage to droop. If this droop causes the input voltage to drop belowthe UVLO threshold, the device will turn off. Therefore, it is recommended that a larger capacitor be placed inparallel with the ceramic bypass capacitor at the regulator's input. The size of this capacitor depends on theoutput current, response time of the main power supply, and the main power supply's distance to the regulator.At a minimum, the capacitor should be sized to ensure that the input voltage does not drop below the minimumUVLO threshold voltage during normal operating conditions.
20
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OUTPUT CAPACITOR
100
47
10
0.01
1000
0.1
ESR − Equivalent Series Resistance − Ω
Output Capacitance − Fµ
Y = ESRmin x Co
Region of Stability
Region of Instability
ESR min x Co = Constant
0.2
TPS75901, TPS75915TPS75918, TPS75925, TPS75933
SLVS318E – DECEMBER 2000 – REVISED MARCH 2004
APPLICATION INFORMATION (continued)
As with most LDO regulators, the TPS759xx requires an output capacitor connected between OUT and GND tostabilize the internal control loop. The minimum recommended capacitance value is 47 µF with an ESR(equivalent series resistance) of at least 200 mΩ. As shown in Figure 29 , most capacitor and ESR combinationswith a product of 47e-6 x 0.2 = 9.4e-6 or larger will be stable, provided the capacitor value is at least 47 µF. Solidtantalum electrolytic and aluminum electrolytic capacitors are all suitable, provided they meet the requirementsdescribed in this section. Larger capacitors provide a wider range of stability and better load transient response.
This information along with the ESR graphs, Figure 19 , Figure 20 , and Figure 29 , is included to assist inselection of suitable capacitance for the user's application. When necessary to achieve low height requirementsalong with high output current and/or high load capacitance, several higher ESR capacitors can be used inparallel to meet these guidelines.
Figure 29. Output Capacitance vs Equivalent Series Resistance
21
PACKAGE OPTION ADDENDUM
www.ti.com 17-Aug-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPS75901KC ACTIVE TO-220 KC 5 50 Green (RoHS
& no Sb/Br) CU SN N / A for Pkg Type
TPS75901KCG3 ACTIVE TO-220 KC 5 50 Green (RoHS
& no Sb/Br) CU SN N / A for Pkg Type
TPS75901KTT OBSOLETE DDPAK/
TO-263 KTT 5 TBD Call TI Call TI
TPS75901KTTR ACTIVE DDPAK/
TO-263 KTT 5 500 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
TPS75901KTTRG3 ACTIVE DDPAK/
TO-263 KTT 5 500 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
TPS75901KTTT ACTIVE DDPAK/
TO-263 KTT 5 50 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
TPS75901KTTTG3 ACTIVE DDPAK/
TO-263 KTT 5 50 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
TPS75915KC ACTIVE TO-220 KC 5 50 Green (RoHS
& no Sb/Br) CU SN N / A for Pkg Type
TPS75915KCG3 ACTIVE TO-220 KC 5 50 Green (RoHS
& no Sb/Br) CU SN N / A for Pkg Type
TPS75915KTT OBSOLETE DDPAK/
TO-263 KTT 5 TBD Call TI Call TI
TPS75915KTTR ACTIVE DDPAK/
TO-263 KTT 5 500 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
TPS75915KTTRG3 ACTIVE DDPAK/
TO-263 KTT 5 500 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
TPS75915KTTT ACTIVE DDPAK/
TO-263 KTT 5 50 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
TPS75915KTTTG3 ACTIVE DDPAK/
TO-263 KTT 5 50 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
TPS75918KC ACTIVE TO-220 KC 5 50 Green (RoHS
& no Sb/Br) CU SN N / A for Pkg Type
TPS75918KCG3 ACTIVE TO-220 KC 5 50 Green (RoHS
& no Sb/Br) CU SN N / A for Pkg Type
TPS75918KTT OBSOLETE DDPAK/
TO-263 KTT 5 TBD Call TI Call TI
PACKAGE OPTION ADDENDUM
www.ti.com 17-Aug-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPS75918KTTT ACTIVE DDPAK/
TO-263 KTT 5 50 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
TPS75918KTTTG3 ACTIVE DDPAK/
TO-263 KTT 5 50 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
TPS75925KC ACTIVE TO-220 KC 5 50 Green (RoHS
& no Sb/Br) CU SN N / A for Pkg Type
TPS75925KCG3 ACTIVE TO-220 KC 5 50 Green (RoHS
& no Sb/Br) CU SN N / A for Pkg Type
TPS75925KTT OBSOLETE DDPAK/
TO-263 KTT 5 TBD Call TI Call TI
TPS75925KTTR ACTIVE DDPAK/
TO-263 KTT 5 TBD Call TI Call TI
TPS75925KTTRG3 ACTIVE DDPAK/
TO-263 KTT 5 TBD Call TI Call TI
TPS75925KTTT ACTIVE DDPAK/
TO-263 KTT 5 50 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
TPS75925KTTTG3 ACTIVE DDPAK/
TO-263 KTT 5 50 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
TPS75933KC ACTIVE TO-220 KC 5 50 Green (RoHS
& no Sb/Br) CU SN N / A for Pkg Type
TPS75933KCG3 ACTIVE TO-220 KC 5 50 Green (RoHS
& no Sb/Br) CU SN N / A for Pkg Type
TPS75933KTT OBSOLETE DDPAK/
TO-263 KTT 5 TBD Call TI Call TI
TPS75933KTTR ACTIVE DDPAK/
TO-263 KTT 5 500 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
TPS75933KTTRG3 ACTIVE DDPAK/
TO-263 KTT 5 500 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
TPS75933KTTT ACTIVE DDPAK/
TO-263 KTT 5 50 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
TPS75933KTTTG3 ACTIVE DDPAK/
TO-263 KTT 5 50 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PACKAGE OPTION ADDENDUM
www.ti.com 17-Aug-2012
Addendum-Page 3
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS75901KTTR DDPAK/
TO-263 KTT 5 500 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2
TPS75901KTTT DDPAK/
TO-263 KTT 5 50 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2
TPS75915KTTR DDPAK/
TO-263 KTT 5 500 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2
TPS75915KTTT DDPAK/
TO-263 KTT 5 50 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2
TPS75918KTTT DDPAK/
TO-263 KTT 5 50 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2
TPS75925KTTT DDPAK/
TO-263 KTT 5 50 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2
TPS75933KTTR DDPAK/
TO-263 KTT 5 500 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2
TPS75933KTTT DDPAK/
TO-263 KTT 5 50 330.0 24.4 10.6 15.6 4.9 16.0 24.0 Q2
PACKAGE MATERIALS INFORMATION
www.ti.com 17-Aug-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS75901KTTR DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0
TPS75901KTTT DDPAK/TO-263 KTT 5 50 367.0 367.0 45.0
TPS75915KTTR DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0
TPS75915KTTT DDPAK/TO-263 KTT 5 50 367.0 367.0 45.0
TPS75918KTTT DDPAK/TO-263 KTT 5 50 367.0 367.0 45.0
TPS75925KTTT DDPAK/TO-263 KTT 5 50 367.0 367.0 45.0
TPS75933KTTR DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0
TPS75933KTTT DDPAK/TO-263 KTT 5 50 367.0 367.0 45.0
PACKAGE MATERIALS INFORMATION
www.ti.com 17-Aug-2012
Pack Materials-Page 2
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