LMV7235, LMV7239
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SNOS532M –SEPTEMBER 2000–REVISED FEBRUARY 2013
LMV7235/LMV7239/LMV7239Q 75 nsec, Ultra Low Power, Low Voltage, Rail-to-Rail Input
Comparator with Open-Drain/Push-Pull Output
Check for Samples: LMV7235,LMV7239
1FEATURES DESCRIPTION
The LMV7235/LMV7239/LMV7239Q are ultra low
2• (VS= 5V, TA= 25°C power, low voltage, 75 nsec comparators. They are
• Typical values unless otherwise specified) guaranteed to operate over the full supply voltage
• Propagation delay 75 nsec range of 2.7V to 5.5V. These devices achieve a 75
nsec propagation delay while consuming only 65µA
• Low supply current 65µA of supply current at 5V.
• Rail-to-Rail input The LMV7235/LMV7239/LMV7239Q have a greater
• Open drain and push-pull output than rail-to-rail common mode voltage range. The
• Ideal for 2.7V and 5V single supply input common mode voltage range extends 200mV
applications below ground and 200mV above supply, allowing
• Available in space saving packages both ground and supply sensing.
– 5-pin SOT-23 The LMV7235 features an open drain output. By
connecting an external resistor, the output of the
– 5-pin SC70 comparator can be used as a level shifter.
• LMV7239Q is an automotive grade product
that is AECQ grade 1 qualified and is The LMV7239/LMV7239Q features a push-pull output
manufactured on an automotive grade flow. stage. This feature allows operation without the need
of an external pull-up resistor.
APPLICATIONS The LMV7235/LMV7239/LMV7239Q are available in
the 5-Pin SC70 and 5-Pin SOT-23 packages, which
• Portable and battery powered systems are ideal for systems where small size and low power
• Scanners is critical.
• Set top boxes
• High speed differential line receiver
• Window comparators
• Zero-crossing detectors
• High speed sampling circuits
• Automotive
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2000–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Inverting
Input
1
2
3 4
5V+
V-
VOUT
Non-Inverting
Input
SC70
SOT-23
Crystal
100K
VOUT
0.1uF
VCC
100K
100K
LMV7235, LMV7239
SNOS532M –SEPTEMBER 2000–REVISED FEBRUARY 2013
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Typical Application
Figure 1. Crystal Oscillator
Connection Diagram
Figure 2. 5-Pin SC70/SOT-23 (Top View)
Simplified Schematic
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1)(2)
ESD Tolerance (3)
Human Model Body 1000V
Machine Body 100V
Differential Input Voltage ± Supply Voltage
Output Short Circuit Duration (4)
Supply Voltage (V+- V−) 6V
Soldering Information
Infrared or Convection (20 sec) 235°C
Wave Soldering (10 sec) 260°C (lead temp)
Voltage at Input/Output Pins (V+) +0.3V, (V−)−0.3V
Current at Input Pin (5) ±10mA
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test
conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office / Distributors for
availability and specifications.
(3) Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of
JEDEC)Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
(4) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30mA over long term may adversely
affect reliability.
(5) Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage ratings.
Operating Ratings
Supply Voltages (V+- V−) 2.7V to 5.5V
Temperature Range (1)
LMV7235/LMV7239 −40°C to +85°C
LMV7239Q −40°C to +125°C
Storage Temperature Range −65°C to +150°C
Package Thermal Resistance
5-Pin SC70 478°C/W
5-Pin SOT-23 265°C/W
(1) The maximum power dissipation is a function of TJ(MAX),θJA. The maximum allowable power dissipation at any ambient temperature is
PD= (TJ(MAX) – TA) / θJA. All numbers apply for packages soldered directly onto a PC Board.
2.7V Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TA= 25°C, VCM = V+/2, V+= 2.7V, V−= 0V−.Boldface limits apply at the
temperature extremes.
Symbol Parameter Conditions Min (1) Typ (2) Max (1) Units
0.8 6
VOS Input Offset Voltage mV
8
30 400
IBInput Bias Current nA
600
5 200
IOS Input Offset Current nA
400
(1) All limits are guaranteed by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
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2.7V Electrical Characteristics (continued)
Unless otherwise specified, all limits guaranteed for TA= 25°C, VCM = V+/2, V+= 2.7V, V−= 0V−.Boldface limits apply at the
temperature extremes.
Symbol Parameter Conditions Min (1) Typ (2) Max (1) Units
0V < VCM < 2.7V
CMRR Common Mode Rejection Ratio 52 62 dB
(3)
PSRR Power Supply Rejection Ratio V+= 2.7V to 5V 65 85 dB
VCM Input Common-Mode Voltage Range CMRR > 50dB V−−0.1V−−0.2 to 2.9 V++0.1V+V
IL= 4mA, V+−0.35 V+−0.26 V
VID = 500mV
Output Swing High
(LMV7239 only) IL= 0.4mA, V+−0.02 V
VID = 500mV
VOIL=−4mA, 230 350 mV
VID =−500mV 450
Output Swing Low
(LMV7235/LMV7239/LMV7239Q) IL=−0.4mA, 15 mV
VID =−500mV
Sourcing, VO= 0V
(LMV7239 only) 15 mA
(4)
ISC Output Short Circuit Current Sinking, VO= 2.7V
(LMV7235, RL= 10k) 20 mA
(4)
52 85
ISSupply Current No load µA
100
Overdrive = 20mV
CLOAD = 15pF 96 ns
(5)
Overdrive = 50mV
tPD Propagation Delay CLOAD = 15pF 87 ns
(5)
Overdrive = 100mV
CLOAD = 15pF 85 ns
(5)
Propagation Delay Skew Overdrive = 20mV
tSKEW 2 ns
(LMV7239 only) (6)
LMV7239/LMV7239Q 1.7 ns
10% to 90%
trOutput Rise Time LMV7235
10% to 90% 112 ns
(5)
tfOutput Fall Time 90% to 10% 1.7 ns
Output Leakage Current
ILEAKAGE 3 nA
(LMV7235 only)
(3) CMRR is not linear over the common mode range. Limits are guaranteed over the worst case from 0 to VCC/2 or VCC/2 to VCC.
(4) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30mA over long term may adversely
affect reliability.
(5) A 10k pull-up resistor was used when measuring the LMV7235. The rise time of the LMV7235 is a function of the R-C time constant.
(6) Propagation Delay Skew is defined as the absolute value of the difference between tPDLH and tPDHL.
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5V Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TA= 25°C, VCM = V+/2, V+= 5V, V−= 0V. Boldface limits apply at the
temperature extremes.
Symbol Parameter Conditions Min (1) Typ (2) Limits (1) Units
1 6
VOS Input Offset Voltage mV
8
30 400
IBInput Bias Current nA
600
5 200
IOS Input Offset Current nA
400
CMRR Common Mode Rejection Ratio 0V < VCM < 5V 52 67 dB
PSRR Power Supply Rejection Ratio V+= 2.7V to 5V 65 85 dB
VCM Input Common-Mode Voltage Range CMRR > 50dB V−−0.1V−−0.2 to 5.2 V++0.1V+V
IL= 4mA, V+−0.25 V+−0.15 V
VID = 500mV
Output Swing High
(LMV7239 only) IL= 0.4mA, V+−0.01 V
VID = 500mV
VOIL=−4mA, 230 350 mV
VID =−500mV 450
Output Swing Low
(LMV7235/LMV7239/LMV7239Q) IL=−0.4mA, 10 mV
VID =−500mV
Sourcing, VO= 0V 25 55
(LMV7239 only) 15 mA
(3)
ISC Output Short Circuit Current Sinking, VO= 5V 30 60
(LMV7235, RL= 10k) 20 mA
(3)
65 95
ISSupply Current No load µA
110
Overdrive = 20mV
CLOAD = 15pF 89 ns
(4)
Overdrive = 50mV
tPD Propagation Delay CLOAD = 15pF 82 ns
(4)
Overdrive = 100mV
CLOAD = 15pF 75 ns
(4)
Propagation Delay Skew Overdrive = 20mV
tSKEW 1 ns
(LMV7239 only) (5)
LMV7239 1.2 ns
10% to 90%
trOutput Rise Time LMV7235
10% to 90% 100 ns
(4)
tfOutput Fall Time 90% to 10% 1.2 ns
Output Leakeage Current
ILEAKAGE 3 nA
(LMV7235 only)
(1) All limits are guaranteed by testing or statistical analysis.
(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
(3) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30mA over long term may adversely
affect reliability.
(4) A 10k pull-up resistor was used when measuring the LMV7235. The rise time of the LMV7235 is a function of the R-C time constant.
(5) Propagation Delay Skew is defined as the absolute value of the difference between tPDLH and tPDHL.
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OUTPUT VOLTAGE REFERENCED TO V+ (V)
.01 .1 1 10
.1
1
10
100
ISOURCE (mA)
VS = 2.7V
.01 .1 1 10
OUTPUT VOLTAGE REFERENCED TO GND (V)
.1
1
10
100
ISINK (mA)
VS = 5V
10
OUTPUT VOLTAGE REFERENCED TO V+ (V)
.01 .1 1
.1
1
10
100
ISOURCE (mA)
VS = 5V
0 1 2 3 4 5
0
20
40
60
80
100
120
SUPPLY CURRENT (A)
SUPPLY VOLTAGE (V)
-40°C
25°C
85°C
125°C
LMV7235, LMV7239
SNOS532M –SEPTEMBER 2000–REVISED FEBRUARY 2013
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TYPICAL PERFORMANCE CHARACTERISTICS
(Unless otherwise specified, VS= 5V, CL= 10pF, TA= 25°C).
Supply Current vs. Supply Voltage Sourcing Current vs. Output Voltage
Figure 3. Figure 4.
Sourcing Current vs. Output Voltage Sinking Current vs. Output Voltage
Figure 5. Figure 6.
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-40 -20 0 20 40 60 80 100 120 140
80
90
100
110
120
130
140
PROPAGATION DELAY (ns)
TEMPERATURE (°C)
VS=5V
VOD=20mV
CLOAD=15pF
Falling Edge
Rising Edge
0 20 40 60 80 100
94
96
98
100
102
104
106
PROPAGATION DELAY (ns)
CAPACITANCE (pF)
Rising Edge
Falling Edge
VS= 2.7V
VOD=20mV
012
-50
-40
-30
-20
-10
0
10
20
30
50
INPUT BIAS CURRENT (nA)
VIN (V)
2.7
VS = 2.7V
IBIAS-
IBIAS+
60
-60
70
40
-40 -20 0 20 40 60 80 100 120 140
80
90
100
110
120
130
140
150
160
PROPAGATION DELAY (ns)
TEMPERATURE (°C)
VS=2.7V
VOD=20mV
CLOAD=15pF
Falling Edge
Rising Edge
.01 .1 1 10
OUTPUT VOLTAGE REFERENCED TO GND (V)
.1
1
10
100
ISINK (mA)
VS = 2.7V
5
-0.2 1234
-50
-40
-30
-20
-10
0
10
20
30
40
50
INPUT BIAS CURRENT (nA)
VIN (V)
VS = 5V
IBIAS+
IBIAS-
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SNOS532M –SEPTEMBER 2000–REVISED FEBRUARY 2013
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
(Unless otherwise specified, VS= 5V, CL= 10pF, TA= 25°C).
Sinking Current vs. Output Voltage Input Bias Current vs. Input Voltage
Figure 7. Figure 8.
Input Bias Current vs. Input Voltage Propagation Delay vs. Temperature
Figure 9. Figure 10.
Propagation Delay vs. Temperature Propagation Delay vs. Capacitive Load
Figure 11. Figure 12.
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0 1 2 3 4 5
80
90
100
110
PROPAGATION DELAY (ns)
INPUT COMMON MODE VOLTAGE (V)
Rising Edge
Falling Edge
VS= 5V
VOD=20mV
CLOAD=15pF
20 40 60 80 100
70
75
80
85
90
PROPAGATION DELAY (ns)
INPUT OVERDRIVE (mV)
Rising Edge
Falling Edge
VS= 5V
CLOAD=15pF
0.0 0.5 1.0 1.5 2.0 2.5 3.0
80
85
90
95
100
105
110
115
120
PROPAGATION DELAY (ns)
INPUT COMMON MODE VOLTAGE (V)
Rising Edge Falling Edge
VS= 2.7V
VOD=20mV
CLOAD=15pF
0 20 40 60 80 100
88
90
92
94
96
PROPAGATION DELAY (ns)
CAPACITANCE (pF)
Rising Edge
Falling Edge
VS= 5V
VOD=20mV
20 30 40 50 60 70 80 90 100
80
85
90
95
100
PROPAGATION DELAY (ns)
INPUT OVERDRIVE (mV)
Rising Edge
Falling Edge
VS= 2.7V
CLOAD=15pF
LMV7235, LMV7239
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
(Unless otherwise specified, VS= 5V, CL= 10pF, TA= 25°C).
Propagation Delay vs. Capacitive Load Propagation Delay vs. Input Overdrive
Figure 13. Figure 14.
Propagation Delay vs. Input Overdrive Propagation Delay vs. Common Mode Voltage
Figure 15. Figure 16.
Propagation Delay vs. Common Mode Voltage
Figure 17.
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SNOS532M –SEPTEMBER 2000–REVISED FEBRUARY 2013
APPLICATION INFORMATION
The LMV7235/LMV7239/LMV7239Q are single supply comparators with 75ns of propagation delay and only
65µA of supply current.
The LMV7235/LMV7239/LMV7239Q are rail-to-rail input and output. The typical input common mode voltage
range of −0.2V below the ground to 0.2V above the supply. The LMV7235/LMV7239/LMV7239Q use a
complimentary PNP and NPN input stage in which the PNP stage senses common mode voltage near V−and the
NPN stage senses common mode voltage near V+. If either of the input signals falls below the negative common
mode limit, the parasitic PN junction formed by the substrate and the base of the PNP will turn on resulting in an
increase of input bias current.
If one of the input goes above the positive common mode limit, the output will still maintain the correct logic level
as long as the other input stays within the common mode range. However, the propagation delay will increase.
When both inputs are outside the common mode voltage range, current saturation occurs in the input stage, and
the output becomes unpredictable.
The propagation delay does not increase significantly with large differential input voltages. However, large
differential voltages greater than the supply voltage should be avoided to prevent damage to the input stage.
The LMV7239 has a push-pull output. When the output switches, there is a direct path between VCC and ground,
causing high output sinking or sourcing current during the transition. After the transition, the output current
decreases and the supply current settles back to about 65µA at 5V, thus conserving power consumption.
The LMV7235 has an open drain that requires a pull-up resistor to a positive supply voltage for the output to
switch properly. When the internal output transistor is off, the output voltage will be pulled up to the external
positive voltage.
CIRCUIT LAYOUT AND BYPASSING
The LMV7235/LMV7239/LMV7239Q require high speed layout. Follow these layout guidelines:
1. Use printed circuit board with a good, unbroken low-inductance ground plane.
2. Place a decoupling capacitor (0.1µF ceramic surface mount capacitor) as close as possible to VCC pin.
3. On the inputs and the output, keep lead lengths as short as possible to avoid unwanted parasitic feedback
around the comparator. Keep inputs away from output.
4. Solder the device directly to the printed circuit board rather than using a socket.
5. For slow moving input signals, take care to prevent parasitic feedback. A small capacitor (1000pF or less)
placed between the inputs can help eliminate oscillations in the transition region. This capacitor causes some
degradation to tPD when the source impedance is low.
6. The topside ground plane runs between the output and inputs.
7. Ground trace from the ground pin runs under the device up to the bypass capacitor, shielding the inputs from
the outputs.
COMPARATOR WITH HYSTERESIS
The basic comparator configuration may oscillate or produce a noisy output if the applied differential input
voltage is near the comparator's offset voltage. This usually happens when the input signal is moving very slowly
across the comparator's switching threshold. This problem can be prevented by the addition of hysteresis or
positive feedback.
INVERTING COMPARATOR WITH HYSTERESIS
The inverting comparator with hysteresis requires a three resistor network that is referenced to the supply voltage
VCC of the comparator, as shown in Figure 18. When VIN at the inverting input is less than VA, the voltage at the
non-inverting node of the comparator (VIN < VA), the output voltage is high (for simplicity assume VOswitches as
high as VCC). The three network resistors can be represented as R1||R3 in series with R2. The lower input trip
voltage VA1 is defined as:
VA1 = VCCR2 / [(R1||R3) + R2] (1)
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When VIN is greater than VA(VIN > VA), the output voltage is low, very close to ground. In this case the three
network resistors can be presented as R2 || R3 in series with R1. The upper trip voltage VA2 is defined as:
VA2 = VCC (R2||R3) / [(R1)+ (R2||R3)] (2)
The total hysteresis provided by the network is defined as:
Delta VA= VA1- VA2 (3)
To assure that the comparator will always switch fully to VCC and not be pulled down by the load the resistors,
values should be chosen as follows:
RPULL-UP << RLOAD (4)
Figure 18. Inverting Comparator with Hysteresis
NON-INVERTING COMPARATOR WITH HYSTERESIS
A non inverting comparator with hysteresis requires a two resistor network, and a voltage reference (VREF) at the
inverting input. When VIN is low, the output is also low. For the output to switch from low to high, VIN must rise up
to VIN1 where VIN1 is calculated by:
VIN1 = R1*(VREF / R2) + VREF (5)
When VIN is high, the output is also high, to make the comparator switch back to it's low state, VIN must equal
VREF before VAwill again equal VREF. VIN can be calculated by:
VIN2 = [VREF (R1+ R2) - VCC R1] / R2 (6)
The hysteresis of this circuit is the difference between VIN1 and VIN2.
Delta VIN = VCC R1 / R2 (7)
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Figure 19. Non-Inverting Comparator with Hysteresis
ZERO-CROSSING DETECTOR
The inverting input is connected to ground and the non-inverting input is connected to 100mVp-p signal. As the
signal at the non-inverting input crosses 0V, the comparator's output changes state.
Figure 20. Zero-Crossing Detector
THRESHOLD DETECTOR
Instead of tying the inverting input to 0V, the inverting input can be tied to a reference voltage. The non-inverting
input is connected to the input. As the input passes the VREF threshold, the comparator's output changes state.
Figure 21. Threshold Detector
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CRYSTAL OSCILLATOR
A simple crystal oscillator using the LMV7239 is shown below. Resistors R1 and R2 set the bias point at the
comparator's non-inverting input. Resistors R3, R4 and C1 sets the inverting input node at an appropriate DC
average level based on the output. The crystal's path provides resonant positive feedback and stable oscillation
occurs. The output duty cycle for this circuit is roughly 50%, but it is affected by resistor tolerances and to a
lesser extent by the comparator offset.
Figure 22. Crystal Oscillator
IR RECEIVER
The LMV7239 is an ideal candidate to be used as an infrared receiver. The infrared photo diode creates a
current relative to the amount of infrared light present. The current creates a voltage across RD. When this
voltage level cross the voltage applied by the voltage divider to the inverting input, the output transitions.
Figure 23. IR Receiver
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REVISION HISTORY
Changes from Revision L (February 2013) to Revision M Page
• Changed layout of National Data Sheet to TI format .......................................................................................................... 12
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PACKAGE OPTION ADDENDUM
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Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LMV7235M5 ACTIVE SOT-23 DBV 5 1000 Non-RoHS &
Non-Green Call TI Call TI -40 to 85 C21A
LMV7235M5/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 C21A
LMV7235M5X ACTIVE SOT-23 DBV 5 3000 Non-RoHS &
Non-Green Call TI Call TI -40 to 85 C21A
LMV7235M5X/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 C21A
LMV7235M7 ACTIVE SC70 DCK 5 1000 Non-RoHS &
Non-Green Call TI Call TI -40 to 85 C21
LMV7235M7/NOPB ACTIVE SC70 DCK 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 C21
LMV7235M7X/NOPB ACTIVE SC70 DCK 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 C21
LMV7239M5 NRND SOT-23 DBV 5 1000 Non-RoHS &
Non-Green Call TI Call TI -40 to 85 C20A
LMV7239M5/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 C20A
LMV7239M5X NRND SOT-23 DBV 5 3000 Non-RoHS &
Non-Green Call TI Call TI -40 to 85 C20A
LMV7239M5X/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 C20A
LMV7239M7 NRND SC70 DCK 5 1000 Non-RoHS &
Non-Green Call TI Call TI -40 to 85 C20
LMV7239M7/NOPB ACTIVE SC70 DCK 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 C20
LMV7239M7X NRND SC70 DCK 5 3000 Non-RoHS &
Non-Green Call TI Call TI -40 to 85 C20
LMV7239M7X/NOPB ACTIVE SC70 DCK 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 C20
LMV7239QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 ZBMX
LMV7239QM7/NOPB ACTIVE SC70 DCK 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 C42
LMV7239QM7X/NOPB ACTIVE SC70 DCK 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 C42
PACKAGE OPTION ADDENDUM
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Addendum-Page 2
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LMV7239, LMV7239-Q1 :
•Catalog: LMV7239
•Automotive: LMV7239-Q1
NOTE: Qualified Version Definitions:
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 3
•Catalog - TI's standard catalog product
•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LMV7235M5 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV7235M5/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV7235M5X SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV7235M5X/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV7235M7 SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3
LMV7235M7/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3
LMV7235M7X/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3
LMV7239M5 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV7239M5/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV7239M5X SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV7239M5X/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV7239M7 SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3
LMV7239M7/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3
LMV7239M7X SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3
LMV7239M7X/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3
LMV7239QDBVRQ1 SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
LMV7239QM7/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3
LMV7239QM7X/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
www.ti.com 29-Sep-2019
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LMV7235M5 SOT-23 DBV 5 1000 210.0 185.0 35.0
LMV7235M5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0
LMV7235M5X SOT-23 DBV 5 3000 210.0 185.0 35.0
LMV7235M5X/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0
LMV7235M7 SC70 DCK 5 1000 210.0 185.0 35.0
LMV7235M7/NOPB SC70 DCK 5 1000 210.0 185.0 35.0
LMV7235M7X/NOPB SC70 DCK 5 3000 210.0 185.0 35.0
LMV7239M5 SOT-23 DBV 5 1000 210.0 185.0 35.0
LMV7239M5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0
LMV7239M5X SOT-23 DBV 5 3000 210.0 185.0 35.0
LMV7239M5X/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0
LMV7239M7 SC70 DCK 5 1000 210.0 185.0 35.0
LMV7239M7/NOPB SC70 DCK 5 1000 210.0 185.0 35.0
LMV7239M7X SC70 DCK 5 3000 210.0 185.0 35.0
LMV7239M7X/NOPB SC70 DCK 5 3000 210.0 185.0 35.0
LMV7239QDBVRQ1 SOT-23 DBV 5 3000 210.0 185.0 35.0
LMV7239QM7/NOPB SC70 DCK 5 1000 210.0 185.0 35.0
LMV7239QM7X/NOPB SC70 DCK 5 3000 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 29-Sep-2019
Pack Materials-Page 2
www.ti.com
PACKAGE OUTLINE
C
0.22
0.08 TYP
0.25
3.0
2.6
2X 0.95
1.9
1.45
0.90
0.15
0.00 TYP
5X 0.5
0.3
0.6
0.3 TYP
8
0 TYP
1.9
A
3.05
2.75
B
1.75
1.45
(1.1)
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/E 09/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
0.2 C A B
1
34
5
2
INDEX AREA
PIN 1
GAGE PLANE
SEATING PLANE
0.1 C
SCALE 4.000
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MAX
ARROUND 0.07 MIN
ARROUND
5X (1.1)
5X (0.6)
(2.6)
(1.9)
2X (0.95)
(R0.05) TYP
4214839/E 09/2019
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
PKG
1
34
5
2
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED METAL
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
EXPOSED METAL
www.ti.com
EXAMPLE STENCIL DESIGN
(2.6)
(1.9)
2X(0.95)
5X (1.1)
5X (0.6)
(R0.05) TYP
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/E 09/2019
NOTES: (continued)
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
8. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
SYMM
PKG
1
34
5
2
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