LTC3642
1
3642fc
TYPICAL APPLICATION
FEATURES
APPLICATIONS
DESCRIPTION
High Efficiency, High Voltage
50mA Synchronous
Step-Down Converter
The LTC
®
3642 is a high efficiency, high voltage step-down
DC/DC converter with internal high side and synchronous
power switches that draws only 12μA typical DC sup-
ply current at no load while maintaining output voltage
regulation.
The LTC3642 can supply up to 50mA load current and
features a programmable peak current limit that provides
a simple method for optimizing efficiency in lower current
applications. The LTC3642’s combination of Burst Mode
®
operation, integrated power switches, low quiescent cur-
rent, and programmable peak current limit provides high
efficiency over a broad range of load currents.
With its wide 4.5V to 45V input range and internal
overvoltage monitor capable of protecting the part through
60V surges, the LTC3642 is a robust converter suited for
regulating a wide variety of power sources. Additionally,
the LTC3642 includes a precise run threshold and soft-start
feature to guarantee that the power system start-up is
well-controlled in any environment.
The LTC3642 is available in the thermally enhanced
3mm × 3mm DFN and MS8E packages.
Efficiency and Power Loss vs Load Current
n Wide Input Voltage Range: 4.5V to 45V
n Tolerant of 60V Input Transients
n Internal High Side and Low Side Power Switches
n No Compensation Required
n 50mA Output Current
n Low Dropout Operation: 100% Duty Cycle
n Low Quiescent Current: 12µA
n 0.8V Feedback Voltage Reference
n Adjustable Peak Current Limit
n Internal and External Soft-Start
n Precise RUN Pin Threshold with Adjustable
Hysteresis
n 3.3V, 5V and Adjustable Output Versions
n Only Three External Components Required for Fixed
Output Versions
n Low Profile (0.75mm) 3mm × 3mm DFN and
Thermally-Enhanced MS8E Packages
n 4mA to 20mA Current Loops
nIndustrial Control Supplies
nDistributed Power Systems
nPortable Instruments
nBattery-Operated Devices
nAutomotive Power Systems
5V, 50mA Step-Down Converter
VIN
LTC3642-5
RUN
HYST
3642 TA01a
SW
VIN
5V TO 45V
1µF 10µF
VOUT
5V
50mA
VOUT
SS
ISET
GND
150µH
LOAD CURRENT (mA)
0.1
85
EFFICIENCY (%)
POWER LOSS (mW)
90
95
100
1 10 100
3642 TA01b
80
75
70
65
10
100
1
0.1
VIN = 10V
EFFICIENCY
POWER LOSS
L, LT, LTC, LTM, Burst Mode, Linear Technology, and the Linear logo are registered trademarks
and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
LTC3642
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ABSOLUTE MAXIMUM RATINGS
VIN Supply Voltage .....................................–0.3V to 60V
SW Voltage (DC) ........................... –0.3V to (VIN + 0.3V)
RUN Voltage ..............................................–0.3V to 60V
HYST, ISET, SS Voltages ............................... –0.3V to 6V
VFB ............................................................... –0.3V to 6V
VOUT (Fixed Output Versions) .......................–0.3V to 6V
(Note 1)
1
2
3
4
SW
VIN
ISET
SS
8
7
6
5
GND
HYST
VOUT/VFB
RUN
TOP VIEW
9
GND
MS8E PACKAGE
8-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 40°C/W, θJC = 5°-10°C/W
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
TOP VIEW
9
GND
DD PACKAGE
8-LEAD (3mm × 3mm) PLASTIC DFN
5
6
7
8
4
3
2
1SW
VIN
ISET
SS
GND
HYST
VOUT/VFB
RUN
TJMAX = 125°C, θJA = 43°C/W, θJC = 3°C/W
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
PIN CONFIGURATION
ORDER INFORMATION
Operating Junction Temperature Range
(Note 2) ..................................................–40°C to 125°C
Storage Temperature Range ...................–65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MS8E ................................................................ 300°C
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC3642EMS8E#PBF LTC3642EMS8E#TRPBF LTDTH 8-Lead Plastic MSOP –40°C to 125°C
LTC3642EMS8E-3.3#PBF LTC3642EMS8E-3.3#TRPBF LTDYN 8-Lead Plastic MSOP –40°C to 125°C
LTC3642EMS8E-5#PBF LTC3642EMS8E-5#TRPBF LTDYQ 8-Lead Plastic MSOP –40°C to 125°C
LTC3642IMS8E#PBF LTC3642IMS8E#TRPBF LTDTH 8-Lead Plastic MSOP –40°C to 125°C
LTC3642IMS8E-3.3#PBF LTC3642IMS8E-3.3#TRPBF LTDYN 8-Lead Plastic MSOP –40°C to 125°C
LTC3642IMS8E-5#PBF LTC3642IMS8E-5#TRPBF LTDYQ 8-Lead Plastic MSOP –40°C to 125°C
LTC3642EDD#PBF LTC3642EDD#TRPBF LDTJ 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC3642EDD-3.3#PBF LTC3642EDD-3.3#TRPBF LDYM 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC3642EDD-5#PBF LTC3642EDD-5#TRPBF LDYP 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC3642IDD#PBF LTC3642IDD#TRPBF LDTJ 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC3642IDD-3.3#PBF LTC3642IDD-3.3#TRPBF LDYM 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
LTC3642IDD-5#PBF LTC3642IDD-5#TRPBF LDYP 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
LTC3642
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ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are for TA = 25°C (Note 2). VIN = 10V, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Input Supply (VIN)
VIN Input Voltage Operating Range 4.5 45 V
UVLO VIN Undervoltage Lockout VIN Rising
VIN Falling
Hysteresis
l
l
3.80
3.75
4.15
4.00
150
4.50
4.35
V
V
mV
OVLO VIN Overvoltage Lockout VIN Rising
VIN Falling
Hysteresis
47
45
50
48
2
52
50
V
V
V
IQDC Supply Current (Note 3)
Active Mode
Sleep Mode
Shutdown Mode
VRUN = 0V
125
12
3
220
22
6
µA
µA
µA
Output Supply (VOUT/VFB)
VOUT Output Voltage Trip Thresholds LTC3642-3.3V, VOUT Rising
LTC3642-3.3V, VOUT Falling
l
l
3.260
3.240
3.310
3.290
3.360
3.340
V
V
LTC3642-5V, VOUT Rising
LTC3642-5V, VOUT Falling
l
l
4.940
4.910
5.015
4.985
5.090
5.060
V
V
VFB Feedback Comparator Trip Voltage VFB Rising l0.792 0.800 0.808 V
VHYST Feedback Comparator Hysteresis Voltage l3 5 7 mV
IFB Feedback Pin Current Adjustable Output Version, VFB = 1V –10 0 10 nA
∆VLINEREG Feedback Voltage Line Regulation VIN = 4.5V to 45V
LTC3642-5, VIN = 6V to 45V
0.001 %/V
Operation
VRUN Run Pin Threshold Voltage RUN Rising
RUN Falling
Hysteresis
1.17
1.06
1.21
1.10
110
1.25
1.14
V
V
mV
IRUN Run Pin Leakage Current RUN = 1.3V –10 0 10 nA
VHYSTL Hysteresis Pin Voltage Low RUN < 1V, IHYST = 1mA 0.07 0.1 V
IHYST Hysteresis Pin Leakage Current VHYST = 1.3V –10 0 10 nA
ISS Soft-Start Pin Pull-Up Current VSS < 1.5V 4.5 5.5 6.5 µA
tINTSS Internal Soft-Start Time SS Pin Floating 0.75 ms
IPEAK Peak Current Trip Threshold ISET Floating
500k Resistor from ISET to GND
ISET Shorted to GND
l100
20
115
55
25
130
32
mA
mA
mA
RON Power Switch On-Resistance
Top Switch
Bottom Switch
ISW = –25mA
ISW = 25mA
3.0
1.5
Ω
Ω
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3642 is tested under pulsed load conditions such that TJ ≈ TA.
LTC3642E is guaranteed to meet specifications from 0°C to 85°C junction
temperature. Specifications over the –40°C to 125°C operating junction
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTC3642I is guaranteed over the
full –40°C to 125°C operating junction temperature range. Note that the
maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal impedance and other environmental
factors. The junction temperature (TJ, in °C) is calculated from the ambient
temperature (TA, in °C) and power dissipation (PD, in Watts) according to
the formula:
TJ = TA + (PD • θJA), where θJA (in °C/W) is the package thermal
impedance.
Note 3: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
LTC3642
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TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Load Current Line Regulation Load Regulation
Feedback Comparator Voltage
vs Temperature
Feedback Comparator Hysteresis
Voltage vs Temperature
Peak Current Trip Threshold
vs Temperature and ISET
Peak Current Trip Threshold
vs RISET
Quiescent Supply Current
vs Input Voltage
Quiescent Supply Current
vs Temperature
INPUT VOLTAGE (V)
5
–0.30
∆VOUT/VOUT (%)
–0.20
–0.10
0
0.10
15 25 35 45
3642 G02
0.20
0.30
10 20 30 40
ILOAD = 25mA
FIGURE 11 CIRCUIT
LOAD CURRENT (mA)
0
OUTPUT VOLTAGE (V)
5.01
5.03
5.05
40
3642 G03
4.99
4.97
5.00
5.02
5.04
4.98
4.96
4.95 10 20 30 50
VIN = 10V
FIGURE 11 CIRCUIT
ISET OPEN
TEMPERATURE (°C)
–40
4.4
FEEDBACK COMPARATOR HYSTERESIS (mV)
4.6
4.8
5.0
5.2
5.6
–10 20 50 80
3642 G05
110
5.4
VIN = 10V
TEMPERATURE (°C)
–40
0
PEAK CURRENT TRIP THRESHOLD (mA)
20
10
30
50
40
70
60
80
90
–10 20 8050
3642 G06
110
130
120
110
100
ISET OPEN
ISET = GND
RISET = 500k
VIN = 10V
RSET (kΩ)
0
10
PEAK CURRENT TRIP THRESHOLD (mA)
30
50
70
90
200 400 600 800 1000
3642 G07
1200
110
20
40
60
80
100
120 VIN = 10V
INPUT VOLTAGE (V)
5
10
12
14
SLEEP
45
3642 G08
8
6
15 25 35
4
2
0
VIN SUPPLY CURRENT (µA)
SHUTDOWN
TEMPERATURE (°C)
–40
10
12
14
SLEEP
110
3642 G09
8
6
–10 20 50 80
4
2
0
VIN SUPPLY CURRENT (µA)
SHUTDOWN
VIN = 10V
LOAD CURRENT (mA)
0.1
80
EFFICIENCY (%)
90
100
1 10 100
3642 G01
70
75
85
95
65
60
FIGURE 11 CIRCUIT
ISET OPEN
VOUT = 5V VIN = 10V
VIN = 45V
VIN = 15V
VIN = 24V
VIN = 36V
TEMPERATURE (°C)
–40
0.798
FEEDBACK COMPARATOR TRIP VOLTAGE (V)
0.799
0.800
0.801
–10 20 50 80
3642 G04
110
VIN = 10V
TA = 25°C, unless otherwise noted.
LTC3642
5
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TYPICAL PERFORMANCE CHARACTERISTICS
Switch On-Resistance
vs Input Voltage
Switch On-Resistance
vs Temperature
Switch Leakage Current
vs Temperature
Efficiency vs Input Voltage
Run Comparator Threshold
Voltage vs Temperature
Internal Soft-Start Time
vs Temperature
Soft-Start Waveforms Operating Waveforms Load Step Transient Response
INPUT VOLTAGE (V)
0
0
SWITCH ON-RESISTANCE (Ω)
0.5
1.5
2.0
2.5
20 40 50
4.5
3642 G10
1.0
10 30
TOP
BOTTOM
3.0
3.5
4.0
TEMPERATURE (°C)
–40
SWITCH ON-RESISTANCE (Ω)
3
4
5
80
3642 G11
2
1
0–10 20 50 110
BOTTOM
VIN = 10V
TOP
TEMPERATURE (°C)
0
SWITCH LEAKAGE CURRENT (µA)
0.2
0.4
0.6
0.1
0.3
0.5
–10 20 50 80
3642 G12
110–40
VIN = 45V
SW = 0V
SW = 45V
TEMPERATURE (°C)
–40
1.00
RUN COMPARATOR THRESHOLD (V)
1.05
1.10
1.15
1.20
1.30
–10 20 50 80
3642 G14
110
1.25 RISING
FALLING
TEMPERATURE (°C)
–40
0.90
INTERNAL SOFT-START TIME (ms)
0.95
1.00
1.05
1.10
1.20
–10 20 50 80
3642 G15
110
1.15
OUTPUT
VOLTAGE
1V/DIV
5ms/DIVCSS = 0.047µF 3642 G16
OUTPUT
VOLTAGE
50mV/DIV
SWITCH
VOLTAGE
5V/DIV
INDUCTOR
CURRENT
50mA/DIV
10µs/DIVVIN = 10V
ISET OPEN
ILOAD = 25mA
FIGURE 11 CIRCUIT
3642 G17
OUTPUT
VOLTAGE
25mV/DIV
LOAD
CURRENT
25mA/DIV
1ms/DIVVIN = 10V
ISET OPEN
FIGURE 11 CIRCUIT
3642 G18
INPUT VOLTAGE (V)
10
65
EFFICIENCY (%)
70
75
80
85
90
95
15 20 25 30 35 40
3642 G13
45
FIGURE 11 CIRCUIT
ISET OPEN
ILOAD = 50mA
ILOAD = 10mA
ILOAD = 1mA
TA = 25°C, unless otherwise noted.
LTC3642
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PIN FUNCTIONS
SW (Pin 1): Switch Node Connection to Inductor. This
pin connects to the drains of the internal power MOSFET
switches.
VIN (Pin 2): Main Supply Pin. A ceramic bypass capacitor
should be tied between this pin and GND (Pin 8).
ISET (Pin 3): Peak Current Set Input. A resistor from this
pin to ground sets the peak current trip threshold. Leave
floating for the maximum peak current (115mA). Short
this pin to ground for the minimum peak current (25mA).
A 1µA current is sourced out of this pin.
SS (Pin 4): Soft-Start Control Input. A capacitor to ground
at this pin sets the ramp time to full current output dur-
ing start-up. A 5µA current is sourced out of this pin. If
left floating, the ramp time defaults to an internal 0.75ms
soft-start.
RUN (Pin 5): Run Control Input. A voltage on this pin
above 1.2V enables normal operation. Forcing this pin
below 0.7V shuts down the LTC3642, reducing quiescent
current to approximately 3µA.
VOUT/VFB (Pin 6): Output Voltage Feedback. For the fixed
output versions, connect this pin to the output supply. For
the adjustable version, an external resistive divider should
be used to divide the output voltage down for comparison
to the 0.8V reference.
HYST (Pin 7): Run Hysteresis Open-Drain Logic Output.
This pin is pulled to ground when RUN (Pin 5) is below
1.2V. This pin can be used to adjust the RUN pin hysteresis.
See Applications Information.
GND (Pin 8, Exposed Pad Pin 9):
Ground. The exposed
pad must be soldered to the printed circuit board ground
plane for optimal electrical and thermal performance.
LTC3642
7
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BLOCK DIAGRAM
–
+
1
LOGIC
AND
SHOOT-
THROUGH
PREVENTION
PEAK CURRENT
COMPARATOR
SW
VIN
SS
VOLTAGE
REFERENCE
FEEDBACK
COMPARATOR 5µA
3642 BD
IMPLEMENT DIVIDER
EXTERNALLY FOR
ADJUSTABLE VERSION
R2
R1
C1
VOUT
L1
REVERSE CURRENT
COMPARATOR
–
+
–
+
–
+
+
0.800V
4
RUN
1.2V
5
ISET
3
HYST
7
GND
9
GND
8
VOUT/VFB
6
1µA 2
C2
PART
NUMBER
LTC3642
LTC3642-3.3
LTC3642-5
R1
0
2.5M
4.2M
R2
∞
800k
800k
LTC3642
8
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OPERATION
The LTC3642 is a step-down DC/DC converter with internal
power switches that uses Burst Mode control, combining
low quiescent current with high switching frequency,
which results in high efficiency across a wide range of
load currents. Burst Mode operation functions by using
short “burst” cycles to ramp the inductor current through
the internal power switches, followed by a sleep cycle
where the power switches are off and the load current is
supplied by the output capacitor. During the sleep cycle,
the LTC3642 draws only 12µA of supply current. At light
loads, the burst cycles are a small percentage of the total
cycle time which minimizes the average supply current,
greatly improving efficiency.
Main Control Loop
The feedback comparator monitors the voltage on the VFB
pin and compares it to an internal 800mV reference. If
this voltage is greater than the reference, the comparator
activates a sleep mode in which the power switches and
current comparators are disabled, reducing the VIN pin
supply current to only 12µA. As the load current discharges
the output capacitor, the voltage on the VFB pin decreases.
When this voltage falls 5mV below the 800mV reference,
the feedback comparator trips and enables burst cycles.
At the beginning of the burst cycle, the internal high side
power switch (P-channel MOSFET) is turned on and the
inductor current begins to ramp up. The inductor current
increases until either the current exceeds the peak cur-
rent comparator threshold or the voltage on the VFB pin
exceeds 800mV, at which time the high side power switch
is turned off and the low side power switch (N-channel
MOSFET) turns on. The inductor current ramps down until
the reverse current comparator trips, signaling that the
current is close to zero. If the voltage on the VFB pin is
still less than the 800mV reference, the high side power
switch is turned on again and another cycle commences.
The average current during a burst cycle will normally be
greater than the average load current. For this architecture,
the maximum average output current is equal to half of
the peak current.
The hysteretic nature of this control architecture results
in a switching frequency that is a function of the input
voltage, output voltage and inductor value. This behavior
provides inherent short-circuit protection. If the output
is shorted to ground, the inductor current will decay very
slowly during a single switching cycle. Since the high side
switch turns on only when the inductor current is near
zero, the LTC3642 inherently switches at a lower frequency
during start-up or short-circuit conditions.
Start-Up and Shutdown
If the voltage on the RUN pin is less than 0.7V, the LTC3642
enters a shutdown mode in which all internal circuitry is
disabled, reducing the DC supply current to 3µA. When the
voltage on the RUN pin exceeds 1.21V, normal operation of
the main control loop is enabled. The RUN pin comparator
has 110mV of internal hysteresis, and therefore must fall
below 1.1V to disable the main control loop.
The HYST pin provides an added degree of flexibility for
the RUN pin operation. This open-drain output is pulled
to ground whenever the RUN comparator is not tripped,
signaling that the LTC3642 is not in normal operation. In
applications where the RUN pin is used to monitor the VIN
voltage through an external resistive divider, the HYST pin
can be used to increase the effective RUN comparator
hysteresis.
An internal 1ms soft-start function limits the ramp rate of
the output voltage on start-up to prevent excessive input
supply droop. If a longer ramp time and consequently less
supply droop is desired, a capacitor can be placed from the
SS pin to ground. The 5µA current that is sourced out of
this pin will create a smooth voltage ramp on the capacitor.
If this ramp rate is slower than the internal 1ms soft-start,
then the output voltage will be limited by the ramp rate
on the SS pin instead. The internal and external soft-start
functions are reset on start-up and after an undervoltage
or overvoltage event on the input supply.
In order to ensure a smooth start-up transition in any
application, the internal soft-start also ramps the peak
(Refer to Block Diagram)
LTC3642
9
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OPERATION
(Refer to Block Diagram)
inductor current from 25mA during its 1ms ramp time to
the set peak current threshold. The external ramp on the
SS pin does not limit the peak inductor current during
start-up; however, placing a capacitor from the ISET pin
to ground does provide this capability.
Peak Inductor Current Programming
The offset of the peak current comparator nominally
provides a peak inductor current of 115mA. This peak
inductor current can be adjusted by placing a resistor
from the ISET pin to ground. The 1µA current sourced out
of this pin through the resistor generates a voltage that is
translated into an offset in the peak current comparator,
which limits the peak inductor current.
Input Undervoltage and Overvoltage Lockout
The LTC3642 implements a protection feature which dis-
ables switching when the input voltage is not within the
4.5V to 45V operating range. If VIN falls below 4V typical
(4.35V maximum), an undervoltage detector disables
switching. Similarly, if VIN rises above 50V typical (47V
minimum), an overvoltage detector disables switching.
When switching is disabled, the LTC3642 can safely sustain
input voltages up to the absolute maximum rating of 60V.
Switching is enabled when the input voltage returns to the
4.5V to 45V operating range.
LTC3642
10
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APPLICATIONS INFORMATION
The basic LTC3642 application circuit is shown on the front
page of this data sheet. External component selection is
determined by the maximum load current requirement and
begins with the selection of the peak current programming
resistor, RISET. The inductor value L can then be determined,
followed by capacitors CIN and COUT.
Peak Current Resistor Selection
The peak current comparator has a maximum current
limit of 115mA nominally, which results in a maximum
average current of 55mA. For applications that demand
less current, the peak current threshold can be reduced
to as little as 25mA. This lower peak current allows the
use of lower value, smaller components (input capacitor,
output capacitor and inductor), resulting in lower input
supply ripple and a smaller overall DC/DC converter.
The threshold can be easily programmed with an ap-
propriately chosen resistor (RISET) between the ISET pin
and ground. The value of resistor for a particular peak
current can be computed by using Figure 1 or the follow-
ing equation:
RISET = IPEAK • 9.09 • 106
where 25mA < IPEAK < 115mA.
The peak current is internally limited to be within the
range of 25mA to 115mA. Shorting the ISET pin to ground
programs the current limit to 25mA, and leaving it floating
sets the current limit to the maximum value of 115mA.
When selecting this resistor value, be aware that the
Figure 1. RISET Selection
maximum average output current for this architecture
is limited to half of the peak current. Therefore, be sure
to select a value that sets the peak current with enough
margin to provide adequate load current under all foresee-
able operating conditions.
Inductor Selection
The inductor, input voltage, output voltage and peak current
determine the switching frequency of the LTC3642. For
a given input voltage, output voltage and peak current,
the inductor value sets the switching frequency when the
output is in regulation. A good first choice for the inductor
value can be determined by the following equation:
L=VOUT
f•IPEAK
•1– VOUT
VIN
The variation in switching frequency with input voltage
and inductance is shown in the following two figures for
typical values of VOUT. For lower values of IPEAK, multiply
the frequency in Figure 2 and Figure 3 by 115mA/IPEAK.
An additional constraint on the inductor value is the
LTC3642’s 100ns minimum on-time of the high side switch.
Therefore, in order to keep the current in the inductor well
controlled, the inductor value must be chosen so that it is
larger than LMIN, which can be computed as follows:
LMIN =VIN(MAX) •tON(MIN)
IPEAK(MAX)
where VIN(MAX) is the maximum input supply voltage for
the application, tON(MIN) is 100ns, and IPEAK(MAX) is the
maximum allowed peak inductor current. Although the
above equation provides the minimum inductor value,
higher efficiency is generally achieved with a larger inductor
value, which produces a lower switching frequency. For a
given inductor type, however, as inductance is increased
DC resistance (DCR) also increases. Higher DCR translates
into higher copper losses and lower current rating, both
of which place an upper limit on the inductance. The
recommended range of inductor values for small surface
mount inductors as a function of peak current is shown in
Figure 4. The values in this range are a good compromise
between the tradeoffs discussed above. For applications
MAXIMUM LOAD CURRENT (mA)
10
RISET (k)
300
900
1000
1100
20 30 35
3642 F01
100
700
500
200
800
0
600
400
15 25 40 50
45
LTC3642
11
3642fc
APPLICATIONS INFORMATION
Figure 3. Switching Frequency for VOUT = 3.3V
Figure 2. Switching Frequency for VOUT = 5V
Figure 4. Recommended Inductor Values for Maximum Efficiency
where board area is not a limiting factor, inductors with
larger cores can be used, which extends the recommended
range of Figure 4 to larger values.
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron cores,
forcing the use of the more expensive ferrite cores. Actual
core loss is independent of core size for a fixed inductor
value but is very dependent of the inductance selected.
As the inductance increases, core losses decrease. Un-
fortunately, increased inductance requires more turns of
wire and therefore copper losses will increase.
Ferrite designs have very low core losses and are pre-
ferred at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard,” which means that
inductance collapses abruptly when the peak design current
is exceeded. This results in an abrupt increase in inductor
ripple current and consequently output voltage ripple. Do
not allow the core to saturate!
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials
are small and do not radiate energy but generally cost
more than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price vs size requirements and any
radiated field/EMI requirements. New designs for surface
mount inductors are available from Coiltronics, Coilcraft,
Toko, Sumida and Vishay.
CIN and COUT Selection
The input capacitor, CIN, is needed to filter the trapezoidal
current at the source of the top high side MOSFET. To
prevent large ripple voltage, a low ESR input capacitor
sized for the maximum RMS current should be used.
Approximate RMS current is given by:
IRMS =IOUT(MAX) •VOUT
VIN
•VIN
VOUT
−1
INPUT VOLTAGE (V)
5
SWITCHING FREQUENCY (kHz)
400
500
600
35
3642 F02
300
200
15 25 45
30
10 20 40
100
0
700
L = 47µH
L = 68µH
L = 100µH
L = 150µH
L = 220µH
L = 470µH
VOUT = 5V
ISET OPEN
INPUT VOLTAGE (V)
5
0
SWITCHING FREQUENCY (kHz)
50
150
200
250
500
350
15 25 30
3642 F03
100
400
450
300
10 20 35 40 45
L = 470µH
L = 220µH
L = 150µH
L = 100µH
L = 68µH
L = 47µH
VOUT = 3.3V
ISET OPEN
PEAK INDUCTOR CURRENT (mA)
100
INDUCTOR VALUE (µH)
1000
10000
10 100
3642 F04
LTC3642
12
3642fc
APPLICATIONS INFORMATION
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2. This simple worst-case condition is
commonly used for design because even significant
deviations do not offer much relief. Note that ripple current
ratings from capacitor manufacturers are often based
only on 2000 hours of life which makes it advisable to
further derate the capacitor, or choose a capacitor rated
at a higher temperature than required. Several capacitors
may also be paralleled to meet size or height requirements
in the design.
The output capacitor, COUT, filters the inductor’s ripple
current and stores energy to satisfy the load current when
the LTC3642 is in sleep. The output ripple has a lower limit
of VOUT/160 due to the 5mV typical hysteresis of the feed-
back comparator. The time delay of the comparator adds
an additional ripple voltage that is a function of the load
current. During this delay time, the LTC3642 continues to
switch and supply current to the output. The output ripple
can be approximated by:
ΔVOUT ≈IPEAK
2– ILOAD
4•10– 6
COUT
+VOUT
160
The output ripple is a maximum at no load and approaches
lower limit of VOUT/160 at full load. Choose the output
capacitor COUT to limit the output voltage ripple at mini-
mum load current.
The value of the output capacitor must be large enough
to accept the energy stored in the inductor without a large
change in output voltage. Setting this voltage step equal to
1% of the output voltage, the output capacitor must be:
COUT >50 •L•IPEAK
VOUT
2
Typically, a capacitor that satisfies the voltage ripple
requirement is adequate to filter the inductor ripple. To
avoid overheating, the output capacitor must also be sized
to handle the ripple current generated by the inductor. The
worst-case ripple current in the output capacitor is given
by IRMS = IPEAK/2. Multiple capacitors placed in parallel
may be needed to meet the ESR and RMS current handling
requirements.
Dry tantalum, special polymer, aluminum electrolytic,
and ceramic capacitors are all available in surface mount
packages. Special polymer capacitors offer very low ESR
but have lower capacitance density than other types.
Tantalum capacitors have the highest capacitance density
but it is important only to use types that have been surge
tested for use in switching power supplies. Aluminum
electrolytic capacitors have significantly higher ESR but
can be used in cost-sensitive applications provided that
consideration is given to ripple current ratings and long-
term reliability. Ceramic capacitors have excellent low ESR
characteristics but can have high voltage coefficient and
audible piezoelectric effects. The high quality factor (Q)
of ceramic capacitors in series with trace inductance can
also lead to significant ringing.
Using Ceramic Input and Output Capacitors
Higher value, lower cost ceramic capacitors are now be-
coming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input and
the power is supplied by a wall adapter through long wires,
a load step at the output can induce ringing at the input,
VIN. At best, this ringing can couple to the output and be
mistaken as loop instability. At worst, a sudden inrush
of current through the long wires can potentially cause a
voltage spike at VIN large enough to damage the LTC3642.
For applications with inductive source impedance, such
as a long wire, a series RC network may be required in
parallel with CIN to dampen the ringing of the input supply.
Figure 5 shows this circuit and the typical values required
to dampen the ringing.
LTC3642
VIN
CIN
LIN
3642 F05
4 • CIN
R = LIN
CIN
Figure 5. Series RC to Reduce VIN Ringing
LTC3642
13
3642fc
APPLICATIONS INFORMATION
Output Voltage Programming
For the adjustable version, the output voltage is set by
an external resistive divider according to the following
equation:
VOUT =0.8V •1+R1
R2
The resistive divider allows the VFB pin to sense a fraction
of the output voltage as shown in Figure 6. Output voltage
adjustment range is from 0.8V to VIN.
VFB
LTC3642
GND
VOUT
R2
R1
Figure 6. Setting the Output Voltage
To minimize the no-load supply current, resistor values in
the megohm range should be used; however, large resistor
values should be used with caution. The feedback divider
is the only load current when in shutdown. If PCB leak-
age current to the output node or switch node exceeds
the load current, the output voltage will be pulled up. In
normal operation, this is generally a minor concern since
the load current is much greater than the leakage. The
increase in supply current due to the feedback resistors
can be calculated from:
∆IVIN =VOUT
R1+R2
•VOUT
VIN
Run Pin with Programmable Hysteresis
The LTC3642 has a low power shutdown mode controlled
by the RUN pin. Pulling the RUN pin below 0.7V puts the
LTC3642 into a low quiescent current shutdown mode
(IQ ~ 3µA). When the RUN pin is greater than 1.2V, the
LTC3642
RUN
4.7M
VIN
3642 F07
LTC3642
RUN
VSUPPLY
Figure 7. RUN Pin Interface to Logic
controller is enabled. Figure 7 shows examples of con-
figurations for driving the RUN pin from logic.
RUN
LTC3642
HYST
VIN
R2
R1
R3 3642 F08
Figure 8. Adjustable Undervoltage Lockout
The RUN pin can alternatively be configured as a precise
undervoltage lockout (UVLO) on the VIN supply with a
resistive divider from VIN to ground. The RUN pin com-
parator nominally provides 10% hysteresis when used in
this method; however, additional hysteresis may be added
with the use of the HYST pin. The HYST pin is an open-
drain output that is pulled to ground whenever the RUN
comparator is not tripped. A simple resistive divider can
be used as shown in Figure 8 to meet specific VIN voltage
requirements.
Specific values for these UVLO thresholds can be computed
from the following equations:
RisingVINUVLOThreshold =1.21V •1+R1
R2
FallingVINUVLOThreshold =1.10V •1+R1
R2+R3
LTC3642
14
3642fc
APPLICATIONS INFORMATION
The minimum value of these thresholds is limited to the
internal VIN UVLO thresholds that are shown in the Electri-
cal Characteristics table. The current that flows through
this divider will directly add to the shutdown, sleep and
active current of the LTC3642, and care should be taken to
minimize the impact of this current on the overall efficiency
of the application circuit. Resistor values in the megohm
range may be required to keep the impact on quiescent
shutdown and sleep currents low. Be aware that the HYST
pin cannot be allowed to exceed its absolute maximum
rating of 6V. To keep the voltage on the HYST pin from
exceeding 6V, the following relation should be satisfied:
VIN(MAX) •R3
R1+R2 +R3
<6V
The RUN pin may also be directly tied to the VIN supply
for applications that do not require the programmable
undervoltage lockout feature. In this configuration, switch-
ing is enabled when VIN surpasses the internal undervoltage
lockout threshold.
Soft-Start
The internal 0.75ms soft-start is implemented by ramping
both the effective reference voltage from 0V to 0.8V and the
peak current limit set by the ISET pin (25mA to 115mA).
To increase the duration of the reference voltage soft-start,
place a capacitor from the SS pin to ground. An internal
5µA pull-up current will charge this capacitor, resulting
in a soft-start ramp time given by:
tSS =CSS •
0.8V
5µA
When the LTC3642 detects a fault condition (input supply
undervoltage or overvoltage) or when the RUN pin falls
below 1.1V, the SS pin is quickly pulled to ground and the
internal soft-start timer is reset. This ensures an orderly
restart when using an external soft-start capacitor.
The duration of the 1ms internal peak current soft-start
may be increased by placing a capacitor from the ISET pin
to ground. The peak current soft-start will ramp from 25mA
to the final peak current value determined by a resistor
from ISET to ground. A 1µA current is sourced out of the
ISET pin. With only a capacitor connected between ISET
and ground, the peak current ramps linearly from 25mA
to 115mA, and the peak current soft-start time can be
expressed as:
tSS(ISET) =CISET •
0.8V
1µA
A linear ramp of peak current appears as a quadratic
waveform on the output voltage. For the case where the
peak current is reduced by placing a resistor from ISET
to ground, the peak current offset ramps as a decaying
exponential with a time constant of RISET • CISET. For this
case, the peak current soft-start time is approximately
3 • RISET • CISET.
Unlike the SS pin, the ISET pin does not get pulled to
ground during an abnormal event; however, if the ISET
pin is floating (programmed to 115mA peak current),
the SS and ISET pins may be tied together and connected
to a capacitor to ground. For this special case, both the
peak current and the reference voltage will soft-start on
power-up and after fault conditions. The ramp time for
this combination is CSS(ISET) • (0.8V/6µA).
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of
the losses: VIN operating current and I2R losses. The VIN
operating current dominates the efficiency loss at very
low load currents whereas the I2R loss dominates the
efficiency loss at medium to high load currents.
1. The VIN operating current comprises two components:
The DC supply current as given in the electrical charac-
teristics and the internal MOSFET gate charge currents.
LTC3642
15
3642fc
APPLICATIONS INFORMATION
The gate charge current results from switching the gate
capacitance of the internal power MOSFET switches.
Each time the gate is switched from high to low to
high again, a packet of charge, dQ, moves from VIN to
ground. The resulting dQ/dt is the current out of VIN
that is typically larger than the DC bias current.
2. I2R losses are calculated from the resistances of the
internal switches, RSW, and external inductor RL. When
switching, the average output current flowing through
the inductor is “chopped” between the high side PMOS
switch and the low side NMOS switch. Thus, the series
resistance looking back into the switch pin is a function
of the top and bottom switch R DS(ON) values and the
duty cycle (DC = VOUT/V IN) as follows:
RSW = (RDS(ON)TOP)DC + (RDS(ON)BOT)(1 – DC)
The RDS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Characteris-
tics curves. Thus, to obtain the I2R losses, simply add
RSW to RL and multiply the result by the square of the
average output current:
I2R Loss = IO2(RSW + RL)
Other losses, including CIN and COUT ESR dissipative
losses and inductor core losses, generally account for
less than 2% of the total power loss.
Thermal Considerations
The LTC3642 does not dissipate much heat due to its high
efficiency and low peak current level. Even in worst-case
conditions (high ambient temperature, maximum peak
current and high duty cycle), the junction temperature will
exceed ambient temperature by only a few degrees.
Design Example
As a design example, consider using the LTC3642 in an
application with the following specifications: VIN = 24V,
VOUT = 3.3V, IOUT = 50mA, f = 250kHz. Furthermore, as-
sume for this example that switching should start when
VIN is greater than 12V and should stop when VIN is less
than 8V.
First, calculate the inductor value that gives the required
switching frequency:
L=3.3V
250kHz •115mA
Ê
Ë
Áˆ
¯
˜•1– 3.3V
24V
Ê
Ë
Áˆ
¯
˜@100µH
Next, verify that this value meets the LMIN requirement.
For this input voltage and peak current, the minimum
inductor value is:
LMIN =
24V •100ns
115mA ≅22µH
Therefore, the minimum inductor requirement is satisfied,
and the 100μH inductor value may be used.
Next, CIN and COUT are selected. For this design, CIN should
be size for a current rating of at least:
IRMS =50mA •3.3V
24V •24V
3.3V – 1 ≅18mARMS
Due to the low peak current of the LTC3642, decoupling
the VIN supply with a 1µF capacitor is adequate for most
applications.
COUT will be selected based on the output voltage ripple
requirement. For a 1.5% (50mV) output voltage ripple at
no load, COUT can be calculated from:
COUT =115mA •4•10–6
2 50mV – 3.3V
160
A 7.8µF capacitor gives this typical output voltage ripple at
no load. Choose a 10µF capacitor as a standard value.
The output voltage can now be programmed by choosing
the values of R1 and R2. Choose R2 = 240k and calculate
R1 as:
R1=VOUT
0.8V – 1
•R2 =750k
LTC3642
16
3642fc
APPLICATIONS INFORMATION
The undervoltage lockout requirement on VIN can be
satisfied with a resistive divider from VIN to the RUN and
HYST pins. Choose R1 = 2M and calculate R2 and R3 as
follows:
R2 =1.21V
V
IN(RISING) – 1.21V
•R1=224k
R3 =1.1V
V
IN(FALLING) – 1.1V
•R1– R2 =90.8k
Choose standard values for R2 = 226k and R3 = 91k. The
ISET pin should be left open in this example to select maxi-
mum peak current (115mA). Figure 9 shows a complete
schematic for this design example.
3. Keep the switching node, SW, away from all sensitive
small signal nodes. The rapid transitions on the switching
node can couple to high impedance nodes, in particular
VFB, and create increased output ripple.
4. Flood all unused area on all layers with copper. Flooding
with copper will reduce the temperature rise of power
components. You can connect the copper areas to any
DC net (VIN, VOUT, GND or any other DC rail in your
system).
VIN
LTC3642
RUN
2M
1µF
226k
91k
HYST
3642 F09
SW
VIN
24V
VOUT
3.3V
50mA
ISET
SS
VFB
GND
750k
10µF
100µH
240k
Figure 9. 24V to 3.3V, 50mA Regulator at 250kHz
Figure 10. Layout Example
VIN
LTC3642
RUN
CIN
CSS RSET
ISET
3642 F10a
SW
VIN VOUT
VFB
SS
HYST
GND
L1
R1
R2
1
6
2
5
7
4 3
8, 9
COUT
L1
COUT
VOUT
VIN
GND
3642 F10b
VIAS TO GROUND PLANE
VIAS TO INPUT SUPPLY (VIN)
OUTLINE OF LOCAL GROUND PLANE
CIN
R1
R2
RSET CSS
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3642. Check the following in your layout:
1. Large switched currents flow in the power switches
and input capacitor. The loop formed by these compo-
nents should be as small as possible. A ground plane
is recommended to minimize ground impedance.
2. Connect the (+) terminal of the input capacitor, CIN, as
close as possible to the VIN pin. This capacitor provides
the AC current into the internal power MOSFETs.
LTC3642
17
3642fc
TYPICAL APPLICATIONS
Figure 11. High Efficiency 5V Regulator
Efficiency vs Load Current
VIN
LTC3642
RUN
CIN
4.7µF
HYST
3642 F11a
SW
VIN
5V TO 45V
VOUT
5V
VFB
SS
ISET
GND
L1
220µH
R1
4.2M
R2
800k
CIN: TDK C5750X7R2A475MT
COUT: AVX 1812D107MAT
L1: TDK SLF7045T-221MR33-PF
COUT
100µF
CSS
47nF
RSET
3.3V, 50mA Regulator with Peak Current Soft-Start, Small Size Soft-Start Waveforms
VIN
LTC3642
RUN
CIN
1µF
SS 3642 TA02a
SW
VIN
4.5V TO 24V
VOUT
3.3V
50mA
VFB
HYST
ISET
GND
L1
47µH
R1
294k
R2
93.1k
CIN: TDK C3216X7R1E105KT
COUT: AVX 08056D106KAT2A
L1: TAIYO YUDEN CBC2518T470K
COUT
10µF
CSS
0.1µF
OUTPUT VOLTAGE
1V/DIV
INDUCTOR CURRENT
20mA/DIV
2ms/DIV 3642 TA03b
LOAD CURRENT (mA)
1
88
EFFICIENCY (%)
89
90
91
92
94
10 100
3642 F11b
93
VIN = 10V
RSET = 750k
ISET OPEN
RSET = 500k
Positive-to-Negative Converter Maximum Load Current vs Input Voltage
VIN
LTC3642
RUN
CIN
1µF
HYST
3642 TA04a
SW
VIN
4.5V TO 33V
VOUT
–12V
VFB
SS
ISET
GND
L1
100µH
R1
1M
R2
71.5k
CIN: TDK C3225X7R1H105KT
COUT: MURATA GRM32DR71C106KA01
L1: TYCO/COEV DQ6530-101M
COUT
10µF
INPUT VOLTAGE (V)
5
MAXIMUM LOAD CURRENT (mA)
30
40
45
3642 TA04b
20
10 15 25 35
10 20 30 40
50
25
35
15
45
VOUT = –3V
VOUT = –5V
VOUT = –12V
LTC3642
18
3642fc
TYPICAL APPLICATIONS
Small Size, Limited Peak Current, 10mA Regulator
VIN
LTC3642
RUN
CIN
1µF
R3
470k
R4
100k
R5
33k
ISET
3642 TA05a
SW
VIN
7V TO 45V
VOUT
5V
10mA
VFB
SS
HYST
GND
L1
470µH
R1
470k
R2
88.7k
CIN: TDK C3225X7R1H105KT
COUT: AVX 08056D106KAT2A
L1: MURATA LQH32CN471K23
COUT
10µF
VIN
LTC3642
RUN
CIN
1µF
SS 3642 TA07a
SW
VIN
15V TO 45V
VOUT
15V
10mA
VFB
HYST
ISET
GND
L1
4700µH
R1
3M
R2
169k
CIN: AVX 18125C105KAT2A
COUT: TDK C3216X7R1E475KT
L1: COILCRAFT DS1608C-475
COUT
4.7µF
LOAD CURRENT (mA)
0.1
60
EFFICIENCY (%)
70
80
100
1 10
3642 TA07b
90
65
75
95
85
VIN = 24V
VIN = 36V
VIN = 45V
High Efficiency 15V, 10mA Regulator Efficiency vs Load Current
LTC3642
19
3642fc
PACKAGE DESCRIPTION
3.00 ±0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
0.40 ± 0.10
BOTTOM VIEW—EXPOSED PAD
1.65 ± 0.10
(2 SIDES)
0.75 ±0.05
R = 0.125
TYP
2.38 ±0.10
14
85
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
0.00 – 0.05
(DD8) DFN 0509 REV C
0.25 ± 0.05
2.38 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
1.65 ±0.05
(2 SIDES)2.10 ±0.05
0.50
BSC
0.70 ±0.05
3.5 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698 Rev C)
LTC3642
20
3642fc
PACKAGE DESCRIPTION
MSOP (MS8E) 0910 REV I
0.53 ± 0.152
(.021 ± .006)
SEATING
PLANE
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD
SHALL NOT EXCEED 0.254mm (.010") PER SIDE.
0.18
(.007)
0.254
(.010)
1.10
(.043)
MAX
0.22 – 0.38
(.009 – .015)
TYP
0.86
(.034)
REF
0.65
(.0256)
BSC
0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
1 2 34
4.90 ± 0.152
(.193 ± .006)
8
8
1
BOTTOM VIEW OF
EXPOSED PAD OPTION
765
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
0.52
(.0205)
REF
1.68
(.066)
1.88
(.074)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
1.68 ± 0.102
(.066 ± .004)
1.88 ± 0.102
(.074 ± .004) 0.889 ± 0.127
(.035 ± .005)
RECOMMENDED SOLDER PAD LAYOUT
0.65
(.0256)
BSC
0.42 ± 0.038
(.0165 ± .0015)
TYP
0.1016 ± 0.0508
(.004 ± .002)
DETAIL “B”
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
0.05 REF
0.29
REF
MS8E Package
8-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1662 Rev I)
LTC3642
21
3642fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
B 6/10 Text updates in Description
Updates to Absolute Maximum Ratings
LTC3642IMS8E-3.3E#PBF changed to LTC3642IMS8E-3.3#PBF in Order Information
Updates to Electrical Characteristics
Updates to graphs G05, G06, G14, G16, G17
Updated description for Pins 8 and 9 in Pin Functions
Text updates in Operation section
Text updates in Applications Information section
Figure 10 graphic added
Updated Y-axis text on TA04b graphic
Asterisk and related text added to Typical Application
Related Parts updated
1
2
2
3
4, 5
6
8,9
13
16
17
22
22
C 10/10 Updated text in CIN and COUT Selection section
Updated text in Design Example section
12
15
(Revision history begins at Rev B)
LTC3642
22
3642fc
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
LINEAR TECHNOLOGY CORPORATION 2008
LT 1010 REV C • PRINTED IN USA
RELATED PARTS
TYPICAL APPLICATION
5V, 50mA Regulator for Automotive Applications
VIN
LTC3642
RUN
CIN
1µF
SS 3642 TA06a
SW
VBATT
12V
VOUT*
5V
50mA
VFB
HYST
ISET
GND
*VOUT = VBATT FOR VBATT < 5V
L1
220µH
R1
470k
R2
88.7k
CIN: TDK C3225X7R2A105M
COUT: KEMET C1210C106K4RAC
L1: COILTRONICS DRA73-221-R
COUT
10µF
PART NUMBER DESCRIPTION COMMENTS
LTC3631/LTC3631-3.3/
LTC3631-5
45V, 100mA Synchronous Micropower Step-Down DC/DC
Converter
VIN: 4.5V to 45V (60VMAX), VOUT(MIN) = 0.8V, IQ = 12µA,
ISD = 3µA, 3mm × 3mm DFN8, MS8E
LTC3632 50V, 20mA Synchronous Micropower Step-Down DC/DC
Converter
VIN: 4.5V to 50V (60VMAX), VOUT(MIN) = 0.8V, IQ = 12µA,
ISD = 3µA, 3mm × 3mm DFN8, MS8E
LTC1474 18V, 250mA (IOUT), High Efficiency Step-Down DC/DC Converter VIN: 3V to 18V, VOUT(MIN) = 1.2V, IQ = 10µA, ISD = 6µA, MSOP8
LT1934/LT1934-1 36V, 250mA (IOUT), Micropower Step-Down DC/DC Converter
with Burst Mode Operation
VIN: 3.2V to 34V, VOUT(MIN) = 1.25V, IQ = 12µA, ISD < 1µA,
ThinSOT™ Package
LT1939 25V, 2A, 2.5MHz High Efficiency DC/DC Converter and LDO
Controller
VIN: 3.6V to 25V, VOUT(MIN) = 0.8V, IQ = 2.5mA, ISD < 10µA,
3mm × 3mm DFN10
LT3437 60V, 400mA (IOUT), Micropower Step-Down DC/DC Converter
with Burst Mode Operation
VIN: 3.3V to 60V, VOUT(MIN) = 1.25V, IQ = 100µA, ISD < 1µA,
3mm × 3mm DFN10, TSSOP16E
LT3470 40V, 250mA (IOUT), High Efficiency Step-Down DC/DC
Converter with Burst Mode Operation
VIN: 4V to 40V, VOUT(MIN) = 1.2V, IQ = 26µA, ISD < 1µA,
2mm × 3mm DFN8, ThinSOT
LT3685 36V with Transient Protection to 60V, 2A (IOUT), 2.4MHz, High
Efficiency Step-Down DC/DC Converter
VIN: 3.6V to 38V, VOUT(MIN) = 0.78V, IQ = 70µA, ISD < 1µA,
3mm × 3mm DFN10, MSOP10E
