© 2003 Fairchild Semiconductor Corporation DS500494 www.fairchildsemi.com
July 2001
Revised April 2003
NC7NZ34 TinyLogic
UHS Trip le Buffer
NC7NZ34
TinyLogic UHS Triple Buffer
General Description
The NC7NZ34 is a triple buffer from Fairchild’s Ultra High
Speed Series of TinyLogic in the space saving US8 pack-
age. The device is fabricated with advanced CMOS tech-
nology to achieve ultra high speed with high output drive
while maintaining low static power dissipation over a very
broad VCC operating range. The device is specified to
operate o ver t he 1.65 V to 5 .5V VCC rang e. The inputs a nd
output s are high impedance wh en VCC is 0V. Inputs toler-
ate voltages up to 7V independent of VCC operating volt-
age.
Features
Space saving US8 surface mount package
MicroPak leadless package
Ultra High Speed: tPD 2.4 ns Typ into 50 pF at 5V VCC
High Output Drive: ±24 mA at 3V VCC
Broad VCC Operating Range: 1.65V to 5.5V
Power down high impedance inputs/outputs
Overvoltage tolerant inputs facilitate 5V to 3V translation
Patented noise/EMI reduction circuitry implemented
Ordering Code:
TinyLogic is a reg is t ered tradem ark of Fairchild Sem iconduc t or Corporation.
MicroPak is a trad em ark of Fairchild Sem icond uc t or Corporation.
Product Package Description Supplied AsOrder Package Code
Numbe r Numbe r Top Mark
NC7NZ34K8X MAB08A 7NZ34 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel
NC7NZ34L8X
(Preliminary) MAC08A P9 8-Lead MicroPak, 1.6 mm Wide 5k Units on Tape and Reel
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NC7NZ34
Logic Symbol
IEEE/IEC
Pin Descriptions
Function Table
Y = A
H = HIGH Logi c Level
L = LOW Logic Lev el
Connection Diagrams
(To p View)
Pin One Orienta tion Diagram
AAA represen t s P roduct Code Top Ma rk - s ee ordering code
Note: Orientation of Top Mark determines Pin One location. Read the top
produc t co de mark lef t to right, Pin On e is th e lower lef t pi n (see dia gram).
Pad Assignments for MicroPak
(Top Thru View)
Pin Names Description
A1, A2, A3Data Inputs
Y1, Y2, Y3Output
Input Output
AY
LL
HH
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NC7NZ34
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions (Note 2)
Note 1: Abs olut e maxi mum ratin gs ar e DC value s beyond whi ch t he devi ce
may b e dam aged or h ave its usef ul li fe i mpa ired . Th e data she et sp ecif ica-
tions should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading vari-
ables. Fairchild does not recommend operation outside datasheet specifi-
cations.
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Supply Voltage (VCC)0.5 V to +7.0V
DC Input Voltage (VIN)0.5V to +7.0V
DC Output Voltage (VOUT)0.5 V to +7.0V
DC Input Diode Current (IIK)
VIN < 0V 50 mA
DC Output Diode Current (IOK)
VOUT < 0V 50 mA
DC Output Source/Sink Current (IOUT)±50 mA
DC VCC/GND Current (ICC/IGND)±100 mA
Storage Temperature (TSTG)65°C to +150°C
Junction Temperature under Bias (TJ) 150°C
Junction Lead Temper atu re (T L)
(Soldering, 10 seconds) 260°C
Power Dissipation (PD) @ +85°C 250 mW
Supply Voltage
Operating (VCC) 1.65V to 5.5V
Data Retention 1.5V to 5.5V
Input Voltage (VIN) 0V to 5.5V
Output Voltage (VOUT)0V to V
CC
Input Rise and Fall Time (tr, tf)
VCC = 1.8V, 2.5V ± 0.2V 0 to 20 ns/V
VCC = 3.3V ± 0.3V 0 to 10 ns/V
VCC = 5.5V ± 0.5V 0 to 5 ns/V
Operating Temperature (TA)40°C to +85°C
Thermal Resistance (θJA)250°C/W
Symbol Parameter VCC TA = +25°CT
A = 40°C to +85°CUnits Conditions
(V) Min Typ Max Min Max
VIH HIGH Level Control 1.8 ± 0.15 0.75 VCC 0.75 VCC V
Input Voltage 2.3 to 5.5 0.7 VCC 0.7 VCC
VIL LOW Level Control 1.8 ± 0.15 0.25 VCC 0.25 VCC V
Input Voltage 2.3 to 5.5 0.3 VCC 0.3 VCC
VOH HIGH Level Control 1.65 1.55 1.65 1.55
VV
IN = VIH
IOH = 100 µA
Output Voltage 2.3 2.2 2.3 2.2
3.0 2.9 3.0 2.9
4.5 4.4 4.5 4.4
1.65 1.29 1.52 1.29 IOH = 4 mA
2.3 1.9 2.14 1.9 IOH = 8 mA
3.0 2.4 2.75 2.4 IOH = 16 mA
3.0 2.3 2.62 2.3 IOH = 24 mA
4.5 3.8 4.13 3.8 IOH = 32 mA
VOL LOW Level Control 1.65 0.0 0.1 0.1
VV
IN = VIL
IOL = 100 µA
Output Voltage 2.3 0.0 0.1 0.1
3.0 0.0 0.1 0.1
4.5 0.0 0.1 0.1
1.65 0.08 0.24 0.24 IOL = 4 mA
2.3 0.10 0.3 0.3 IOL = 8 mA
3.0 0.16 0.4 0.4 IOL = 16 mA
3.0 0.24 0.55 0.55 IOL = 24 mA
4.5 0.25 0.55 0.55 IOL = 32 mA
IIN Input Leakage Current 0 to 5.5 ±0.1 ±1.0 µA0 VIN 5.5V
IOFF Power Off Leakage Current 0.0 1.0 10 µAV
IN or VOUT = 5.5V
ICC Quiescent Supply Current 1.65 to 5.5 1.0 10 µAV
IN = 5.5V, GND
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NC7NZ34
AC Electrical Characteristics
Note 3: CPD is defined as the value of th e internal equivalent c apacita nc e which is deriv ed from dy namic operat ing current con su m pt ion (ICCD) at no output
loading and operating at 50% duty cycle. (See Figure 2.) CPD is relate d to I CCD dynamic operating current by the expression:
ICCD = (CPD)(VCC)(fIN) + (ICCstatic).
Dynamic Switching Characteristics
AC Loading and Waveforms
CL includes load and stray capacitance
Input PRR = 1.0 MHz; tW = 500 ns
FIGURE 1. AC Test Circuit
Input = AC Waveform; tr = tf = 1.8 ns;
PRR = 10 MHz; Duty Cycle = 50%
FIGURE 2. ICCD Test Circuit
FIGURE 3. AC Waveforms
Symbol Parameter VCC TA = +25°CT
A = 40°C to +85°CUnits Conditions Figure
(V) Min Typ Max Min Max Number
tPLH Propagation Delay 1.8 ± 0.15 1. 8 4.6 8.0 1.8 8.8
ns Figures
1, 3
tPHL 2.5 ± 0.2 1.0 3.0 5.2 1.0 5.8 CL = 15 pF,
3.3 ± 0.3 0.8 2.3 3.6 0.8 4.0 RL = 1 M
5.0 ± 0.5 0.5 1.8 2.9 0.5 3.2
tPLH Propagation Delay 3.3 ± 0.3 1.2 3.0 4.6 1.2 5.1 ns CL = 50 pF, Figures
1, 3
tPHL 5.0 ± 0.5 0.8 2.4 3.8 0.8 4.2 RL = 500
CIN Input Capacitance 0 2.5 pF
CPD Power Dissipation 3.3 9 pF (Note 3) Figure 2
Capacitance 5.0 11
Symbol Parameter Conditions VCC TA = 25°CUnit
(V) Typical
VOLP Quiet Output Dynamic Peak VOL CL = 50pF, VIH = 5.0V, VIL = 0V 5.0 0.8 V
VOLV Quiet Output Dynamic Valley VOL CL = 50pF, VIH = 5.0V, VIL = 0V 5.0 0.8 V
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NC7NZ34
Tape and Reel Speci fication
TAPE FORMAT for US8
TAPE DIMENSIONS inches (millimeters)
TAPE FORMAT for MicroPak
TAPE DIMENSIONS inches (millimeters)
Packa ge Tape Number Cavity Cove r Tape
Designator Section Cavities Status Status
Leader (Start End) 125 (typ) Empty Sealed
K8X Carrier 3000 Filled Sealed
Trailer (Hub End) 75 (typ) Empty Sealed
Packa ge Tape Number Cavity Co ve r Tape
Designator Section Cavities Status Status
Leader (Start End) 125 (typ) Empty Sealed
K8X Carrier 3000 Filled Sealed
Trailer (Hub End) 75 (typ) Empty Sealed
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NC7NZ34
Tape and Reel Specification (Continued)
REEL DIMENSIONS inches (millimeters)
Tape
Size ABCDN W1 W2 W3
8 mm 7.0 0.059 0.512 0.795 2.165 0.331 + 0.059/0.000 0.567 W1 + 0.078/0.039
(177.8) (1.50) (13.00) (20.20) (55.00) (8.40 + 1.50/0.00) (14.40) (W1 + 2.00/1.00)
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NC7NZ34
Physical Dimensions inches (millimeters) unless otherwise noted
8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide
Package Number MAB08A
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NC7NZ34 TinyLogic
UHS Triple Buffer
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Lead MicroPak, 1.6 mm Wide
Package Number MAC08A
(Preliminary)
Fairchild does not assu me any responsibility for use of any circuitry de scribed, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life suppor t de vices o r syste ms are devices or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical compon ent i n any compon ent of a lif e supp ort
device or system whose failure to perform can be rea-
sonabl y ex pect ed to ca use the fa ilu re of the li fe su pp ort
device or system, or to affect its safety or effectiveness.
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