1
LT1680
High Power DC/DC
Step-Up Controller
■
High Voltage: Operation Up to 60V
■
High Current: N-Channel Drive Handles Up to
10,000pF Gate Capacitance
■
Programmable Average Current Limiting
■
5V Reference Output with 10mA External
Loading Capability
■
Fixed Frequency Current Mode Operation
■
Oscillator Synchronizable Up to 200kHz
■
Undervoltage Lockout with Hysteresis
■
Programmable Start Inhibit for Power Supply
Sequencing and Protection
■
User Adjustable Slope Compensation
The LT
®
1680 is a high power, current mode switching
power supply controller optimized for boost topologies.
The IC drives an N-channel MOSFET switch for DC/DC
converter applications up to 60V input. A high current gate
drive output handles up to 10,000pF gate capacitance,
enabling the construction of high power DC/DC convert-
ers. Current sense common mode range up to 60V allows
current sensing to be referenced to the input supply,
eliminating the need for sense blanking circuits.
The LT1680 incorporates programmable average current
limiting allowing accurate limiting of DC current in the
magnetics, independent of ripple current . User adjustable
slope compensation provides stable operation at duty
cycles up to 90%.
The LT1680 operating frequency is programmable and
can be synchronized up to 200kHz. Minimum off-time
operation provides switch protection. The IC also incorpo-
rates a soft start feature that is gated by both shutdown
and undervoltage lockout conditions.
■
High Power Single Board Systems
■
Distributed Power Converters
■
Industrial Control Systems
■
Lead-Acid Battery Back-Up Systems
■
Automotive and Heavy Equipment
, LTC and LT are registered trademarks of Linear Technology Corporation.
12V to 48V, 250W Boost Converter
Efficiency vs Output Power
FEATURES
DESCRIPTIO
U
APPLICATIO S
U
TYPICAL APPLICATIO
U
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
SL/ADJ
C
T
I
AVG
SS
V
C
SGND
V
FB
V
REF
5V
REF
SYNC
12V
IN
GATE
PGND
RUN/SHDN
SENSE
–
SENSE
+
+
LT1680
MBR0520
R
CT
15k
R7
2k
R
VC
4.7k
C
CT
1nF
C3 220pF
C
VC
4.7nF
C4 0.22µF
C2
1µF
C11 1nF
1680 TA01
C6 0.1µFR6
75k
R9
100k
C12
1µFM1
IRFZ44
×3
D1
MBR20100CT
×2
+
C
IN
680µF
25V
×4
C
OUT
680µF
63V
×3
V
OUT
48V
5.2A
L1
25µH
R
SENSE
0.005Ω
12V
IN
10V TO 15V
24A (DC)
+
L1: Kool Mµ
®
, 18T #14 ON 77314-A7
Kool Mµ IS A REGISTERED TRADEMARK OF MAGNETICS, INC.
OUTPUT POWER (W)
0
EFFICIENCY (%)
90
95
100
200
1680 TA02
85
80
75 50 100 150 250
V
OUT
= 48V
2
LT1680
LT1680CN
LT1680CSW
LT1680IN
LT1680ISW
ORDER PART
NUMBER
1
2
3
4
5
6
7
8
TOP VIEW
SW PACKAGE
16-LEAD PLASTIC SO WIDE
N PACKAGE
16-LEAD PDIP
16
15
14
13
12
11
10
9
SL/ADJ
C
T
I
AVG
SS
V
C
SGND
V
FB
V
REF
5V
REF
SYNC
12V
IN
GATE
PGND
RUN/SHDN
SENSE
–
SENSE
+
T
JMAX
= 125°C, θ
JA
= 75°C/ W (N)
T
JMAX
= 125°C, θ
JA
= 90°C/ W (SW)
(Note 1)
Power Supply Voltage (12V
IN
).................. –0.3V to 20V
Sense Amplifier Input Common Mode ...... –0.3V to 60V
GATE Pin Voltage....................... –0.3V to 12V
IN
+ 0.3V
RUN/SHDN Pin Voltage ......................... –0.3V to 12V
IN
All Other Pin Voltages ................................. –0.3V to 7V
5V Reference Output Current............................... 65mA
Operating Ambient Temperature Range
LT1680C.................................................. 0°C to 70°C
LT1680I .............................................. –40°C to 85°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
Consult factory for parts specified with wider operating temperature ranges.
ABSOLUTE AXI U RATI GS
WWWU
PACKAGE/ORDER I FOR ATIO
UU
W
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
12VIN = 12V, VVC = 2V, VFB = VREF = 1.25V, CGATE = 3000pF, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Supply and Protection
I
12VIN
DC Active Supply Current (Note 2) Gate Output On ●15 22 mA
Gate Output Off 12 mA
DC Standby Supply Current V
RUN
< 0.5V ●150 250 µA
V
RUN/SHDN
Shutdown Rising Threshold ●1.15 1.25 1.35 V
V
SSHYST
Shutdown Threshold Hysteresis 25 mV
I
SS
Soft Start Charge Current ●5814 µA
V
UVLO
Undervoltage Lockout Threshold - Falling ●8.20 9.00 9.75 V
Undervoltage Lockout Threshold - Rising ●9.35 9.95 V
Undervoltage Lockout Hysteresis ●200 350 mV
5V Reference
V
REF5
5V Reference Voltage Line, Load and Temperature ●4.75 5 5.25 V
5V Reference Line Regulation 10V ≤ 12V
IN
≤ 15V ●3 5 mV/V
I
REF5
5V Reference Load Range - DC ●10 mA
Pulse ●20 mA
5V Reference Load Regulation 0 ≤ I
REF5
≤ 20mA ●–1.25 –2 V/A
I
SC
5V Reference Short-Circuit Current 45 mA
Error Amplifier
V
FB
Error Amplifier Reference Voltage Measured at Feedback Pin 1.242 1.250 1.258 V
●1.235 1.265 V
I
FB
Feedback Input Current V
FB
= V
REF
●0.1 0.5 1.0 µA
g
m
Error Amplifier Transconductance ●1200 2000 3200 µmho
A
V
Error Amplifier Voltage Gain ●1500 3000 V/V
I
VC
Error Amplifier Source Current ●200 275 µA
Error Amplifier Sink Current V
FB
– V
REF
= 500mV ●280 400 µA
V
VC
Absolute V
C
Clamp Voltage Measured at V
C
Pin 3.5 V
3
LT1680
Note 2: Supply current specification does not include external FET gate
charge currents. Actual supply currents will be higher and vary with
operating frequency, operating voltages and the type of external FETs used.
See Applications Information.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Error Amplifier
V
SENSE
Peak Current Limit Threshold Measured at Sense Inputs ●170 190 mV
Average Current Limit Threshold Measured at Sense Inputs, V
CMSENSE
= 10V ●110 120 130 mV
V
IAVG
Average Current Limit Threshold Measured at I
AVG
Pin 2.5 V
Current Sense Amplifier
A
V
Amplifier DC Gain Measured at I
AVG
Pin 15 V/V
V
OS
Amplifier Input Offset Voltage 2V < V
CMSENSE
< 60V, ●0.1 mV
SENSE
+
– SENSE
–
= 5mV
I
BIAS
Input Bias Current Sink (V
CMSENSE
> 5V) ●45 75 µA
Source (V
CMSENSE
= 0V) ●700 1200 µA
Oscillator
f
O
Operating Frequency, Free Run ●200 kHz
Frequency Programming Error f
O
≤ 200kHz, R
CT
= 16.9k, C
CT
= 1000pF ●–5 5 %
I
CT
Timing Capacitor Discharge Current LT1680C ●2.20 2.5 2.75 mA
LT1680I ●2.10 2.5 2.75 mA
V
SYNC
SYNC Input Threshold Rising Edge ●0.8 2.0 V
f
SYNC
SYNC Frequency Range f
SYNC
≤ 200kHz ●f
O
1.4f
O
Output Drivers
V
GATE
Undervoltage Output Clamp 12V
IN
≤ 8.2V ●0.4 0.7 V
Standby Mode Output Clamp V
RUN
< 0.5V ●0.1 V
Gate Output On Voltage ●11 11.9 12 V
Gate Output Off Voltage ●0.4 0.7 V
t
GATER
Gate Output Rise Time ●60 200 ns
t
GATEF
Gate Output Fall Time ●60 140 ns
Note 1: Absolute Maximum Ratings are those values beyond which the life of
a device may be impaired.
The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
12VIN = 12V, VVC = 2V, VFB = VREF = 1.25V, CGATE = 3000pF, unless otherwise noted.
ELECTRICAL CHARACTERISTICS
4
LT1680
I12VIN Supply Current
vs Temperature Gate Transition Time vs CGATE
12V
IN
SUPPLY VOLTAGE (V)
10
I
12VIN
SUPPLY CURRENT (mA )
1514
1680 G02
11 12 13
40
35
30
25
20
15
C
G
= 10nF
C
G
= 4.7nF
C
G
= 3.3nF
C
G
= 1nF
f
O
= 150kHz
T
A
= 25°C
I12VIN Supply Current
vs 12VIN Supply Voltage
5VREF Short-Circuit Current
vs Temperature
TEMPERATURE (°C)
–50
5V
REF
SHORT-CIRCUIT CURRENT (mA)
60
55
50
45
40
35
30 25 75
1680 G04
–25 0 50 100 125
5V
REF
= 0V
I12VIN Shutdown Current
vs Temperature
TEMPERATURE (°C)
–50
I
12VIN
SHUTDOWN CURRENT (µA)
190
180
170
160
150
140
130 25 75
1680 G05
–25 0 50 100 125
VREF Voltage
vs Temperature
TEMPERATURE (°C)
–50
V
REF
VOLTAGE (V)
1.252
1.251
1.250
1.249
1.248
1.247
1.246 25 75
1680 G06
–25 0 50 100 125
5VREF Voltage
vs Temperature Error Amplifier Voltage Gain
vs Temperature Error Amplifier Transconductance
vs Temperature
TEMPERATURE (°C)
–50
5V
REF
VOLTAGE (V)
5.01
5.00
4.99
4.98 25 75
1680 G07
–25 0 50 100 125
TEMPERATURE (°C)
–50
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0 25 75
1680 G08
–25 0 50 100 125
ERROR AMPLIFIER VOLTAGE GAIN (kV/V)
TEMPERATURE (°C)
–50
ERROR AMPLIFIER TRANSCONDUCTANCE (m )
2.6
2.4
2.2
2.0
1.8
1.6
1.4 25 75
1680 G09
–25 0 50 100 125
Ω
TEMPERATURE (°C)
–50
I
12VIN
SUPPLY CURRENT (mA)
100
1680 G01
050
19
18
17
16
15
14
13
12
11 –25 25 75 125
C
GATE
(pF)
0
30
GATE TRANSITION TIME (ns)
50
70
90
110 t
f
t
r
130
150 T
A
= 25°C
2500 5000 7500 10000
1680 G03
•
•
•
•
•
•
•
TYPICAL PERFOR A CE CHARACTERISTICS
UW
5
LT1680
Error Amplifier Source Current
vs Temperature SS Output Current
vs Temperature
Average Current Limit Threshold
Sense Voltage vs Common Mode
Voltage
TEMPERATURE (°C)
–50
ERROR AMPLIFIER SOURCE CURRENT (µA)
350
325
300
275
250
225
200 25 75
1680 G10
–25 0 50 100 125
TEMPERATURE (°C)
–50
SS OUTPUT CURRENT (µA)
9
8
7
625 75
1680 G11
–25 0 50 100 125
RUN/SHDN Rising Threshold
vs Temperature
TEMPERATURE (°C)
–50
RUN/SHDN RISING THRESHOLD (V)
1.26
1.25
1.24
1.23
1.22
1.21
1.20 25 75
1680 G12
–25 0 50 100 125
RUN/SHDN Threshold Hysteresis
vs Temperature
TEMPERATURE (°C)
–50
RUN/SHDN THRESHOLD HYSTERESIS (mV)
26
25
24
23
22
21
20 25 75
1680 G13
–25 0 50 100 125
V
SENSE(CM)
(V)
0
V
SENSE
(mV)
45 60
1680 G14
123
160
150
140
130
120
110
100
90
80
UPPER LIMIT
FULL OPERATING
TEMPERATURE RANGE
TYPICAL
LOWER LIMIT
UVLO Thresholds vs Temperature
TEMPERATURE (°C)
–50
V
12VIN
(V)
100
1680 G15
050
10.00
9.75
9.50
9.25
9.00
8.75
8.50
8.25
8.00 –25 25 75 125
RISING
FALLING
Sense Amplifier Input Bias
Current (Source) vs Temperature RUN/SHDN Input Current
vs Pin Voltage
TEMPERATURE (°C)
–50
I
B(SOURCE)
(µA)
100
1680 G16
050
1200
1100
1000
900
800
700
600
500
400 –25 25 75 125
V
CMSENSE
= 0V
Sense Amplifier Input Bias
Current (Sink) vs Temperature
TEMPERATURE (°C)
–50
I
B(SINK)
(µA)
60
55
50
45
40
35
30 25 75
1680 G17
–25 0 50 100 125
V
CMSENSE
= 10V
RUN/SHDN PIN VOLTAGE (V)
0
RUN/SHDN INPUT CURRENT (nA )
2.0
1680 G18
0.5 1.0 1.5(1.25)
800
700
600
500
400
300
200
100
0
..................................................................
TYPICAL
UPPER
LIMIT
FULL OPERATING
TEMPERATURE
RANGE
LOWER
LIMIT
TYPICAL PERFOR A CE CHARACTERISTICS
UW
6
LT1680
RUN/SHDN Input Current
vs Pin Voltage Operating Frequency
(Normalized) vs Temperature
Maximum Duty Cycle vs RCT
R
CT
(kΩ)
1246
MAXIMUM DUTY CYCLE (%)
100
90
80
70
60
50
40
30
20
10
010 20 40 60 100
1680 G20
I
DISCHG
= 2.1mA
I
DISCHG
= 2.75mA
FULL OPERATING
TEMPERATURE
RANGE
TEMPERATURE (°C)
–50
OPERATING FREQUENCY (NORMALIZED)
1.01
1.00
0.99
0.98 25 75
1680 G21
–25 0 50 100 125
RUN/SHDN PIN VOLTAGE (V)
0
RUN/SHDN INPUT CURRENT (µA)
600
450
300
150
02468
1680 G19
10 12
UPPER
LIMIT
LOWER
LIMIT
TYPICAL
FULL OPERATING
TEMPERATURE
RANGE
SL/ADJ (Pin 1): Slope Compensation Adjustment. Allows
increased slope compensation for certain high duty cycle
applications. Resistive loading of this pin increases effec-
tive slope compensation. A resistor divider from the 5V
REF
pin can tailor the onset of additional slope compensation
to specific regions in each switch cycle. Pin can be floated
or connected to 5V
REF
if no additional slope compensation
is required. (See Applications Information section for
slope compensation details.)
C
T
(Pin 2): Oscillator Timing Pin. Connect a capacitor
(C
CT
) to ground and a pull-up resistor (R
CT
) to the 5V
REF
supply. Typical values are C
CT
= 1000pF and 10k ≤ R
CT
≤
30k.
I
AVG
(Pin 3):
Average Current Limit Integration. The
frequency response characteristic is set using 50kΩ
output impedance of this pin and external capacitor. The
external capacitor is typically connected from the I
AVG
pin
to the V
C
pin, but can also be connected from the I
AVG
pin
to ground. Connecting the capacitor from the I
AVG
pin to
the V
C
pin uses an internal gain block to form an active
integrator, minimizing the capacitance required for stable
operation. A typical value for this integration capacitor is
220pF from I
AVG
to V
C
. Shorting this pin to SGND will
disable the average current limit function.
SS (Pin 4):
Soft Start. Generates ramping threshold for
regulator current limit during start-up and after UVLO
events by sourcing about 8µA into an external capacitor.
V
C
(Pin 5): Error Amplifier Output. RC load creates domi-
nant compensation in power supply regulation feedback
loop to provide optimum transient response. (See Appli-
cations Information section for compensation details.)
SGND (Pin 6): Small-Signal Ground. Connect to negative
terminal of C
OUT
.
V
FB
(Pin 7): Error Amplifier Inverting Input. Used as
voltage feedback input node for regulator loop. Pin sources
about 0.5µA DC bias current to protect from an open
feedback path condition.
V
REF
(Pin 8):
Bandgap Generated Voltage Reference
Decoupling. Connect a capacitor to signal ground. (Typi-
cal capacitor value ≈0.1µF.)
SENSE
+
(Pin 9): Current Sense Amplifier Inverting Input.
Connect to most positive (DC) terminal of current sense
resistor.
SENSE
–
(Pin 10): Current Sense Amplifier Noninverting
Input. Connect to most negative (DC) terminal of current
sense resistor.
TYPICAL PERFOR A CE CHARACTERISTICS
UW
UU
U
PI FU CTIO S
7
LT1680
RUN/SHDN (Pin 11): Precision Referenced Shutdown.
Can be used as logic level input for shutdown control or
as an analog monitor for input supply undervoltage
protection, etc. IC is enabled when RUN/SHDN pin rising
edge exceeds 1.25V. 25mV of hysteresis helps assure
stable mode switching. All internal functions are disabled
in shutdown mode. If this function is not desired, connect
RUN/SHDN to 12VIN (typically through a 100k resistor).
See Applications Information.
PGND (Pin 12): Power Ground. References the output
switch and internal driver control circuits. Connect with
low impedance trace to V
IN
decoupling capacitor negative
(ground) terminal.
GATE (Pin 13): Driver Output. Connect to gate of external
power FET switch.
12V
IN
(Pin 14): 12V Power Supply Input. Bypass with at
least 1µF to PGND.
SYNC (Pin 15):
Oscillator Synchronization Pin with
TTL-Level Compatible Input. Input drives internal rising
edge triggered one shot; SYNC signal on/off times should
be ≥1µs (10% to 90% duty cycle at 100kHz). Does not
contain internal pull-up. Connect to SGND if not used.
5V
REF
(Pin 16): 5V Reference Output. Allows connection
of external loads up to 10mA DC. Reference is not available
during shutdown. Typically bypassed with at least 1µF
capacitor to SGND.
REFERENCE ONE SHOT
–
1.25V
Q
UVLO
CIRCUIT
SR
5V
REF
5V
SYNC GATE
SENSE
+
SENSE
–
I
AVG
V
IN
V
OUT
R
SENSE
12V
IN
PGND
SGND
OSC
C
T
R
CT
C
CT
V
C
SL/ADJ
V
REF
V
FB
–
+
–
+
IC1
–
+
2.5V
1680 BD
–
+
EA
0.5µA
CURRENT
SENSE
AMPLIFIER
SS
1.25V
CIRCUIT
ENABLE
RUN/SHDN
+
RUN SHDN
8µA
SOFT START
12V
–
+
×15
V
OUT
UU
U
PI FU CTIO S
BLOCK DIAGRA
W
8
LT1680
Basic Control Loop
The LT1680 uses a constant frequency, current mode
architecture. The timing of the IC is provided through an
internal oscillator circuit that can be synchronized to an
external clock and is programmable to operate at frequen-
cies up to 200kHz. The oscillator creates a modified
sawtooth wave at its timing node (C
T
) with a slow charge,
rapid discharge characteristic.
During typical boost converter operation, the MOSFET
switch is enabled at the start of each oscillator cycle. The
switch stays enabled until the current through the switched
inductor, sensed via the voltage across a series sense
resistor (R
SENSE
), is sufficient to trip the current com-
parator (IC1) and reset the RS latch. When the switch is
disabled, the inductor current is redirected to the supply
output. If the current comparator threshold is not reached
throughout the entire oscillator charge period, the RS
latch is bypassed and the main switch is disabled during
the oscillator discharge time. This “minimum off time”
protects the switch, and is typically about 1µs.
The current comparator trip threshold is set on the V
C
pin,
which is the output of a transconductance amplifier, or
error amplifier (EA). The error amplifier integrates the
difference between a feedback voltage (on the V
FB
pin) and
an internal bandgap generated reference voltage of 1.25V,
forming a signal that represents required load current. If
the supplied current is insufficient for a given load, the
output will droop, thus reducing the feedback voltage. The
error amplifier responds by forcing current out of the V
C
pin, increasing the current comparator threshold. Thus,
the circuit will servo until the provided current is equal to
the required load and the average output voltage is at the
value programmed by the feedback resistors.
Input Average Current Limit
The output of the sense amplifier is monitored by a single
pole integrator comprised of an external capacitor on the
I
AVG
pin and an output impedance of approximately 50kΩ.
If this averaged value signal exceeds a level corresponding
to 120mV across the external sense resistor, the current
comparator threshold is clamped and cannot continue to
rise in response to the error amplifier. Thus, if average
input current requirements exceed 120mV/R
SENSE
, the
supply will current limit and the output voltage will fall out
of regulation. The average current limit circuit monitors
the sense amplifier output without slope compensation or
ripple current contributions. Therefore, the average input
current limit threshold is unaffected by duty cycle.
Undervoltage Lockout
The LT1680 employs an undervoltage lockout circuit
(UVLO) that monitors the 12V
IN
supply rail. This circuit
disables the output drive capability of the LT1680 if the
12V supply drops below 9V. Unstable mode switching is
prevented through 350mV of UVLO threshold hysteresis.
Shutdown
The LT1680 can be put into low current shutdown by
pulling the RUN/SHDN pin low, disabling all circuit func-
tions. The shutdown threshold is a bandgap referred
voltage of 1.25V typical. Use of a precision threshold on
the shutdown circuit enables use of this pin for under-
voltage protection of the V
IN
supply and/or power supply
sequencing.
Soft Start
The LT1680 incorporates a soft start function that oper-
ates by slowly increasing current limit. This limit is
controlled by internally clamping the V
C
pin to a low
voltage that climbs with time as an external capacitor on
the SS pin is charged with about 8µA. This forces a
graceful climb of output current source capability, and
thus a graceful increase in output voltage until steady-
state regulation is achieved. The soft start timing capaci-
tor is clamped to ground during shutdown and during
undervoltage lockout, yielding a graceful output recovery
from either condition.
5V Internal Reference
Power for the oscillator timing elements and most other
internal LT1680 circuits is derived from an internal 5V
reference, accessible at the 5V
REF
pin. This supply pin
can be loaded with up to 10mA DC (20mA pulsed) for
convenient biasing of local elements such as control
logic, etc.
OPERATIO
U
9
LT1680
Slope Compensation
For duty cycles greater than 50%, slope compensation is
required to prevent current mode duty cycle instability in
the regulator control loop. The LT1680 employs internal
slope compensation that is adequate for most applica-
tions. However, if additional slope compensation is de-
sired, it is available through the SL/ADJ pin. Excessive
slope compensation will cause reduction in maximum
load current capability and is generally not desirable.
R
SENSE
Selection for Input Current Limit
R
SENSE
generates a voltage that is proportional to the
inductor current for use by the LT1680 current sense
amplifier. The value of R
SENSE
is based on the required
input current. The average current limit function has a
typical threshold of 120mV/R
SENSE
, or:
R
SENSE
= 120mV/I
LIMIT
Operation with V
SENSE
common mode voltage below 4.5V
may slightly degrade current limit accuracy. See Average
Current Limit Threshold Tolerance vs Common Mode
Voltage in the Typical Performance Characteristics sec-
tion for more information.
Output Voltage Programming
Output voltage is programmed through a resistor feed-
back network to the V
FB
pin (Pin 7) on the LT1680. This pin
is the inverting input of the error amplifier, which is
internally referenced to 1.25V. The divider is ratioed to
provide 1.25V at the V
FB
pin when the output is at its
desired value. Output voltage is thus set following the
relation:
V
OUT
= 1.25V(1 + R2/R1)
when an external resistor divider is connected to the
output as shown in Figure 1.
If high value feedback resistors are used, the input bias
current of the V
FB
pin (1µA maximum) could cause a slight
increase in output voltage. A Thevenin resistance at the
V
FB
pin of <5k is recommended.
Oscillator Components R
CT
and C
CT
The LT1680 oscillator creates a modified sawtooth at its
timing node (C
T
) with a slow charge, rapid discharge
characteristic. The discharge time (t
DISCH
) corresponds to
the minimum off time of the PWM controller. This limits
maximum duty cycle (DC
MAX
) to:
DC
MAX
= 1 – (t
DISCH
)(f
O
)
This relation corresponds to the minimum value of the
timing resistor (R
CT
), which can be determined according
to the following relation (R
CT
vs DC
MAX
graph appears in
the Typical Performance Characteristics section):
R
CT(MIN)
≈ [(0.8)(10
–3
)(1 – DC
MAX
)]
–1
Values for R
CT
> 15k yield maximum duty cycles above
90%. Given a timing resistor value, the value of the timing
capacitor (C
CT
) can then be determined for desired oper-
ating frequency (f
O
) using the relation:
Cf
RR
CT O
CT CT
≈
()()
()
()
+
()
()
()
1 100 10
185 175
2 5 10 3 375
9
3
/–
/. .
.–./
–
–
A plot of Operating Frequency vs R
CT
and C
CT
is shown in
Figure 2. Typical 100kHz operational values are C
CT
=
1000pF and R
CT
= 16.9k.
LT1680
V
OUT
V
FB
6
7
R1
R2
1680 F01
SGND
Figure 1. Programming LT1680 Output Voltage
OPERATIO
U
APPLICATIO S I FOR ATIO
WUUU
10
LT1680
capacitor C
SS
, the start up delay time to full available
average current will be:
t
SS
= (1.5)(10
5
)(C
SS
)
Shutdown Function—Input Undervoltage Detect
and Threshold Hysteresis
The LT1680 RUN/SHDN pin uses a bandgap generated
reference threshold of about 1.25V. This precision thresh-
old allows use of the RUN/SHDN pin for both logic-level
shutdown applications and analog monitoring applica-
tions such as power supply sequencing.
Because an LT1680 controlled converter is a power trans-
fer device, a voltage that is lower than expected on the
input supply could require currents that exceed the sourc-
ing capabilities of that supply, causing the system to lock-
up in an undervoltage state. Input supply start-up protection
can be achieved by enabling the RUN/SHDN pin using a
resistor divider from the input supply to ground. Setting
the divider output to 1.25V when the supply is almost fully
enabled prevents the LT1680 regulator from drawing large
currents until the input supply is able to supply the
required power.
If additional hysteresis is desired for the enable function,
an external feedback resistor can be used from the LT1680
regulator output. If connection to the regulator output is
not desired, the 5V
REF
internal supply pin can be used.
Figure 3 shows an input supply sequencing configuration
on a 24V input converter. This configuration yields an
enable condition of 90% V
IN
(~21.5V) with about 10%
threshold hysteresis.
The shutdown function can be disabled by connecting the
RUN/SHDN pin to the 12V
IN
rail. This pin is internally
Figure 3. Input Supply Sequencing Programming
TIMING RESISTOR (kΩ)
3 7 11 15 19 23 27 31 35 39 43 47
OSCILLATOR FREQUENCY (kHz)
200
180
160
140
120
100
80
60
40
1680 F02
C
CT
= 0.68nF
C
CT
= 1nF
C
CT
= 2.2nF
C
CT
= 1.5nF
Figure 2. Operating Frequency vs RCT, CCT
Average Current Limit
The average current limit function is implemented using
an external capacitor (C
AVG
) connected either from the
I
AVG
pin to the V
C
pin or from the I
AVG
pin to SGND. This
capacitor forms a single-pole integrator with the 50kΩ
output impedance of the I
AVG
pin. Precise integration
frequencies can be determined using a ground reference
integration capacitor using the relation:
f
–3dB
= (3.2)(10
–6
)/C
AVG
Connecting a capacitor from the I
AVG
pin to the V
C
pin uses
an internal gain block to form an active integrator circuit,
minimizing the required capacitance for stable operation.
A typical value for this integration capacitor is 220pF from
I
AVG
to V
C
.
Shorting the I
AVG
pin to SGND will disable the average
current limit function.
Soft Start Programming
The current control pin (V
C
) limits sensed inductor current
to zero at voltages less than a transistor V
BE
, to full average
current limit at V
C
= V
BE
+ 1.8V. This generates a 1.8V full
regulation range for average load current. An internal
voltage clamp forces the V
C
pin to a V
BE
– 100mV above
the SS pin voltage. This 100mV “dead zone” assures 0%
duty cycle operation at the start of the soft start cycle or
when the soft start pin is pulled to ground. Given the
typical soft start current of 8µA and a soft start timing
V
IN
24V
16
11
160k
390k
10k
1680 F03
5V
REF
RUN/SHDN
LT1680
APPLICATIO S I FOR ATIO
WUUU
11
LT1680
clamped to 2.5V through a 20k series input resistance and
will therefore draw 0.5mA when tied directly to 12V. This
additional current can be minimized by making the con-
nection through an external resistor (100k is typically used).
Oscillator Synchronization
The LT1680 oscillator generates a modified sawtooth
waveform at the C
T
pin between low and high thresholds
of 0.8V (vl) and 2.5V (vh) respectively. The oscillator can
be synchronized by driving a TTL level pulse into the SYNC
pin. This pin connects to a one shot circuit that reduces the
oscillator high threshold to 2V for about 200ns. The SYNC
input signal should have minimum on/off times of ≥1µs.
The inductor core type is determined by peak current and
efficiency requirements. The inductor core must with-
stand this peak current without saturating, and the series
winding resistance and core losses should be kept as
small as is practical to maximize conversion efficiency.
The LT1680 peak current threshold is 40% greater than
the average limit threshold. Slope compensation effects
reduce this margin as duty cycle increases. This margin
must be maintained to prevent peak current limit from
corrupting the programmed value for average current
limit. Programming the peak ripple current to less than
15% of the desired average current limit value will assure
proper operation of the average current limit feature
through 90% duty cycle (see Slope Compensation).
Slope Compensation
Current mode switching regulators that operate with a
duty cycle greater than 50% and have continuous inductor
current can exhibit duty cycle instability. While a regulator
will not be damaged and may even continue to function
acceptably during this type of subharmonic oscillation, an
irritating high-pitched squeal is usually produced.
The criterion for current mode duty cycle instability is
met when the increasing slope of the inductor ripple
current is less than the decreasing slope, which is the
case at duty cycles greater than 50%. This condition is
illustrated in Figure 5a. The inductor ripple current starts
at I
1
, the beginning of each oscillator switch cycle.
Current increases at a rate S1 until the current reaches
the control trip level I
2
. The controller servo loop then
disables the switch and inductor current begins to de-
crease at a rate S2. If the current switch point (I
2
) is
perturbed slightly and increased by ∆I, the cycle time
ends such that the minimum current point is increased by
a factor of 1 + (S2/S1) to start the next cycle. On each
successive cycle, this error is multiplied by a factor of S2/
S1. Therefore, if S2/S1 is ≥1, the system is unstable.
Subharmonic oscillations can be eliminated by augment-
ing the increasing ripple current slope (S1) in the control
loop. This is accomplished by adding an artificial ramp on
the inductor current waveform internal to the IC (with a
slope S
X
) as shown in Figure 5b. If the sum of the slopes
0.8V
1680 F04
2V
2.5V
(vl)
SYNC
V
CT
(vh)
FREE RUN SYNCHRONIZED
Figure 4. Free Run and Synchronized Oscillator
Waveforms (at CT Pin)
Inductor Selection
The inductor for an LT1680 converter is selected based on
output power, operating frequency and efficiency require-
ments. Generally, the selection of inductor value can be
reduced to desired maximum ripple current in the inductor
(∆I). For a boost converter, the minimum inductor value
for a given operating ripple current can be determined
using the following relation:
LVV V
If V
MIN IN OUT IN
O OUT
=
()
()()( )
–
∆
Given an inductor value (L), the peak inductor current is
the sum of the average inductor current (I
AVG
) and half the
inductor ripple current (∆I), or:
II VV V
Lf V
PK AVG IN OUT IN
O OUT
=+
()
()()( )( )
–
2
APPLICATIO S I FOR ATIO
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12
LT1680
S1 + S
X
is greater than S2, this condition for subharmonic
oscillation no longer exists.
For boost topologies, the required additional current wave-
form slope, or “Slope Compensation,” follows the relation:
SSDC
DC
X≥
()( )
()
12 1
1
–
–
For duty cycles less than 50% (DC < 0.5), S
X
is negative and
is not required. For duty cycles greater than 50%, S
X
takes
on values dependent on S1 and duty cycle. S1 is simply V
IN
/
L. This leads to a minimum inductance requirement for a
given V
IN
, duty cycle and slope compensation (S
X
) of:
L
V
SDC
DC
MIN
IN
X
=
()
21
1
–
–
The LT1680 contains an internal slope compensation
ramp that has an equivalent current referred value of:
S = 0.084 f
R
XO
SENSE
Amp/s
where f
O
is oscillator frequency and R
SENSE
is the external
current sense resistor. This yields a minimum inductance
requirement of:
LVR DC
fDC
MIN IN SENSE
O
≥
()()()
()()
−
()
[]
21
0 084 1
–
.
A down side of slope compensation is that, since the IC
servo loop senses an increase in perceived inductor cur-
rent, the internal current limit functions are affected such
that the maximum current capability of a regulator is
reduced by the same amount as the effective current
referred slope compensation. The LT1680, however, uses
a current limit scheme that is independent of the slope
compensation effects (Average Current Limiting). This
provides operation at any duty cycle with no reduction in
current sourcing capability, provided ripple current peak
amplitude is less than 15% of the current limit value. For
example, if the converter is set up to average current limit
at 10A, as long as the peak inductor current is less than
11.5A, duty cycles up to 90% can be achieved without
compromising the average current limit value.
OSCILLATOR
PERIOD
TIME
0 0
5a 5b
∆IT1
I2
I1S1 S1S2 S2
S1 + SX
1680 F05
Figure 5. Inductor Current at DC > 50% and
Slope Compensation Adjusted Signal
APPLICATIO S I FOR ATIO
WUUU
Figure 6. Maximum Peak Ripple Current (Normalized)
vs Duty Cycle for Average Current Limit
DUTY CYCLE
0
1.10
MAXIMUM PEAK RIPPLE CURRENT (I
PK
/I
AVG
)
1.15
1.25
1.30
1.35
0.2 0.3 0.4 0.5 0.6 0.7 0.8
1680 F06
1.20
0.1 0.9
1.40
1.45
If an inductor smaller than the minimum required for
internal slope compensation (calculated above as L
MIN
) is
desired, additional slope compensation is necessary. The
LT1680 provides this capability through the SL/ADJ pin.
This feature is implemented by referencing this pin via a
resistor divider from the 5V
REF
pin to ground. The addi-
tional slope compensation will be affected at the point in
the oscillator waveform (at pin C
T
) corresponding to the
voltage set by the resistor divider. Additional slope com-
pensation can be calculated using the relation:
Sf
RR
XO
TH SENSE
=
()()
()( )
2500
Amp/s
where R
TH
is the Thevenin resistance of the resistor
divider. Actual compensation will actually be somewhat
greater due to internal curvature correction circuitry that
13
LT1680
Power MOSFET and Output Rectifying Diode Selection
LT1680 converter system parameters that dictate selec-
tion criteria for the switch MOSFET and output rectifying
diode include maximum load current (I
OUT
), inductor
average current (I
AVG
) and inductor ripple current (∆I),
and maximum input and output voltages.
The switch MOSFETs selected must have a maximum
operating
V
DSS
exceeding the maximum output voltage
(V
OUT
). V
GS
rated operating maximums must exceed the
12V
IN
supply voltage. Once voltage requirements have
been determined, switch conduction resistance (R
DS(ON)
)
can be determined based on allowable power dissipation.
In a typical LT1680 boost converter, the switch current is
equal to the inductor current, but is chopped according to
duty cycle (DC). The conduction loss (P
LOSS
) for a given
FET R
DS(ON)
can be calculated using the relation:
P
LOSS
≈ (DC)(R
DS(ON)
)(I
AVG2
+ [∆I
2
/12])
where I
AVG
= average inductor current and ∆I = peak-to-
peak inductor ripple current.
The output diode is often a major source of power loss in
switching regulators and selection of adequately rated
diodes is important. In a boost converter, when the output
voltage is significantly higher than the input voltage, the
peak diode current becomes much higher than average
imposes an exponential increase in the slope compensa-
tion waveform, further increasing the effective compen-
sation slope up to 20% for a given setting.
Design example:
V
IN
= 20V
V
OUT
= 80V (DC = 0.75)
R
SENSE
= 0.01Ω
f
O
= 100kHz
L = 20µH
The minimum inductor usable with no additional slope
compensation is:
LVH
MIN
≥
()
Ω
()()
()( )( )
=µ
20 0 01 1 5 1
0 084 100000 1 0 75 47 6
..–
.–.
.
Since L = 20µH is less than L
MIN
, additional slope
compensation is necessary. The total slope compensa-
tion required is:
S
V
H
X
≥µ
()
=
20
20 15 1
1075 210
6
.–
–. ()( )
Amp/s
Subtracting the internally generated slope compensation
and solving for the required effective resistance at SL/ADJ
yields:
Rf
Rf
k
EQ O
SENSE O
≤
()()
()
()
()()()
=
2500
2 10 0 084 21 5
6–. .
Setting the resistor divider reference voltage to 2V assures
that the additional compensation waveform will be en-
abled at a 75% duty cycle. As shown in Figure 7a, using
R
SL1
= 45k and R
SL2
= 30k sets the desired reference
voltage and has a R
TH
of 18k, which meets both design
requirements. Figure 7b shows the slope compensation
effective waveforms both with and without the SL/ADJ
external resistors.
Figure 7a. External Slope Compensation Resistors
16
1
R
SL1
45k
R
SL2
30k
1680 F07a
5V
REF
SL/ADJ
LT1680
Figure 7b. Slope Compensation Waveforms
APPLICATIO S I FOR ATIO
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14
LT1680
output currents and diode current ratings must be ob-
served with caution. The peak diode current is:
I
D(PEAK)
= I
AVG
+ ∆I/2
and the average power dissipation (P
D
) in the diode is:
P
D
= (I
OUT
)(V
f
)
where V
f
is the forward voltage of the diode at peak
current. The output diode must also be rated for maximum
reverse voltages exceeding V
OUT
.
C
IN
and C
OUT
Supply Decoupling Capacitor Selection
The large currents typical of LT1680 applications require
special consideration for the regulator input and output
supply decoupling capacitors.
Under normal steady state boost operation, output current
provided by the converter is a square wave of duty cycle V
IN
/
V
OUT
, the average value being equal to the required DC load
current (I
OUT
). The continuity of the load current is main-
tained by the output bypass capacitors. To prevent exces-
sive output voltage ripple and undue capacitor heating (and
associated catastrophic failure), low ESR output capacitors
sized for the maximum RMS current must be used. This
maximum capacitor RMS current follows the relation:
II
V
V
RMS OUT OUT
IN
≈
–
/
1
12
Capacitor ripple current ratings are often based on only 2000
hours (3 months) lifetime; it is advisable to derate either the
ESR or temperature rating of capacitors for increased MTBF.
The input bypass capacitors generally have less ripple
current than the output bypass capacitors as the input
current in a boost converter is continuous. Input bypass
capacitor selection can be made using ripple current
ratings. Peak-to-peak ripple current is equal to the induc-
tor ripple current (∆I
L
).
Efficiency Considerations and Heat Dissipation
High output power applications create an inherent con-
cern regarding power dissipation in regulator compo-
nents. Although high efficiencies are achieved using the
LT1680, the power dissipated in the regulator climbs to
relatively high values when the load draws large amounts
of power. Even at 90% efficiency, a 500W application has
conversion loss of 55W.
I
2
R dissipation in the MOSFET switch, sense resistor and
inductor series resistance can generate substantial con-
version loss under high current conditions. Generally, the
dominant I
2
R loss is evidenced in the FET switch, which is
proportional to the steady-state duty cycle, or conduction
time of the switch. For example, in a 5V to 48V boost
converter, the duty cycle is:
DC = 1 – (V
IN
/V
OUT
)
DC = 1 – 5/48 ≈ 90%
The FET switch conducts inductor current for almost 90%
of the cycle time, and thus may require increased consid-
eration for dissipating I
2
R power.
Gate Drive Buffer
The LT1680 is designed to drive relatively large capacitive
loads. However, in certain applications, efficiency im-
provements can be realized by adding an external buffer
stage to drive the gate of the FET switch. When the switch
gate loads the driver output such that rise/fall times
exceed 100ns, buffers can sometimes result in efficiency
gains. Buffers can also reduce effects of back injection into
the gate driver output due to coupling of switch node
transitions through the switch FET C
MILLER
.
Optimizing Transient Response–
Compensation Component Values
The dominant compensation point for an LT1680 con-
verter is the V
C
pin (Pin 5), or error amplifier output. This
pin connects to an external series RC network, R
VC
and
C
VC
. The infinite permutations of input/output filtering,
capacitor ESR, input voltage, load current, etc. make for an
empirical method of optimizing loop response for a spe-
cific set of conditions.
Loop response can be observed by injecting a step change
in load current. This can be achieved by using a switchable
load. With the load switching, the transient response of the
output voltage can be observed with an oscilloscope.
Iterating through RC combinations will yield optimized
response. Refer to Application Note 19 in the
1990 Linear
Applications Handbook, Volume 1
for more information.
APPLICATIO S I FOR ATIO
WUUU
15
LT1680
Dimensions in inches (millimeters) unless otherwise noted.
N Package
16-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
PACKAGE DESCRIPTIO
SW Package
16-Lead Plastic Small Outline (Wide 0.300)
(LTC DWG # 05-08-1620)
N16 1098
0.255 ± 0.015*
(6.477 ± 0.381)
0.770*
(19.558)
MAX
16
12345678
910
11
12
13
14
15
0.020
(0.508)
MIN
0.125
(3.175)
MIN
0.130 ± 0.005
(3.302 ± 0.127)
0.065
(1.651)
TYP
0.045 – 0.065
(1.143 – 1.651)
0.018 ± 0.003
(0.457 ± 0.076)
0.100
(2.54)
BSC
0.009 – 0.015
(0.229 – 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.325 +0.035
–0.015
+0.889
–0.381
8.255
()
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
S16 (WIDE) 1098
NOTE 1
0.398 – 0.413*
(10.109 – 10.490)
16 15 14 13 12 11 10 9
12345678
0.394 – 0.419
(10.007 – 10.643)
0.037 – 0.045
(0.940 – 1.143)
0.004 – 0.012
(0.102 – 0.305)
0.093 – 0.104
(2.362 – 2.642)
0.050
(1.270)
BSC 0.014 – 0.019
(0.356 – 0.482)
TYP
0° – 8° TYP
NOTE 1
0.009 – 0.013
(0.229 – 0.330) 0.016 – 0.050
(0.406 – 1.270)
0.291 – 0.299**
(7.391 – 7.595)
× 45°
0.010 – 0.029
(0.254 – 0.737)
NOTE:
1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
16
LT1680
–48V to 5V 30W Forward Converter
220µF
35V
5V
REF
C
T
I
AVG
SS
SYNC
LT1680
SENSE
+
RUN/SHDN 7
115
IRF640
MBR0520LT1
MBR2045CT
MBR2045CT
13109
16
11
14
1µF
0.1µF
300pF
1.5nF
T1
L1
20µH
1nF 0.1µF
0.1µF
L1: PHILIPS EFD20-3F3-E63-S
(CORE SET, AI = 63nH/T
2
)
OUTPUT 18T BIFILAR 22AWG
BIAS 54T BIFILAR 32AWG
T1: COILTRONICS VP5-1200, 1:1:1:1:1:1
(SIX WINDINGS EACH 77µH)
*SANYO CV-GX
**SANYO OS-CON
ALL RESISTORS 1.4W, 1% UNLESS
INDICATED OTHERWISE
0.22µF
2.2nF
16k
20k
78.7k
20k
1M
•
BAV21
L1 7.5k
10Ω
24k
INPUT
COM
–48V
INPUT
24k
24k
4.75k 1k
1680 TA03
2N7000
2N3904
23 45 6128
12V
IN
SENSE
–
GATE
V
C
V
FB
SGND PGND
SL/ADJ
V
REF
+
•••
•••
1.5nF
Q7
2N5401
330µF**
6.3V
5V
6A
OUT
OUTPUT
COM
0.033µF
33Ω
4.22k
1.2k
33Ω
0.015Ω
1W
50Ω
1W
1µF
63V
1k
+
220µF*
35V
+
220µF*
35V
+
220µF*
35V
+
220µF*
35V
+
PART NUMBER DESCRIPTION COMMENTS
LT1268 7.5A, 150kHz Switching Regulator Integrated Switch Can Be Used in Isolated Flyback Mode
LT1270A 10A, 60kHz Switching Regulator Integrated Switch Can Be Used in Isolated Flyback Mode
LT1339 High Power Synchronous DC/DC Controller Operation to 60V, No Shoot-Through N-Channel Output Drivers
LT1370 500kHz, 6A Boost Switching Regulator Integrated Switch, Regulates Positive or Negative Outputs
LT1371 500kHz, 3A Boost Switching Regulator Integrated Switch, Regulates Positive or Negative Outputs
LT1619 Low Voltage Current Mode DWM Controller 8-lead MSOP, 1.9V ≤ V
IN
≤ 18V
LTC1700 No R
SENSE
TM Synchronous Current Mode Step-Up 95% Efficient, 0.9V ≤ V
IN
≤ 5V, 550kHz
DC/DC Controller
LT1738 Ultralow Noise DC/DC Boost Controller Greatly Reduced Conducted and Radiated EMI, N-Channel MOSFET Driver,
20kHz to 250kHz Oscillator Frequency
LTC3401/LTC3402 1A/2A 3MHz Micropower Synchronous Boost Converter 10-Lead MSOP, 0.5V ≤ V
IN
≤ 5V
No R
SENSE
is a trademark of Linear Technology Corporation.
1680af LT/TP 0301 REV A 2K • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1997
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
(408) 432-1900
FAX: (408) 434-0507
●
TELEX: 499-3977
●
www.linear-tech.com
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U
TYPICAL APPLICATIO