LM2705MF-ADJ/NOPB - Texas Instruments

510 kŸ

33 kŸ

GND

VIN

VIN = Li-Ion

CIN COUT

LM2705

68 PH20 V

6 mA

4.7 PF1 PF

SHDN

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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

LM2705

SNVS191F –NOVEMBER 2002–REVISED OCTOBER 2016

LM2705 Micropower Step-Up DC-DC Converter With 150-mA Peak Current Limit

1 Features

1• 2.2-V to 7-V Input Range

• 150-mA, 0.7-ΩInternal Switch

• Adjustable Output Voltage up to 20 V

• Input Undervoltage Lockout

• 0.01-µA Shutdown Current

• Uses Small Surface-Mount Components

• Small 5-Pin SOT-23 Package

2 Applications

• LCD Bias Supplies

• White-LED Backlighting

• Handheld Devices

• Digital Cameras

• Portable Applications

3 Description

The LM2705 is a micropower step-up DC-DC

converter in a small 5-pin SOT-23 package. A

current-limited, fixed-off-time control scheme

conserves operating current, which results in high

efficiency over a wide range of load conditions. The

21-V switch allows for output voltages as high as

20 V. The low 400-ns off-time permits the use of tiny,

low-profile inductors and capacitors to minimize

footprint and cost in space-conscious portable

applications. The LM2705 is ideal for LCD panels

requiring low current and high efficiency as well as

white-LED applications for cellular phone back-

lighting. The LM2705 device can drive up to 3 white

LEDs from a single Li-Ion battery. The low peak-

inductor current of the LM2705 makes it ideal for USB

applications.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)

LM2705 SOT-23 (5) 2.90 mm × 1.60 mm

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

space

Typical 20-V Application

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Table of Contents

1 Features.................................................................. 1

2 Applications ........................................................... 1

3 Description............................................................. 1

4 Revision History..................................................... 2

5 Pin Configuration and Functions......................... 3

6 Specifications......................................................... 4

6.1 Absolute Maximum Ratings ...................................... 4

6.2 ESD Ratings.............................................................. 4

6.3 Recommended Operating Conditions....................... 4

6.4 Thermal Information.................................................. 4

6.5 Electrical Characteristics........................................... 5

6.6 Typical Characteristics.............................................. 6

7 Detailed Description.............................................. 8

7.1 Overview................................................................... 8

7.2 Functional Block Diagram......................................... 8

7.3 Feature Description................................................... 8

7.4 Device Functional Modes.......................................... 8

8 Application and Implementation .......................... 9

8.1 Application Information.............................................. 9

8.2 Typical Application ................................................... 9

8.3 Additional Applications............................................ 12

9 Power Supply Recommendations...................... 15

10 Layout................................................................... 15

10.1 Layout Guidelines ................................................. 15

10.2 Layout Example .................................................... 15

11 Device and Documentation Support................. 16

11.1 Device Support...................................................... 16

11.2 Receiving Notification of Documentation Updates 16

11.3 Community Resources.......................................... 16

11.4 Trademarks........................................................... 16

11.5 Electrostatic Discharge Caution............................ 16

11.6 Glossary................................................................ 16

12 Mechanical, Packaging, and Orderable

Information........................................................... 16

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision E (May 2013) to Revision F Page

• Added Device Information and Pin Configuration and Functions sections, ESD Ratings and Thermal Information

tables, Feature Description,Device Functional Modes,Application and Implementation,Power Supply

Recommendations,Layout,Device and Documentation Support, and Mechanical, Packaging, and Orderable

Information sections................................................................................................................................................................ 1

• Deleted pin definition list - added content to Pin Functions .................................................................................................. 3

• Changed RθJA value from "220°C/W" to "164.9°C/W" ........................................................................................................... 4

Changes from Revision D (May 2013) to Revision E Page

• Changed layout of National Semiconductor data sheet to TI format.................................................................................... 14

GND

VIN

SHDN

LM2705

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5 Pin Configuration and Functions

DBV Package

5-Pin SOT-23

Top View

Pin Functions

PIN TYPE DESCRIPTION

NO. NAME

1SW Input Power switch input. This is the drain of the internal NMOS power switch. Minimize the metal

trace area connected to this pin to minimize EMI.

2 GND — Ground - tie directly to ground plane.

3FB Input Output voltage feedback input — set the output voltage by selecting values for R1 and R2 using:

R1 = R2 × (VOUT / 1.237 V) –1

4SHDN Input Active low shutdown - drive this pin to > 1.1 V to enable the device. Drive this pin to < 0.3 V to

lace the device in a low-power shutdown.

5 VIN Input Analog and power input supply pin

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(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) If Military/Aerospace specified devices are required, contact the TI Sales Office/Distributors for availability and specifications.

(3) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal

resistance, RθJA, and the ambient temperature, TA. See Thermal Information for the thermal resistance. The maximum allowable power

dissipation at any ambient temperature is calculated using: PD(MAX) = (TJ(MAX) −TA) / RθJA. Exceeding the maximum allowable power

dissipation will cause excessive die temperature.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)

MIN MAX UNIT

VIN 7.5 V

SW voltage 21 V

FB voltage 2 V

SHDN voltage 7.5 V

Maximum junction temperature, TJ(3) 150 °C

Lead temperature Soldering (10 seconds) 300 °C

Vapor phase (60 seconds) 215 °C

Infrared (15 seconds) 220 °C

Storage temperature, Tstg –65 150 °C

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) ESD susceptibility using the machine model is 150 V for SW pin.

6.2 ESD Ratings VALUE UNIT

V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V

Machine model(2) ±200

(1) All limits specified at room temperature and at temperature extremes. All room temperature limits are 100% production tested or

specified through statistical analysis. All limits at temperature extremes are specified via correlation using standard statistical quality

control (SQC) methods. All limits are used to calculate average outgoing quality level (AOQL).

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT

Supply voltage 2.2 7 V

SW voltage, maximum 20.5 V

Junction temperature(1) –40 125 °C

(1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.

6.4 Thermal Information

THERMAL METRIC(1) LM2705

UNITDBV (SOT-23)

5 PINS

RθJA Junction-to-ambient thermal resistance 164.9 °C/W

RθJC(top) Junction-to-case (top) thermal resistance 116.8 °C/W

RθJB Junction-to-board thermal resistance 27.8 °C/W

ψJT Junction-to-top characterization parameter 13.6 °C/W

ψJB Junction-to-board characterization parameter 27.3 °C/W

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(1) All limits specified at room temperature and at temperature extremes. All room temperature limits are 100% production tested or

specified through statistical analysis. All limits at temperature extremes are specified via correlation using standard statistical quality

control (SQC) methods. all limits are used to calculate average outgoing quality level (AOQL).

(2) Typical numbers are at 25°C and represent the most likely norm.

(3) Feedback current flows into the pin.

6.5 Electrical Characteristics

Unless otherwise specified, specifications apply for TJ= 25°C and VIN = 2.2 V.

PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX

(1) UNIT

Device disabled FB = 1.3 V 40

µA

FB = 1.3 V, –40°C to 125°C 70

Device enabled FB = 1.2 V 235

FB = 1.2 V, –40°C to 125°C 300

Shutdown SHDN = 0 V 0.01 2.5

VFB Feedback trip point 1.237 V

–40°C to 125°C 1.189 1.269

ICL Switch current limit 150 mA

–40°C to 125°C 100 180

IBFB pin bias current FB = 1.23 V(3) 30 nA

FB = 1.23 V, –40°C to 125°C(3) 120

VIN Input voltage –40°C to 125°C 2.2 7 V

RDSON Switch RDSON 0.7 Ω

–40°C to 125°C 1.6

TOFF Switch off time 400 ns

ISD SHDN pin current SHDN = VIN, TJ= 25°C 0 80 nASHDN = VIN, TJ= 125°C 15

SHDN = GND 0

ILSwitch leakage current VSW = 20 V 0.05 5 µA

UVP Input undervoltage lockout ON/OFF threshold 1.8 V

VFB

hysteresis Feedback hysteresis 8 mV

SHDN

threshold

SHDN low 0.7

–40°C to 125°C 0.3

SHDN high 0.7

–40°C to 125°C 1.1

-40 -20 0 20 40 60 80 100 120

JUNCTION TEMPERATURE (°C)

1.20

1.21

1.22

1.23

1.24

1.25

FEEDBACK TRIP POINT (V)

FEEDBACK BIAS CURRENT (nA)

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6.6 Typical Characteristics

Figure 1. Enable Current vs VIN (Device Switching) Figure 2. Disable Current vs VIN (Device Not Switching)

Figure 3. SHDN Threshold vs VIN Figure 4. Switch Current Limit vs VIN

Figure 5. Switch RDSON vs VIN Figure 6. FB Trip Point and FB Pin Current vs Temperature

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Typical Characteristics (continued)

Figure 7. Output Voltage vs Load Current Figure 8. Off Time vs Temperature

1) Load: 0.5 mA to 5 mA to 0.5 mA, DC VOUT = 20 V

2) VOUT: 200 mV/div, AC VIN = 3 V

3. IL: 100 mA/div, DC T = 100 µs/div

Figure 9. Step Response

1) SHDN: 1 V/div, DC VIN = 3 V VOUT = 20 V

2) VOUT: 10 V/div, AC T = 100 µs/div RL= 3.9 kΩ

3. IL: 100 mA/div, DC

Figure 10. Start-Up and Shutdown

1. VSW: 20 V/div, DC VIN = 2.7 V VOUT = 20 V

2. Inductor Current: 100 mA/div, DC IOUT = 2.5 mA

3. VOUT, 200 mV/div, AC

Figure 11. Typical Switching Waveform

VOUT

50 NŸ

GND

SHDN

Current Sensing

Circuitry

Undervoltage

Lockout

400ns

One Shot

Adjust

Comp

50 NŸ

Q1Q2

10x

30 NŸ

140 NŸ

Driver

Logic

RF2

Enable

Comp

VOUT

COUT

VIN

CIN

Enable

RF1

VIN

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7 Detailed Description

7.1 Overview

The LM2705 is a small boost converter utilizing a constant off time architecture. The device can provide up to

20.5 V at the output with up to 150 mA of peak switch current.

7.2 Functional Block Diagram

7.3 Feature Description

The LM2705 device features a constant off-time control scheme. Operation can be best understood by referring

to Functional Block Diagram and Figure 11. Transistors Q1 and Q2 and resistors R3 and R4 of Functional Block

Diagram form a bandgap reference used to control the output voltage. When the voltage at the FB pin is less

than 1.237 V, the Enable Comp in Functional Block Diagram enables the device, and the NMOS switch is turned

on pulling the SW pin to ground. When the NMOS switch is on, current begins to flow through inductor L while

the load current is supplied by the output capacitor COUT. Once the current in the inductor reaches the current

limit, the CL comp trips, and the 400-ns one shot turns off the NMOS switch.The SW voltage then rises to the

output voltage plus a diode drop, and the inductor current begins to decrease as shown in Figure 11. During this

time the energy stored in the inductor is transferred to COUT and the load. After the 400-ns off-time the NMOS

switch is turned on, and energy is stored in the inductor again. This energy transfer from the inductor to the

output causes a stepping effect in the output ripple as shown in Figure 11.

This cycle is continued until the voltage at FB reaches 1.237 V. When FB reaches this voltage, the Enable Comp

disables the device, turning off the NMOS switch and reducing the IQof the device to 40 µA. The load current is

then supplied solely by COUT indicated by the gradually decreasing slope at the output as shown in Figure 11.

When the FB pin drops slightly below 1.237 V, the Enable Comp enables the device and begins the cycle

described previously.

7.4 Device Functional Modes

The SHDN pin can be used to turn off the LM2705 and reduce the IQto 0.01 µA. In shutdown mode the output

voltage is a diode drop lower than the input voltage.

VOUT - VIN(min) + VD

ICL

L = TOFF



510 kŸ

33 kŸ

GND

VIN

VIN = Li-Ion

CIN COUT

LM2705

68 PH20 V

6 mA

4.7 PF1 PF

SHDN

LM2705

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8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Application Information

The LM2705 is a 20-V boost designed for low power boost applications. Typical input voltage range makes this

ideal for standard single cell Li+ batteries or 2 to 4 series alkaline batteries.

8.2 Typical Application

Figure 12 shows a typical Li+ voltage range to 20-V application. The 68-µH inductor allows for a low ripple

current and high light-load efficiency.

Figure 12. Typical 20-V Application

8.2.1 Design Requirements

For typical DC-DC converter applications, use the parameters listed in Table 1.

Table 1. Design Parameters

DESIGN PARAMETER EXAMPLE VALUE

Input voltage 2.5 V to 4.2 V

Output voltage 12 V

Output current up to 8 mA

Inductor 33 µH

8.2.2 Detailed Design Procedure

8.2.2.1 Inductor Selection - Boost Regulator

The appropriate inductor for a given application is calculated using Equation 1:

where

• VDis the Schottky diode voltage

• ICL is the switch current limit found in the Typical Characteristics

L2 = 2 VOUT + VD

ICL TOFF



IPK = ICL + VIN(max)

L100 ns

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• TOFF is the switch off time (1)

When using this equation be sure to use the minimum input voltage for the application, such as for battery

powered applications. For the LM2705 constant-off time control scheme, the NMOS power switch is turned off

when the current limit is reached. There is approximately a 100-ns delay from the time the current limit is

reached in the NMOS power switch and when the internal logic actually turns off the switch. During this 100-ns

delay, the peak inductor current increases. This increase in inductor current demands a larger saturation current

rating for the inductor. This saturation current can be approximated by Equation 2:

(2)

Choosing inductors with low ESR decrease power losses and increase efficiency.

Take care when choosing an inductor. For applications that require an input voltage that approaches the output

voltage, such as when converting a Li-Ion battery voltage to 5 V, the 400-ns off time may not be enough time to

discharge the energy in the inductor and transfer the energy to the output capacitor and load. This can cause a

ramping effect in the inductor current waveform and an increased ripple on the output voltage. Using a smaller

inductor causes the IPK to increase and increases the output voltage ripple further.

For typical curves and evaluation purposes the DT1608C series inductors from Coilcraft were used. Other

acceptable inductors include, but are not limited to, the SLF6020T series from TDK, the NP05D series from Taiyo

Yuden, the CDRH4D18 series from Sumida, and the P1166 series from Pulse.

8.2.2.2 Inductor Selection - SEPIC Regulator

Equation 3 can be used to calculate the approximate inductor value for a SEPIC regulator:

(3)

The boost inductor, L1, can be smaller or larger but is generally chosen to be the same value as L2. See

Figure 23 and Figure 24 for typical SEPIC applications.

8.2.2.3 Diode Selection

To maintain high efficiency, the average current rating of the Schottky diode should be larger than the peak

inductor current, IPK. Schottky diodes with a low forward drop and fast switching speeds are ideal for increasing

efficiency in portable applications. Choose a reverse breakdown of the Schottky diode larger than the output

voltage.

8.2.2.4 Capacitor Selection

Choose low equivalent series resistance (ESR) capacitors for the output to minimize output voltage ripple.

Multilayer ceramic capacitors are the best choice. For most applications, a 1-µF ceramic capacitor is sufficient.

For some applications a reduction in output voltage ripple can be achieved by increasing the output capacitor.

Output voltage ripple can further be reduced by adding a 4.7-pF feed-forward capacitor in the feedback network

placed in parallel with RF1 (see Functional Block Diagram).

Local bypassing for the input is needed on the LM2705. Multilayer ceramic capacitors are a good choice for this

as well. A 4.7-µF capacitor is sufficient for most applications. For additional bypassing, a 100-nF ceramic

capacitor can be used to shunt high frequency ripple on the input.

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8.2.3 Application Curves

Figure 13. Efficiency vs Load Current Figure 14. Efficiency vs Load Current

Figure 15. Output Ripple Voltage

Copt, Ropt Included Figure 16. Output Ripple Voltage

Copt, Ropt Excluded

Figure 17. Two White-LED Efficiency Figure 18. Three White-LED Efficiency

VIN

2.5 V - 4.2 V

82 Ÿ

GND

VIN

SHDN

>1.1 V

0 V

Ceramic

CIN

4.7 PF

Ceramic

COUT

1 PF

33 PH

LM2705

VIN

2.5V-4.2V

GND

VIN

SHDN

>1.1 V

0 V

Ceramic

LM2705

33 PH

COUT

1 PF

CIN

4.7 PF

Ceramic

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8.3 Additional Applications

Figure 19. Two White-LED Application

Figure 20. Three White-LED Application

GND

SWVIN

SHDN

VIN

5 V

33 µH D

COUT

1 µF

12 V

18 mA

LM2705

240 NŸ

27 NŸ

CIN

4.7 µF

GND

SWVIN

SHDN

VIN

2.5 V ± 4.2 V L

33 µH D

COUT

1 µF

12 V

8 mA

LM2705

5R1

240 NŸ

27 NŸ

CIN

4.7 µF

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Additional Applications (continued)

Figure 21. Li-Ion 12-V Application

Figure 22. 5-V to 12-V Application

GND

SWVIN

SHDN

VIN

2.5 V ± 7 V

33 µH D

CIN

4.7 µF COUT

10 µF

5 V

20 mA

1 0Ÿ

330 NŸ

LM2705

5L2

CSEPIC

1 µF

33 µH

GND

SWVIN

SHDN

VIN

2.5 V - 5.5 V

22 µH D

CIN

4.7 µF COUT

10 µF

3.3 V

30 mA

180 NŸ

110 NŸ

LM2705

5L2

CSEPIC

1 µF

22 µH

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Additional Applications (continued)

Figure 23. 3.3-V SEPIC Application

Figure 24. 5-V SEPIC Application

GND

VIN

SHDN

COUT

Schottky

CIN

R1 R2

LM2705

Inductor

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9 Power Supply Recommendations

The LM2705 is designed to operate from an input voltage supply range from 2.2 V to 7 V. This input supply must

be well regulated and capable to supply the required input current. If the input supply is located far from the

LM2705, additional bulk capacitance may be required in addition to the ceramic bypass capacitors.

10 Layout

10.1 Layout Guidelines

The input bypass capacitor CIN, as shown in Figure 25, must be placed close to the device. This reduces copper

trace resistance, which effects input voltage ripple of the LM2705 device. For additional input voltage filtering, a

100-nF bypass capacitor can be placed in parallel with CIN to shunt any high frequency noise to ground. The

output capacitor, COUT, must also be placed close to the device. Any copper trace connections for the COUT

capacitor can increase the series resistance, which directly effects output voltage ripple. Keep the feedback

network, resistors R1 and R2, close to the FB pin to minimize copper trace connections that can inject noise into

the system. The ground connection for the feedback resistor network must connect directly to an analog ground

plane. Tie the analog ground plane directly to the GND pin. If no analog ground plane is available, the ground

connection for the feedback network must tie directly to the GND pin. Minimize trace connections made to the

inductor and Schottky diode to reduce power dissipation and increase overall efficiency.

10.2 Layout Example

Figure 25. LM2705 Layout Example

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11 Device and Documentation Support

11.1 Device Support

11.1.1 Third-Party Products Disclaimer

TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT

CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES

OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER

ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.

11.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper

right corner, click on Alert me to register and receive a weekly digest of any product information that has

changed. For change details, review the revision history included in any revised document.

11.3 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective

contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of

Use.

TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration

among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help

solve problems with fellow engineers.

Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and

contact information for technical support.

11.4 Trademarks

E2E is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

11.5 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

11.6 Glossary

SLYZ022 —TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

PACKAGE OPTION ADDENDUM

www.ti.com 23-Aug-2017

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

LM2705MF-ADJ NRND SOT-23 DBV 5 TBD Call TI Call TI -40 to 85 S59B

LM2705MF-ADJ/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 S59B

LM2705MFX-ADJ/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS

& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 S59B

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish

value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

PACKAGE OPTION ADDENDUM

www.ti.com 23-Aug-2017

Addendum-Page 2

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

LM2705MF-ADJ/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

LM2705MFX-ADJ/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3

PACKAGE MATERIALS INFORMATION

www.ti.com 24-Aug-2017

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

LM2705MF-ADJ/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0

LM2705MFX-ADJ/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0

PACKAGE MATERIALS INFORMATION

www.ti.com 24-Aug-2017

Pack Materials-Page 2

www.ti.com

PACKAGE OUTLINE

TYP

0.22

0.08

0.25

3.0

2.6

2X 0.95

1.9

1.45 MAX

TYP

0.15

0.00

5X 0.5

0.3

TYP

0.6

0.3

TYP

1.9

3.05

2.75

1.75

1.45

(1.1)

SOT-23 - 1.45 mm max heightDBV0005A

SMALL OUTLINE TRANSISTOR

4214839/C 04/2017

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. Refernce JEDEC MO-178.

0.2 C A B

INDEX AREA

PIN 1

GAGE PLANE

SEATING PLANE

0.1 C

SCALE 4.000

www.ti.com

EXAMPLE BOARD LAYOUT

0.07 MAX

ARROUND 0.07 MIN

ARROUND

5X (1.1)

5X (0.6)

(2.6)

(1.9)

2X (0.95)

(R0.05) TYP

4214839/C 04/2017

SOT-23 - 1.45 mm max heightDBV0005A

SMALL OUTLINE TRANSISTOR

NOTES: (continued)

4. Publication IPC-7351 may have alternate designs.

5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

SYMM

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:15X

PKG

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

DEFINED

EXPOSED METAL

METAL

SOLDER MASK

OPENING

NON SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

EXPOSED METAL

www.ti.com

EXAMPLE STENCIL DESIGN

(2.6)

(1.9)

2X(0.95)

5X (1.1)

5X (0.6)

(R0.05) TYP

SOT-23 - 1.45 mm max heightDBV0005A

SMALL OUTLINE TRANSISTOR

4214839/C 04/2017

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

7. Board assembly site may have different recommendations for stencil design.

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

SCALE:15X

SYMM

PKG

www.ti.com

PACKAGE OUTLINE

TYP

0.22

0.08

0.25

3.0

2.6

2X 0.95

1.9

1.45 MAX

TYP

0.15

0.00

5X 0.5

0.3

TYP

0.6

0.3

TYP

1.9

3.05

2.75

1.75

1.45

(1.1)

SOT-23 - 1.45 mm max heightDBV0005A

SMALL OUTLINE TRANSISTOR

4214839/C 04/2017

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. Refernce JEDEC MO-178.

0.2 C A B

INDEX AREA

PIN 1

GAGE PLANE

SEATING PLANE

0.1 C

SCALE 4.000

www.ti.com

EXAMPLE BOARD LAYOUT

0.07 MAX

ARROUND 0.07 MIN

ARROUND

5X (1.1)

5X (0.6)

(2.6)

(1.9)

2X (0.95)

(R0.05) TYP

4214839/C 04/2017

SOT-23 - 1.45 mm max heightDBV0005A

SMALL OUTLINE TRANSISTOR

NOTES: (continued)

4. Publication IPC-7351 may have alternate designs.

5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

SYMM

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:15X

PKG

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

DEFINED

EXPOSED METAL

METAL

SOLDER MASK

OPENING

NON SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

EXPOSED METAL

www.ti.com

EXAMPLE STENCIL DESIGN

(2.6)

(1.9)

2X(0.95)

5X (1.1)

5X (0.6)

(R0.05) TYP

SOT-23 - 1.45 mm max heightDBV0005A

SMALL OUTLINE TRANSISTOR

4214839/C 04/2017

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

7. Board assembly site may have different recommendations for stencil design.

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

SCALE:15X

SYMM

PKG

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LM2705MF-ADJ LM2705MF-ADJ/NOPB LM2705MFX-ADJ LM2705MFX-ADJ/NOPB