JM38510/33301B2A - Texas Instruments High-Performance Analog

SN54F02, SN74F02

QUADRUPLE 2-INPUT POSITIVE-NOR GATES

SDFS036A – MARCH 1987 – REVISED OCTOBER 1993

2–1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

•Package Options Include Plastic

Small-Outline Packages, Ceramic Chip

Carriers, and Standard Plastic and Ceramic

300-mil DIPs

description

These devices contain four independent 2-input

NOR gates. They perform the Boolean functions

Y = A + B or Y = A • B in positive logic.

The SN54F02 is characterized for operation over

the full military temperature range of –55°C to

125°C. The SN74F02 is characterized for

operation from 0°C to 70°C.

FUNCTION TABLE

(each gate)

INPUTS OUTPUT

A B Y

H X L

XHL

LLH

logic symbol†

1A 3

1B 5

2A 6

2B 8

3A 9

3B 11

4A 12

≥1

†This symbol is in accordance with ANSI/IEEE Std 91-1984 and

IEC Publication 617-12.

logic diagram (positive logic)

1A 3

1B 5

2A 6

2B 8

3A 9

3B 11

4A 12

Pin numbers shown are for the D, J, and N packages.

SN54F02 ...J PACKAGE

SN74F02 ...D OR N PACKAGE

(TOP VIEW)

GND

VCC

SN54F02 . . . FK PACKAGE

(TOP VIEW)

3212019

910111213

3B V

GND

NC CC

NC – No internal connection

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

SN54F02, SN74F02

QUADRUPLE 2-INPUT POSITIVE-NOR GATES

SDFS036A – MARCH 1987 – REVISED OCTOBER 1993

2–2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†

Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, VI (see Note 1) –1.2 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input current range –30 mA to 5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range applied to any output in the high state –0.5 V to VCC

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Current into any output in the low state 40 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range: SN54F02 –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SN74F02 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.

NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

SN54F02 SN74F02

UNIT

MIN NOM MAX MIN NOM MAX

UNIT

VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V

VIH High-level input voltage 2 2 V

VIL Low-level input voltage 0.8 0.8 V

IIK Input clamp current –18 –18 mA

IOH High-level output current –1 –1 mA

IOL Low-level output current 20 20 mA

TAOperating free-air temperature –55 125 0 70 °C

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

SN54F02 SN74F02

UNIT

PARAMETER

TEST

CONDITIONS

MIN TYP‡MAX MIN TYP‡MAX

UNIT

VIK VCC = 4.5 V, II = –18 mA –1.2 –1.2 V

VOH

VCC = 4.5 V, IOH = – 1 mA 2.5 3.4 2.5 3.4

OH VCC = 4.75 V, IOH = – 1 mA 2.7

VOL VCC = 4.5 V, IOL = 20 mA 0.3 0.5 0.3 0.5 V

IIVCC = 5.5 V, VI = 7 V 0.1 0.1 mA

IIH VCC = 5.5 V, VI = 2.7 V 20 20 µA

IIL VCC = 5.5 V, VI = 0.5 V – 0.6 – 0.6 mA

IOS§VCC = 5.5 V, VO = 0 –60 –150 –60 –150 mA

ICCH VCC = 5.5 V, VI = 0 3.7 5.6 3.7 5.6 mA

ICCL VCC = 5.5 V, See Note 2 8.7 13 8.7 13 mA

‡All typical values are at VCC = 5 V, TA = 25°C.

§Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.

NOTE 2: ICCL is measured with one input at 4.5 V and all others grounded.

SN54F02, SN74F02

QUADRUPLE 2-INPUT POSITIVE-NOR GATES

SDFS036A – MARCH 1987 – REVISED OCTOBER 1993

2–3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

switching characteristics (see Note 3)

PARAMETER FROM

(

INPUT

)

(

OUTPUT

)

VCC = 5 V,

CL = 50 pF,

RL = 500 Ω,

TA = 25°C

VCC = 4.5 V to 5.5 V,

CL = 50 pF,

RL = 500Ω,

TA = MIN to MAX†UNIT

(INPUT)

(OUTPUT)

′F02 SN54F02 SN74F02

MIN TYP MAX MIN MAX MIN MAX

tPLH

AorB

1.7 4 5.5 1.7 7.5 1.7 6.5

tPHL

1 2.8 4.3 1 6.5 1 5.3

†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

NOTE 3: Load circuits and waveforms are shown in Section 1.

PACKAGE OPTION ADDENDUM

www.ti.com 25-Sep-2013

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

5962-9757801Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-

9757801Q2A

SNJ54F

02FK

5962-9757801QCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9757801QC

SNJ54F02J

5962-9757801QDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9757801QD

SNJ54F02W

JM38510/33301B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/

33301B2A

JM38510/33301BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/

33301BCA

JM38510/33301BDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/

33301BDA

M38510/33301B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/

33301B2A

M38510/33301BCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/

33301BCA

M38510/33301BDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/

33301BDA

SN54F02J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 SN54F02J

SN74F02D ACTIVE SOIC D 14 50 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F02

SN74F02DE4 ACTIVE SOIC D 14 50 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F02

SN74F02DG4 ACTIVE SOIC D 14 50 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F02

SN74F02DR ACTIVE SOIC D 14 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F02

SN74F02DRE4 ACTIVE SOIC D 14 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F02

PACKAGE OPTION ADDENDUM

www.ti.com 25-Sep-2013

Addendum-Page 2

Orderable Device Status

(1)

Package Type Package

Drawing Pins Package

Qty Eco Plan

(2)

Lead/Ball Finish MSL Peak Temp

(3)

Op Temp (°C) Device Marking

(4/5)

Samples

SN74F02DRG4 ACTIVE SOIC D 14 2500 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F02

SN74F02N ACTIVE PDIP N 14 25 Pb-Free

(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74F02N

SN74F02NE4 ACTIVE PDIP N 14 25 Pb-Free

(RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74F02N

SN74F02NSR ACTIVE SO NS 14 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74F02

SN74F02NSRE4 ACTIVE SO NS 14 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74F02

SN74F02NSRG4 ACTIVE SO NS 14 2000 Green (RoHS

& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74F02

SNJ54F02FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-

9757801Q2A

SNJ54F

02FK

SNJ54F02J ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9757801QC

SNJ54F02J

SNJ54F02W ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9757801QD

SNJ54F02W

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

PACKAGE OPTION ADDENDUM

www.ti.com 25-Sep-2013

Addendum-Page 3

(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF SN54F02, SN74F02 :

•Catalog: SN74F02

•Military: SN54F02

NOTE: Qualified Version Definitions:

•Catalog - TI's standard catalog product

•Military - QML certified for Military and Defense Applications

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

SN74F02DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1

SN74F02NSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 14-Jul-2012

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

SN74F02DR SOIC D 14 2500 367.0 367.0 38.0

SN74F02NSR SO NS 14 2000 367.0 367.0 38.0

PACKAGE MATERIALS INFORMATION

www.ti.com 14-Jul-2012

Pack Materials-Page 2

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