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P/N:PM1229 REV. 1.1, DEC. 24, 2009
FEATURES PIN DESCRIPTION
PIN CONFIGURATION
56 TSOP (Top View)
128M-BIT FLASH-COMPATIBLE MASK ROM
(TSOP)
MX23L12823A
ORDER INFORMATION
Part No. Speed Package Grade Remark
MX23L12823ATC-10G 100ns 56 pin TSOP Commercial Pb-free
MX23L12823ATC-12G 120ns 56 pin TSOP Commercial Pb-free
NC
A22
A15
A14
A13
A12
A11
A10
A9
A8
A19
A20
NC
NC
A21
NC
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
NC
NC
A16
BYTE#
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
V
CC
D11
D3
D10
D2
D9
D1
D8
D0
OE#
VSS
CE#
A0
NC
NC
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
• Bitorganization
-16Mx8(bytemode)
-8Mx16(wordmode)
• Fastaccesstime
-Randomaccess:100ns(max.)
-Pageaccess:25ns(max.)
• Pagesize
-8wordsperpage
• Current
-Operating:25mA
-Standby:15uA
• Supplyvoltage
- 2.7V ~ 3.6V
• Package
-56pinTSOP(14mmx20mm),Pb-free,RoHS
-packagepinout(readonly)compatibleto 
S29GL128N's
• Temperature
- 0°C ~ 70°C
• Process
-0.18um
Symbol Pin Function
A0~A22 AddressInputs
D0~D14 DataOutputs
D15/A-1 D15(WordMode)/
LSBAddress(ByteMode)
CE# ChipEnableInput
OE# OutputEnableInput
BYTE# Word/ByteModeSelection
VCC PowerSupplyPin
VSS GroundPin
NC NoConnection
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P/N:PM1229 REV. 1.1, DEC. 24, 2009
MX23L12823A
Item Symbol Ratings
VoltageonanyPinRelativetoVSS VIN -0.3Vto3.9V
AmbientOperatingTemperature Topr 0°Cto70°C
StorageTemperature Tstg -65°Cto125°C
Item Symbol MIN. MAX. Conditions
OutputHighVoltage VOH 2.4V - IOH=-400uA
OutputLowVoltage VOL - 0.4V IOL=1.6mA
InputHighVoltage VIH 0.7xVCC VCC+0.3
InputLowVoltage VIL -0.3V 0.8V
InputLeakageCurrent ILI -5uA 0V, VCC
OutputLeakageCurrent ILO -5uA 0V, VCC
OperatingCurrent ICC - 25mA f=5MHz,CE#=VIL,OE#=VIH
alloutputopen
StandbyCurrent(CMOS) ISTB -15uA CE#>VCC-0.2V
InputCapacitance CIN -10pF Ta=25°C,f=1MHZ
OutputCapacitance COUT - 10pF Ta=25°C,f=1MHZ
Note:
1.Outputhigh-impedancedelay(tHZ)ismeasuredfromOE#orCE#goinghigh,andthisparameterguaranteed
bydesignoverthefullvoltageandtemperatureoperatingrange-nottested.
2.OperatingcurrentismeasuredunderNon-ReturntoZero(NRZ)testpattern.
MODE SELECTION
CE# OE# Byte# D15/A-1 D0~D7 D8~D15 Mode Power
HXXXHighZ HighZ -Stand-by
LHX X HighZ HighZ -Active
L L H Output D0~D7 D8~D15 Word Active
LLLInput D0~D7 HighZ Byte Active
Item Symbol 23L12823A-10 23L12823A-12
MIN. MAX. MIN. MAX.
ReadCycleTime tRC 100ns - 120ns -
AddressAccessTime tAA - 100ns - 120ns
Chip Enable Access Time tCE - 100ns - 120ns
PageAccessTime tPA - 25ns - 25ns
OutputEnableTime tOE - 25ns - 25ns
OutputHoldAfterAddress tOH 0ns - 0ns -
OutputHighZDelay tHZ - 20ns - 20ns
DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 2.7V~3.6V)
AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 2.7V~3.6V)
ABSOLUTE MAXIMUM RATINGS
Note:
1.Minimumvoltagemayundershootto-2Vduringtransitionandforlessthan20nsduringtransitions.
2.MaximumvoltagemayovershoottoVcc+2Vduringtransitionandforlessthan20nsduringtransitions.
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P/N:PM1229 REV. 1.1, DEC. 24, 2009
MX23L12823A
AC Test Conditions
TIMING DIAGRAM
RANDOM READ
PAGE READ
A3-A22
(A-1),A0,A1,A2
DATA
VALID ADD
VALID
1'st ADD 2'nd ADD
tPA
tAA
3'rd ADD
VALID VALID
tCE
tAA tOH tHZ
ADD ADD ADD
ADD
CE#
OE#
DATA
VALID VALID VALID
tRC
tOE
Note:Outputloadingisnotexistingintestloadboard.Active
loadingisusedundersoftwareprogrammingcontrol.Outputloading
capacitanceincludesloadboard'sandallstraycapacitance.
InputPulseLevels 0.4V~ 2.4V
InputRiseandFallTimes 5ns
InputTimingLevel 1.5V
OutputTimingLevel 1.5V
OutputLoad SeetheFigure
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P/N:PM1229 REV. 1.1, DEC. 24, 2009
MX23L12823A
PACKAGE INFORMATION
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P/N:PM1229 REV. 1.1, DEC. 24, 2009
MX23L12823A
REVISION HISTORY
Revision Description Page Date
1.0 1.Removed"Preliminary" P1 DEC/23/2008
1.1 1.AddednoteofABSOLUTEMAXIMUMRATINGSforundershoot& P2 DEC/24/2009
overshoot
MX23L12823A
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