CLC420 High Speed, Voltage Feedback Op Amp General Description Applications The CLC420 is an operational amplifier designed for applications requiring matched inputs, integration or transimpedance amplification. Utilizing voltage feedback architecture, the CLC420 offers a 300MHz bandwidth, a 1100V/s slew rate and a 4mA supply current (power consumption of 40mW, 5V supplies). Applications such as differential amplifiers will benefit from 70dB common mode rejection ratio and an input offset current of 0.2A. With its unity-gain stability, 2pA/ current noise and 3A of input bias current, the CLC420 is designed to meet the needs of filter applications and log amplifiers. The low input offset current and current noise, combined with a settling time of 18ns to 0.01% make the CLC420 ideal for D/A converters, pin diode receivers and photo multipliers amplifiers. All applications will find 70dB power supply rejection ratio attractive. n n n n n n Active filters/integrators Differential amplifiers Pin diode receivers Log amplifiers D/A converters Photo multiplier amplifiers Non-Inverting Frequency Response Features n n n n n n n 300MHz small signal bandwidth 1100V/s slew rate Unity-gain stability Low distortion, -60dBc at 20MHz 0.01% settling in 18ns 0.2A input offset current 2pA current noise DS012752-19 Connection Diagram DS012752-18 Pinout DIP & SOIC DS012752-20 2nd and 3rd Harmonic Distortion (c) 2001 National Semiconductor Corporation DS012752 www.national.com CLC420 High Speed, Voltage Feedback Op Amp February 2001 CLC420 Ordering Information Package Temperature Range Industrial Part Number Package Marking 8-pin plastic DIP -40C to +85C CLC420AJP CLC420AJP N08E 8-pin plastic SOIC -40C to +85C CLC420AJE CLC420AJE M08A CLC420AJE-TR13 CLC420AJE www.national.com 2 NSC Drawing Differential Input Voltage Junction Temperature Operating Temperature Range Storage Temperature Range Lead Solder Duration (+300C) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) IOUT (is short circuit protected to ground, but maximum reliability will be maintained if IOUT does not exceed 70mA, except A8D, B8D which should not exceed 35mA over the military temperature range).. Common Mode Input Voltage 7V 70mA 10V +150C -40C to +85C -65C to +150C 10 sec Operating Ratings Thermal Resistance Package MDIP SOIC VCC (JC) 65C/W 60C/W (JA) 120C/W 140C/W Electrical Characteristics AV = +1, VCC = 5V, RL = 100, Rf = 0; unless specified Symbol Parameter Ambient Temperature Conditions CLC420AJ Typ Max/Min (Note 2) Units +25C -40C +25C +85C VOUT < 0.4VPP 300 40 > 200 > 20 > 65 > 30 > 200 > 25 > 65 > 35 > 130 > 20 > 45 > 30 MHz VOUT < 5VPP <1 <5 <1 < 1.4 < 1.8 < 0.6 <3 <1 < 1.4 < 1.8 < 0.6 <3 <2 < 1.6 < 2.5 dB <2 < 25 < 5.5 <2 < 20 < 5.5 <3 < 20 < 7.8 ns < 10 < 18 < 25 < 35 > 600 > 430 < 9.5 < 18 < 25 < 25 > 750 > 500 < 10 < 18 < 25 < 25 > 600 > 430 ns < -40 < -45 < -40 < -40 < -40 < -40 dBc dBc Frequency Domain Response SSBW -3dB Bandwidth LSBW SSBWI AV =-1, Rf = 500 VOUT < 0.4VPP 100 LSBWI AV = -1, Rf = 500 VOUT < 5VPP 60 Gain Flatness VOUT < 0.4VPP Peaking 0.1MHz to 100MHz GFPL 0 GFPH Peaking > 100MHz GFR Rolloff 0.1MHz to 100MHz 0.2 GFRI Rolloff, AV = -1, Rf = 500 0.1MHz to 30MHz 0.2 LPD Linear Phase Deviation 0.1MHz to 100MHz 0.9 0 MHz MHz MHz dB dB dB deg Time Domain Response TRS Rise and Fall Time 0.4V Step 1.2 5V Step 1.4 Rise and Fall Time, AV = -1, Rf = 500 0.4V Step 3.5 5V Step 6 TSS Settling Time to 0.1% 2V Step 12 TSP 0.01% 2V Step 18 OS Overshoot 0.4V Step SR Slew Rate, AV = +2 5V Step 1100 SRI Slew Rate, AV = -1, Rf = 500 5V Step 750 TRL TRSI TRLI 8 ns ns ns ns % V/s V/s Distortion And Noise Response HD2 2nd Harmonic Distortion 2VPP, 20MHz -50 HD3 3rd Harmonic Distortion 2VPP, 20MHz -53 HD2 2nd Harmonic Distortion AV = -1 2VPP, 20MHz, Rf = 500 -51 < -40 < -45 < -40 HD3 3rd harmonic distortion AV = -1, Rf = 500 2VPP, 20MHz, Rf = 500 -51 < -40 < -40 < -35 dBc dBc Input Referred Noise VN Voltage 1MHz to 200MHz 4.2 < 5.3 < 5.3 <6 nV/ ICN Current 1MHz to 200MHz 2 < 2.9 < 2.6 < 2.3 pA/ 1 < 3.2 <2 < 3.5 Static DC Performance VIO Input Offset Voltage (Note 3) 3 mV www.national.com CLC420 Absolute Maximum Ratings (Note 1) CLC420 Electrical Characteristics (Continued) AV = +1, VCC = 5V, RL = 100, Rf = 0; unless specified Symbol Parameter Conditions Typ Max/Min (Note 2) Units Static DC Performance DVIO Average Temperature Coefficient 8 IB Input Bias Current (Note 3) 3 DIB Average Temperature Coefficient 45 IIO Input Offset Current (Note 3) 0.2 DIIO Average Temperature Coefficient 2 AOL Open Loop Gain (Note 3) 65 PSRR Power Supply Rejection Ratio 70 CMRR Common Mode Rejection Ratio 80 ICC Supply Current (Note 3) No Load, Quiescent 4 Resistance 2 Capacitance 1 Resistance 1 Capacitance 1 < 15 < 20 < 120 < 2.6 < 20 > 52 > 55 > 60 <5 V/C > 56 > 60 > 65 <5 < 15 < 10 < 60 <2 < 10 > 56 > 60 > 65 <5 >1 <2 > 0.5 <2 < 0.2 >1 <2 > 0.5 <2 < 0.2 M 3 2.5 2.8 50 3 2.5 2.8 50 V - < 10 - <1 - A nA/C A nA/C A dB dB mA Miscellaneous Performance RO Output Impedence At DC 0.02 > 0.5 <2 > 0.25 <2 < 0.3 VO Output Voltage Range No Load VOL Output Voltage Range RL = 100 CMIR Common Mode Input Range For Rated Performance IO Output Current 3.6 2.9 3.2 60 2.8 2.5 2.5 30 RIND Differential Mode Input CIND RINC Common Mode Input CINC pF M pF V V mA Note 1: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The table of "Electrical Characteristics" specifies conditions of device operation. Note 2: Max/min ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. Note 3: AJ-level: spec. is 100% tested at +25C. www.national.com 4 CLC420 Typical Performance Characteristics Non-Inverting Frequency Response Inverting Frequency Response DS012752-2 DS012752-1 Frequency Response for Various RLS Open Loop Gain and Phase DS012752-3 DS012752-4 Bandwidth vs. Gain, Transimpedance Configuration 2nd and 3rd Harmonic Distortion DS012752-6 DS012752-5 5 www.national.com CLC420 Typical Performance Characteristics (Continued) 2-Tone, 3rd Order Intermodulation Intercept Equivalent Input Noise DS012752-7 PSRR, CMRR, and Closed Loop RO DS012752-8 Pulse Response DS012752-10 DS012752-9 Settling Time Long-Term Settling Time DS012752-11 DS012752-12 www.national.com 6 (Continued) Settling Time vs. Capacitive Load Settling Time vs. Gain CLC420 Typical Performance Characteristics DS012752-13 DS012752-14 IB and IOS vs. Common-Mode Voltage DS012752-15 7 www.national.com CLC420 Application Division DS012752-16 FIGURE 1. Recommended Non-Inverting Gain Circuit DS012752-17 FIGURE 2. Recommended Inverting Gain Circuit Another point to remember is that the closed loop bandwidth is determined by the noise gain, not the signal gain of the circuit. Noise gain is the reciprocal of the attenuation in the feedback network enclosing the op amp. For example, a CLC420 setup as a non-inverting amplifier with a closed loop gain of +1 (a noise gain of 1) has a 300MHz bandwidth. When used as an inverting amplifier with a gain of -1 (a noise gain of 2), the bandwidth is less, typically only 100MHz. Full-power bandwidth, and slew-rate The CLC420 combines exceptional full power bandwidths (40MHz, V0 = 5Vpp, AV = +1) and slew rates (1100V/s, AV = +1) with low (40mW) power consumption. These attractive results are achieved by using slew boosting circuitry to keep the slew rates high while consuming very little power. In non slew boosted amplifiers, full power bandwidth can be easily determined from slew rate measurements, but in slew boosting amplifiers, such as the CLC420, you can't. For this reason we provide data for both. Slew rate is also different for inverting and non-inverting configurations. This occurs because common-mode signal voltages are present in non-inverting circuits but absent in inverting circuits. Once again data is provided for both. Description The CLC420 is a high speed, slew boosted, voltage feedback amplifier with unity-gain stability. These features along with matched inputs, low input bias and noise currents, and excellent CMRR render the CLC420 very attractive for active filters, differential amplifiers, log amplifiers, and transimpedance amplifiers. DC accuracy Unlike current feedback amplifiers, voltage-feedback amplifiers have matched inputs. This means that the non inverting and inverting input bias current are well matched and track over temperature, etc. As a result, by matching the resistance looking out of the two inputs, these errors can be reduced to a small offset current term. Gain bandwidth product Since the CLC420 is a voltage feedback op amp, closed loop bandwidth is approximately equal to the gain bandwidth product (typically 100MHz) divided by the noise gain of the circuit (for noise gains greater than 5). At lower noise gains, higher order amplifier poles contribute to higher closed loop bandwidth. At low gains use the frequency response performance plots given in the data sheet. www.national.com 8 From the "Transimpedance BW vs. Rf and Ci" plot, using Ci = 5pF it is determined from the two curves labeled Ci = 5pF, that Cf = 1.5pF provides optimal compensation (no more than 0.5dB frequency response peaking) and a -3dB bandwidth of approximately 27MHz. (Continued) Transimpedance amplifier circuits Low inverting, input current noise (2pA/ ) makes the CLC420 ideal for high sensitivity transimpedance amplifier circuits for applications such as pin diode optical receivers, and detectors in receiver IFs. However, feedback resistors 4k or greater are required if feedback resistor noise current is going to be less than the input current noise contribution of the op amp. With feedback resistors this large, shunt capacitance on the inverting input of the op amp (from the pin diode, etc.) will unacceptably degrade phase margin causing frequency response peaking or oscillations a small valued capacitor shunting the feedback resistor solves this problem (Note: This approach does not work for a current-feedback op amp configured for transimpedance applications). To determine the value of this capacitor, refer to the "Transimpedance BW vs. Rf and Ci" plot. For example, let's assume an optical transimpedance receiver is being developed. Total capacitance from the inverting input to ground, including the photodiode and strays is 5pF. A 5k feedback resistor value has been determined to provide best dynamic range based on the response of the photodiode and the range of incident optical powers, etc. Printed circuit layout As with any high frequency device, a good PCB layout will enhance performance. Ground plane construction and good power supply bypassing close to the package are critical to achieving full performance. The amplifier is sensitive to stray capacitance to ground at the output and inverting input: Node connections should be small with minimal coupling to the ground plane. Parasitic or load capacitance directly on the output (pin 6) will introduce additional phase shift in the loop degrading the loop phase margin and leading to frequency response peaking. A small series resistor before this capacitance, if present, effectively decouples this effect. The graphs on the preceding page, " Settling Time vs. CL", illustrates the required resistor value and resulting performance vs. capacitance. Evaluation PC boards (part no. 730013 for through-hole and CLC730027 for SOIC) are available for the CLC420. 9 www.national.com CLC420 Application Division CLC420 Physical Dimensions inches (millimeters) unless otherwise noted 8-Pin MDIP NS Package Number N08E 8-Pin SOIC NS Package Number M08A www.national.com 10 CLC420 High Speed, Voltage Feedback Op Amp Notes LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com www.national.com National Semiconductor Europe Fax: +49 (0) 180-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Francais Tel: +33 (0) 1 41 91 8790 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: ap.support@nsc.com National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.