5-479
FAST AND LS TTL DATA
8-BIT SHIFT/STORAGE REGISTER
WITH 3-STATE OUTPUTS
The SN54/74LS299 is an 8-Bit Universal Shift/Storage Register with
3-state outputs. Four modes of operation are possible: hold (store), shift left,
shift right and load data.
The parallel load inputs and flip-flop outputs are multiplexed to reduce the
total number of package pins. Separate outputs are provided for flip-flops Q0
and Q7 to allow easy cascading. A separate active LOW Master Reset is used
to reset the register.
•Common I/O for Reduced Pin Count
•Four Operation Modes: Shift Left, Shift Right, Load and Store
•Separate Shift Right Serial Input and Shift Left Serial Input for Easy
Cascading
•3-State Outputs for Bus Oriented Applications
•Input Clamp Diodes Limit High-Speed Termination Effects
•ESD > 3500 Volts
CONNECTION DIAGRAM DIP (TOP VIEW)
18 17 16 15 14 13
1 2 3 4 5 6 7
20 19
8
VCC
S0
S1Ds7 Q7I/O7I/O3
I/O5I/O1
OE1OE2I/O6I/O4I/O2I/O0Q0
9 10
MR GND
12 11
CP DS0
NOTE:
The Flatpak version
has the same pinouts
(Connection Diagram) as
the Dual In-Line Package.
PIN NAMES LOADING (Note a)
HIGH LOW
CP Clock Pulse (active positive-going edge) Input 0.5 U.L. 0.25 U.L.
DS0 Serial Data Input for Right Shift 0.5 U.L. 0.25 U.L.
DS7 Serial Data Input for Left Shift 0.5 U.L. 0.25 U.L.
I/OnParallel Data Input or
Parallel Output (3-State) (Note c) 0.5 U.L.
65 (25) U.L. 0.25 U.L.
15 (7.5) U.L.
OE1, OE23-State Output Enable (active LOW) Inputs 0.5 U.L. 0.25 U.L.
Q0, Q7Serial Outputs (Note b) 10 U.L. 5 (2.5) U.L.
MR Asynchronous Master Reset (active LOW) Input 0.5 U.L. 0.25 U.L.
S0, S1Mode Select Inputs 1 U.L. 0.5 U.L.
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.
b) The Output LOW drive factor is 2.5 U.L for Military (54) and 5 U.L. for Commercial (74) Temperature Ranges.
c) The Output LOW drive factor is 7.5 U.L for Military (54) and 15 U.L. for Commercial (74). The Output HIGH drive factor is 25 U.L. for Military (54) and 65 U.L. for
Commercial (74) Temperature Ranges.
SN54/74LS299
8-BIT SHIFT/STORAGE REGISTER
WITH 3-STATE OUTPUTS
LOW POWER SCHOTTKY
ORDERING INFORMATION
SN54LSXXXJ Ceramic
SN74LSXXXN Plastic
SN74LSXXXDW SOIC
20
1
J SUFFIX
CERAMIC
CASE 732-03
20 1
N SUFFIX
PLASTIC
CASE 738-03
20
1
DW SUFFIX
SOIC
CASE 751D-03
5-480
FAST AND LS TTL DATA
SN54/74LS299
LOGIC DIAGRAM
FUNCTION TABLE
INPUTS RESPONSE
MR S1S0OE1OE2CP DS0DS7
L X X H X X X X
Asynchronous Reset; Q0 = Q7 = LOW
I/O Voltage Undetermined
L X X X H X X X
Asynchronous Reset; Q0 = Q7 = LOW
I/O Voltage Undetermined
L H H X X X X X
I/O Voltage Undetermined
L L X L L X X X Asynchronous Reset; Q0 = Q7 = LOW
L X L L L X X X I/O Voltage LOW
H L H X X D X Shift Right; DºQ0; Q0ºQ1; etc.
H L H L L D X Shift Right; DºQ0 & I/O0; Q0ºO1 & I/O1; etc.
H H L X X X D Shift Left; DºQ7; Q7ºQ6; etc.
H H L L L X D Shift Left; DºQ7 & I/O7; Q7ºQ6 & I/O6; etc.
H H H X X X X Parallel Load; I/OnºQn
H L L H X X X X
Hold: I/O Voltage undetermined
H L L X H X X X
Hold: I/O Voltage undetermined
H L L L L X X X Hold: I/On = Qn
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
VCC Supply Voltage 54
74 4.5
4.75 5.0
5.0 5.5
5.25 V
TAOperating Ambient Temperature Range 54
74 –55
025
25 125
70 °C
IOH Output Current — High Q0, Q754, 74 –0.4 mA
IOL Output Current — Low Q0, Q7
Q0, Q754
74 4.0
8.0 mA
IOH Output Current — High I/O0–I/O7
I/O0–I/O754
74 –1.0
– 2.6 mA
IOL Output Current — Low I/O0–I/O7
I/O0–I/O754
74 12
24 mA
5-481
FAST AND LS TTL DATA
SN54/74LS299
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Symbol
Parameter
Limits
Unit
Test Conditions
Symbol
Parameter
Min Typ Max
Unit
Test Conditions
VIH Input HIGH Voltage 2.0 V Guaranteed Input HIGH Voltage for
All Inputs
VIL
Input LOW Voltage
54 0.7
V
Guaranteed Input LOW Voltage for
All Inputs
VIL
Input LOW Voltage
74 0.8
V
Guaranteed Input LOW Voltage for
All Inputs
VIK Input Clamp Diode Voltage –0.65 –1.5 V VCC = MIN, IIN = –18 mA
VOH
Output HIGH Voltage
I/O0–I/O7
54 2.4 3.2 V
VCC = MIN, IOH = MAX
VOH
Output HIGH Voltage
I/O0–I/O7
74 2.4 3.1 V
VCC = MIN, IOH = MAX
VOH
Output HIGH Voltage
Q0, Q7
54 2.5 3.4 V
VCC = MIN, IOH = MAX
VOH
Output HIGH Voltage
Q0, Q7
74 2.7 3.4 V
VCC = MIN, IOH = MAX
VOL
Output LOW Voltage
I/O0–I/O7
54, 74 0.25 0.4 V IOL = 12 mA
VCC = VCC MIN,
VIN = VIL or VIH
per Truth Table
VOL
Output LOW Voltage
I/O0–I/O7
74 0.35 0.5 V IOL = 24 mA
VIN = VIL or VIH
per Truth Table
VOL
Output LOW Voltage
I/O0–I/O7
54, 74 0.4 V IOL = 4.0 mA
VCC = VCC MIN,
VIN = VIL or VIH
per Truth Table
VOL
Output LOW Voltage
I/O0–I/O7
74 0.5 V IOL = 8.0 mA
VIN = VIL or VIH
per Truth Table
IOZH Output Off Current HIGH
I/O0–I/O740 µA VCC = MAX, VOUT = 2.7 V
IOZL Output Off Current LOW
I/O0–I/O7–400 µA VCC = MAX, VOUT = 0.4 V
IIH
Input HIGH Current
Others 20 µA
VCC = MAX, VIN = 2.7 V
IIH
Input HIGH Current
S0, S1,
I/O0–I/O740 µA
VCC = MAX, VIN = 2.7 V
IIH
Input HIGH Current
Others 0.1 mA
VCC = MAX, VIN = 7.0 V
S0, S10.2 mA
VCC = MAX, VIN = 7.0 V
I/O0–I/O70.1 mA VCC = MAX, VIN = 5.5 V
IIL
Input LOW Current
Others –0.4 mA
VCC = MAX, VIN = 0.4 V
IIL
Input LOW Current
S0, S1–0.8 mA
VCC = MAX, VIN = 0.4 V
IOS Short Circuit Current
(Note 1)
Q0, Q7–20 –100 mA VCC = MAX
OS
Short Circuit Current
(Note 1)
I/O0–I/O7–30 –130 mA VCC = MAX
ICC Power Supply Current 53 mA VCC = MAX
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
5-482
FAST AND LS TTL DATA
SN54/74LS299
AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V)
Symbol
Parameter
Limits
Unit
Test Conditions
Symbol
Parameter
Min Typ Max
Unit
Test Conditions
fMAX Maximum Clock Frequency 25 35 MHz
CL = 15 pF
tPHL
tPLH Propagation Delay, Clock
to Q0 or Q726
22 39
33 ns
CL = 15 pF
tPHL Propagation Delay, Clear
to Q0 or Q727 40 ns
L = 15 pF
tPHL
tPLH Propagation Delay, Clock
to I/O0–I/O726
17 39
25 ns
CL = 45 pF,
RL = 667 Ω
tPHL Propagation Delay, Clear
to I/O0–I/O726 40 ns
CL = 45 pF,
RL = 667 Ω
tPZH
tPZL Output Enable Time 13
19 21
30 ns
tPHZ
tPLZ Output Disable Time 10
10 15
15 ns CL = 5.0 pF
AC SETUP REQUIREMENTS (TA = 25°C, VCC = 5.0 V)
Symbol
Parameter
Limits
Unit
Test Conditions
Symbol
Parameter
Min Typ Max
Unit
Test Conditions
tWClock Pulse Width HIGH 25 ns
VCC = 5.0 V
tWClock Pulse Width LOW 13 ns
VCC = 5.0 V
tWClear Pulse Width LOW 20 ns
VCC = 5.0 V
tsData Setup Time 20 ns
VCC = 5.0 V
tsSelect Setup Time 35 ns
VCC = 5.0 V
thData Hold Time 0 ns
thSelect Hold Time 10 ns
trec Recovery Time 20 ns
Figure 1 Figure 2
Figure 5
Figure 3 Figure 4
≈
≈
≥
3-STATE WAVEFORMS
AC LOAD CIRCUIT
Ω
SWITCH POSITIONS
* Includes Jig and Probe Capacitance.
5-483
FAST AND LS TTL DATA
SN54/74LS299
SYMBOL SW1 SW2
tPZH Open Closed
tPZL Closed Open
tPLZ Closed Closed
tPHZ Closed Closed
5-484
FAST AND LS TTL DATA
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MFJ
Case 751D-03 DW Suffix
20-Pin Plastic
SO-20 (WIDE)
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20-Pin Ceramic Dual In-Line
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20-Pin Plastic
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1120
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5-485
FAST AND LS TTL DATA
SYMBOL SW1 SW2
tPZH Open Closed
tPZL Closed Open
tPLZ Closed Closed
tPHZ Closed Closed
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