June 1999 alpha mi croelectronics gm bh
Description
The ú0560 contains six N-channel power MOS
FET with VDSS = 500 V in half-bridge configuration.
These enhancement-mode Power MOSFET array
utilizes a DMOS structure and alpha’s dielectric
isolated high voltage DIMOST technology.
Each MOSFET pr ovides an ac cur ate fraction of the
drain current through a current-sense terminal to
be used for contr ol or protec tion. The pr ovision of a
kelvin source connection eliminates problems of
common source inductance. An additional
second current-sense terminal of the low-side
power MOSFET eases an independent current
monitoring in every half bridge.
Features
q Six dielectric isolated N-channel power
MOSFET with VDSS = 500 V, RDS(on) = 10 Ω
q Three fast switching half-bridges
q High-side power MOSFET with a current sense
source
q Low-side power MOSFET with tw o current
sense sources
q Integrated gate protection diodes
q High density mounting
q Temperature range -25°C ... +85°C
q Package QPF 64 - ú0560EQ
Die - ú0560EX
Applications
q Three Phase Inverter
q Suitable for motor driver and solenoid driver
Equivalent Circuit
K1H SD1
G1H
G1L
K1L S1L
C1H
D1H
ú
0560
C1L
K2H SD2
G2H
G2L
K2L S2L
C2H
D2H
C2L
K3H SD3
G3H
G3L
K3L S3L
C3H
D3H
C3LCM1 CM2 CM3
M1H
M1L
M2H
M2L
M3H
M3L
N-Channel Power MOSFET Array
ú0560
Preliminary Data Sheet
Page 2 of 4 alpha mi croelectronics gm bh June 1999
Pin Description
Symbol Description
D1H, D2H, D3H Drain terminal of the high-side MOSFET, supply terminal of the half bridge
G1H, G2H, G3H Gate terminal of the high-side MOSFET
SD1, SD2, SD3 Output of the half bridge,
connection »Source of high-side MOSFET to Drain of low-side MOSFET«
C1H, C2H, C3H Current-sense source terminal of the high-side MOSFET
K1H, K2H, K3H Kelvin source terminal of the high-side MOSFET
G1L, G2L, G3L Gate terminal of the low-side MOSFET
S1L, S2L, S3L Source terminal of the low-side MOSFET, ground terminal of the half bridge
C1L, C2L, C3L Current-sense source terminal of the low-side MOSFET
CM1, CM2, CM3 Second current-sense source terminal of the low-side MOSFET
K1L, K2L, K3L Kelvin source terminal of the low-side MOSFET
Pinning / Pad Coordinates (QFP64 / Die)
Symbol Pin Pad-X in µm Pad-Y in µm Symbol Pin Pad-X in µm Pad-Y in µm
G1L 1 200 4850 G3L 16 200 1100
C1H 2 200 4600 C3L 17 200 850
K1H 3 200 4350 K3L 18 200 600
G1L 4 200 4100 D1H 50, 51 5000 5000
C1L 5 200 3850 SD1 48, 49 5000 4500
K1L 6 200 3600 CM1 47 5000 4100
G2H 7 200 3350 S1L 53, 54 4500 4000
C2H 8 200 3100 D2H 44, 45 5000 3200
K2H 9 200 2850 SD2 42, 43 5000 2700
G2L 10 200 2600 CM2 41 5000 2400
C2L 11 200 2350 S2L 39, 40 4500 2200
K2L 12 200 2100 D3H 37, 38 5000 1500
G3H 13 200 1850 SD3 35, 36 5000 1000
C3H 14 200 1600 CM3 34 5000 700
K3H 15 200 1350 S3L 31, 32 4500 500
June 1999 alpha mi croelectronics gm bh Page 3 of 4
Absolute Maximum Ratings
at Tamb = -25 °C ... +85 °C
Symbol Parameter Min Max Unit
VDS Drain-to-Source Voltage 500 V
IDM Peak Drain Current 1.2 A
ID1 Tj = 95°C, Continuous Drain Current, VGS = 10 V tbd A
ID2 Tj = 145°C, Continuous Drain Current, VGS = 10 V tbd A
VGS Gate-to-Source Voltage -0.3 20 V
TjJunction Temperature -25 150 °C
Tstg Storage Temperature -55 150 °C
Electrical Characteristics
DC Characteristics
at Tamb = 25 °C
Symbol Parameter Conditions Min Typ Max Unit
V(BR)DSS Drain-to-Source Breakdown Voltage VGS = 0, ID = 100 µ A 500 V
RDS(on) Static Drain-to-Source On-Resistance VGS = 10 V, ID = 0.2 A tbd 12.5 Ω
IDSS Drain-to-Source Leakage Current VDS = 450 V, VGS = 0 10 µA
VGS Gate-to-Source Threshold Voltage VGS = VDS, ID = 100 µA 1.5 2.5 V
IGSS Gate-to-Source Leakage Current VGS = 20 V 100 nA
QgTotal Gate Charge VDS = 250 V, ID = 0. 5 A tbd nC
Ciss Input Capacitance tbd pF
Coss Output Capacitance tbd pF
Crss Output Capacitance tbd pF
r1 Current Sense Ratio IDxx / ICxx ID = 0.2 A, VGS = 10 V tbd
r2 Current Sense Ratio IDxL / ICMx ID = 0.2 A, VGS = 10 V tbd
VSD Diode Forward Voltage ID = 0.2 A tbd V
Rthja Thermal Resistance Junction-to-Ambient 70 K/W
AC Characteristics
at Tamb = 25 °C
Symbol Parameter Conditions Min Typ Max Unit
td(on) Turn-On Delay Time VDS = 250 V, ID = 0. 5 A tbd ns
trRise Time VDS = 250 V , ID = 0.5 A tbd ns
td(off) Turn-Off Delay Time VDS = 250 V , I D = 0. 5 A tbd ns
tfFall Time VDS = 250 V, ID = 0.5 A tbd ns
Page 4 of 4 alpha mi croelectronics gm bh June 1999
Packaging QFP64
64 Pin´s a 0,4
1
,
00
1
,
00
12x1
,
00=12
,
00
14
0,1
18x1,00=18,00
20
0,1
23,2
19
64
52 51 33
32
20
1
Pin 1
3
,
4 max.
2,57 - 2,87
17,2
64-Pin Plastic Quad Flat Package
Note
It is not given warranty that the declared circ uits, devices , facilities , components, assembly groups or t reat ments included herein
are free from legal clai ms of third parties.
The declared data are serving only to des c ri ption of product. They are not guarantee properties as defined by law. The examples
are given without obligation and cannot given ris e t o any liabilit y.
Reprinting t hi s data sheet - or part s of it - is only allowed with a licenc e of the publis her.
alpha mi croelectronics gm bh reserves the right to m ak e changes on this specificati on without notice at any time.
alpha microelectronics gmbh
Im Technologiepark 1 Tel ++49-335-557 1750
15236 Frankfurt (Oder) Fax ++49-335-557 1759
Germany Internet http://www.alpha-microelectronics.de
email alpha@alpha-microelectronics.de
0560DSHa.doc
