2-1
Semiconductor
October 1997
Features
• 8.0A and 9.2A, 80V and 100V
•r
DS(ON) = 0.27Ω and 0.36Ω
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Majority Carrier Device
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Description
These are N-Channel enhancement mode silicon gate
power field effect transistors. They are advanced power
MOSFETs designed, tested, and guaranteed to withstand a
specified level of energy in the breakdown avalanche mode
of operation. All of these power MOSFETs are designed for
applications such as switching regulators, switching conver-
tors, motor drivers, relay drivers, and drivers for high power
bipolar switching transistors requiring high speed and low
gate drive power. These types can be operated directly from
integrated circuits.
Formerly developmental type TA09594.
Symbol
Packaging
JEDEC TO-204AA
Ordering Information
PART NUMBER PACKAGE BRAND
IRF120 TO-204AA IRF120
IRF121 TO-204AA IRF121
IRF122 TO-204AA IRF122
IRF123 TO-204AA IRF123
NOTE: When ordering, use the entire part number.
D
G
S
DRAIN
(FLANGE)
SOURCE (PIN 2)
GATE (PIN 1)
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures.
Copyright © Harris Corporation 1997
IRF120, IRF121,
IRF122, IRF123
8.0A and 9.2A, 80V and 100V, 0.27 and 0.36 Ohm,
N-Channel, Power MOSFETs
File Number 1565.2
2-2
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
IRF120 IRF121 IRF122 IRF123 UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . .VDS 100 80 100 80 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . VDGR 100 80 100 80 V
Continuous Drain Current. . . . . . . . . . . . . . . . . . . . . . . . . . ID
TC= 100oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID9.2
6.5 9.2
6.5 8.0
5.6 8.0
5.6 A
A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . IDM 37 37 32 32 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . .VGS ±20 ±20 ±20 ±20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . .PD60 60 60 60 W
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.4 0.4 0.4 0.4 W/oC
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . .EAS 36 36 36 36 mJ
Operating and Storage Temperature . . . . . . . . . . . .TJ, TSTG -55 to 175 -55 to 175 -55 to 175 -55 to 175 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . Tpkg 300
260 300
260 300
260 300
260
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ= 25oC to 150oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V
(Figure 10)
IRF120, IRF122 100 - - V
IRF121, IRF123 80 - - V
Gate Threshold Voltage VGS(TH) VDS = VGS, ID = 250µA 2.0 - 4.0 V
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 µA
VDS = 0.8 x Rated BVDSS, V GS = 0V, TJ = 150oC - - 250 µA
On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON)MAX, VGS = 10V
IRF120, IRF121 9.2 - - A
IRF122, IRF123 8.0 - - A
Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA
Drain to Source On Resistance (Note 2) rDS(ON) ID = 5.6A, VGS = 10V
(Figure 8, 9)
IRF120, IRF121 - 0.25 0.27 Ω
IRF122, IRF123 0.27 0.36 Ω
Forward Transconductance (Note 2) gfs VDS > ID(ON) x rDS(ON)MAX, ID = 5.6A
(Figure 12) 2.9 4.0 - S
Turn-On Delay Time td(ON) VDD = 50V, ID≈ 9.2A, RGS = 18Ω, RL = 5.1Ω
(Figures 17, 18) MOSFET Switching Times are
Essentially Independent of Operating
Temperature
- 8.8 13 ns
Rise Time tr-3045ns
Turn-Off Delay Time td(OFF) -1929ns
Fall Time tf-2030ns
Total Gate Charge
(Gate to Source + Gate to Drain) Qg(TOT) VGS = 10V, ID = 5.6A, VDS = 0.8 x Rated BVDSS,
Ig(REF) = 1.5mA (Figures 14, 19, 20)
Gate Charge is Essentially Independent of
Operating Temperature
- 9.7 15 nC
Gate to Source Charge Qgs - 2.2 - nC
Gate to Drain “Miller” Charge Qgd - 2.3 - nC
IRF120, IRF121, IRF122, IRF123
2-3
Input Capacitance CISS VDS = 25V, VGS = 0V, f = 1MHz
(Figure 11) - 350 - pF
Output Capacitance COSS - 130 - pF
Reverse Transfer Capacitance CRSS -36-pF
Internal Drain Inductance LDMeasured Between the
Contact Screw on the
Flange that is Closer to
Source and Gate Pins and
the Center of Die
Modified MOSFET
Symbol Showing the
Internal Device
Inductances
- 5.0 - nH
Internal Source Inductance LSMeasured From the
Source Lead, 6mm
(0.25in) From the Flange
and the Source Bonding
Pad
- 12.5 - nH
Thermal Resistance, Junction to Case RθJC - - 2.5 oC/W
Thermal Resistance, Junction to Ambient RθJA Free Air Operation - - 30 oC/W
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD Modified MOSFET
Symbol Showing the
Integral Reverse P-N
Junction Rectifier
- - 8.0 A
Pulse Source to Drain Current
(Note 3) ISDM - - 32 A
Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 9.2A, VGS = 0V (Figure 13) - - 2.5 V
Reverse Recovery Time trr TJ = 25oC, ISD = 9.2A, dISD/dt = 100A/µs 55 110 240 ns
Reverse Recovery Charge QRR TJ = 25oC, ISD = 9.2A, dISD/dt = 100A/µs 0.25 0.53 1.10 µC
NOTES:
2. Pulse test: pulse width ≤300µs, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 25V, starting TJ = 25oC, L = 640µH, RG = 25Ω, peak IAS= 9.2A (Figures 15, 16).
Electrical Specifications TC = 25oC, Unless Otherwise Specified (Continued)
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
LS
LD
G
D
S
D
G
S
IRF120, IRF121, IRF122, IRF123
2-4
Typical Performance Curves
Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS
TC, CASE TEMPERATURE (oC)
25 50 75 100 125 150 175
0
POWER DISSIPATION MULTIPLIER
0
0
0.2
0.4
0.6
0.8
1.0
1.2
25 50 75 100 125 150 175
10
8
6
4
2
0
TC, CASE TEMPERATURE (oC)
ID, DRAIN CURRENT (A)
IRF122
IRF123
IRF120
IRF121
10-5 10-4 10-3 10-2 0.1 1 10
10
1
0.1
0.01
ZθJC,THERMAL IMPEDANCE (oC/W)
t1, RECTANGULAR PULSE DURATION (s)
0.5
0.2
0.1
0.05
0.02
0.01
SINGLE PULSE
PDM
t1t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ= PDM x ZθJC + TC
110100 1000
VDS, DRAIN TO SOURCE VOLTAGE (V)
100
10
1
0.1
ID, DRAIN CURRENT (A)
TC = 25oC
TJ = MAX RATED
SINGLE PULSE
OPERATION IN
THIS AREA LIMITED
BY rDS(ON)
IRF120, IRF122
IRF121, IRF123
100µs
10µs
1ms
10ms
DC
IRF120, IRF121
IRF122, IRF123
0 10 20304050
V
DS, DRAIN TO SOURCE VOLTAGE (V)
15
12
9
6
3
0
ID, DRAIN CURRENT (A)
80µs PULSE TEST
VGS = 8V
VGS = 4V
VGS = 5V
VGS = 6V
VGS = 7V
10V
IRF120, IRF121, IRF122, IRF123
2-5
FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 10. NORMALIZED DRAIN T O SOURCE BREAKDO WN
VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
Typical Performance Curves
Unless Otherwise Specified (Continued)
0 1.0 2.0 3.0 4.0 5.0
VDS, DRAIN TO SOURCE VOLTAGE (V)
15
12
9
6
3
0
ID, DRAIN CURRENT (A)
80µs PULSE TEST
VGS = 6V
VGS = 5V
VGS = 4V
VGS = 7V
VGS = 8V
VGS = 10V
0246810
V
GS, GATE TO SOURCE VOLTAGE (V)
100
10
1
0.1
ID, DRAIN CURRENT (A)
TJ = 175oC
TJ = 25oC
VDS ≥ 50V
80µs PULSE TEST
0 8 16 24 32 40
2.5
2.0
1.5
1.0
0.5
0
ID, DRAIN CURRENT (A)
rDS(ON), DRAIN TO SOURCE ON RESISTANCE
80µs PULSE TEST
VGS = 20V
VGS = 10V
3.0
2.4
1.8
1.2
0.6
0.0
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
-60 0 60 120 180
TJ, JUNCTION TEMPERATURE (oC)
ID = 9.2A
VGS = 10V
1.25
1.15
1.05
0.95
0.85
0.75
-60 0 60 120 180
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
ID = 250µA
1000
800
600
400
200
0110
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGS
CISS
CRSS
COSS
IRF120, IRF121, IRF122, IRF123
2-6
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Test Circuits and Waveforms
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
Typical Performance Curves
Unless Otherwise Specified (Continued)
TJ = 175oC
TJ = 25oC
0 3 6 9 12 15
ID, DRAIN CURRENT (A)
5.0
4.0
3.0
2.0
1.0
0
gfs, TRANSCONDUCTANCE (S)
VDS ≥ 50V
80µs PULSE TEST
0.0 0.4 0.8 1.2 1.6 2.0
VSD, SOURCE TO DRAIN VOLTAGE (V)
100
10
1
0.1
ISD, SOURCE TO DRAIN CURRENT (A)
TJ = 175oCTJ = 25oC
20
16
12
8
4
00 3 6 9 12 15
Qg(TOT), TOTAL GATE CHARGE (nC)
VGS, GATE TO SOURCE VOLTAGE (V)
ID = 9.2A VDS = 80V
VDS = 50V
VDS = 20V
tP
VGS
0.01Ω
L
IAS
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VDD
VDS
BVDSS
tP
IAS
tAV
0
IRF120, IRF121, IRF122, IRF123
2-7
FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS
Test Circuits and Waveforms
(Continued)
VGS
RL
RG
DUT
+
-VDD
tON
td(ON)
tr
90%
10%
VDS 90%
10%
tf
td(OFF)
tOFF
90%
50%
50%
10% PULSE WIDTH
VGS
0
0
0.3µF
12V
BATTERY 50kΩ
VDS
S
DUT
D
G
Ig(REF)
0
(ISOLATED
VDS
0.2µF
CURRENT
REGULATOR
ID CURRENT
SAMPLING
IG CURRENT
SAMPLING
SUPPLY)
RESISTOR RESISTOR
SAME TYPE
AS DUT
Qg(TOT)
Qgd
Qgs
VDS
0
VGS
VDD
IG(REF)
0
IRF120, IRF121, IRF122, IRF123
