February 1992 - Linear Technology

IN THIS ISSUE . . .

The LT1158: Low Voltage,

N-Channel Bridge Design

Made Easy

Protection from over-current faults

is essential in any high current system.

The LT1158 protects the top MOSFET

from shorts to ground, or shorts across

the motor in a full-bridge circuit. The

flexibility of the LT1158 protection cir-

cuitry allows the bridge designer high

inrush current capability along with

self protection and automatic reset in

the event of a short.

Life Above The Supply Rail

The first problem designers face in

N-channel half-bridge circuits is de-

veloping the top-side gate drive, which

must swing at least 10V above the

supply rail for standard MOSFETs (and

must remain there for dc operation).

This challenge alone is so demanding

that designers often resort to more

expensive and less efficient P-

channel

by Milton Wilcox

continued on page 3

Synchronous control of two N-chan-

nel power MOSFETs operating from

5V to 30V has just become consider-

ably easier. The new LT1158 half-

bridge driver effectively deals with the

many problems and pitfalls encoun-

tered in the design of high efficiency

motor control and switching-regula-

tor circuits (see Table 1). This article

will discuss these problems, along

with the solutions afforded to the

bridge designer by the LT1158.

LT1158 Overview

Figure 1 is a block diagram of the

LT1158. A single input pin controls

switching of both N-channel

MOSFETs; all timing and protection

functions are performed by the

LT1158. Pulling the enable pin low

actively holds both MOSFETs off and

reduces supply current to 2mA. The

output pins have been arranged for

ease of PC board layout.

Bipolar technology was chosen for

operation to 30V (36V absolute maxi-

mum) due to its inherent junction break-

downs of greater than 60V. This is

particularly important in an N-channel

top-side driver, which must operate

above the supply rail. Bipolar technol-

ogy also provides consistent drive ca-

pability: the LT1158 switches 3000pF

in 150ns, but at 10,000pF this only

increases to 250ns, making operation

to 50kHz possible with the largest

MOSFETs. And, unlike CMOS drivers,

these transition times are maintained

over the entire supply range.

COVER ARTICLE

The LT1158: Low Voltage,

N-Channel Bridge Driver ... 1

Milton Wilcox

Editor's Page ..................... 2

Richard Markell

DESIGN FEATURES

The LTC1096/1098:

Micropower, SO-8 ADCs ..... 6

William Rempfer

The LT1432: 5-Volt Regulator

Achieves 90% Efficiency .. 12

Carl Nelson

The LTC1156 Quad High-

Side MOSFET Driver ........ 13

Tim Skovmand

The LT1103/1105 Family of

Offline Switching Regulators

........................................ 14

Anthony Bonte

The LT1124/1125: What’s

New in Precision, High-speed

Op Amps .......................... 18

Alexander Strong

DESIGN IDEAS

Introducing the LTC1292:

12-Bit, 8-Pin, Serial-I/O Data

Acquisition System ......... 20

Sammy Lum

DC-Accurate, Butterworth

Lowpass Filter Requires No

On-Board Clock ............... 22

Richard Markell

New Device Cameos ......... 23

LTC Marketing

• MOSFET gate-voltage overstress

• Top-side drive starvation at high duty

cycles

• DC operation of N-channel top side

MOSFET

• Cross-conduction, or “shoot-through”

currents

• Output transients below ground and

above supply

• Protection against short circuits

• Starting high in-rush current loads

Table 1. Major pitfalls encountered in

synchronous MOSFET driver designs

FEBRUARY 1992 VOLUME II NUMBER 1

LINEAR TECHNOLOG



LINEAR TECHNOLOG



LINEAR TECHNOLOG



Linear Technology Magazine Vol. 2, No. 1, February 1992

DESIGN FEATURES

A Bunch of Guys with Funny Names

Write About Elegant Integrated Circuits

With this issue we begin our second

volume of the magazine Linear Tech-

nology. The first two issues were quite

a learning experience both about the

process of engineering and about the

process of desktop publishing. As the

issues and volumes roll along, more

designers will become writers and,

perhaps a few writers will become

better engineers.

This issue is the largest issue yet.

The topics in this issue range from

micropower A/D converters to offline

switching regulators with a few

switched capacitor filter applications

also. This issue is heavily focused on

power-control devices, ranging from

the LT1158 half-bridge MOSFET driver

to the 1103/1105 family of offline

switching regulators and the LT1432

switching regulator controller.

Power-control and power-supply

ICs have been the focus of much at-

tention at Linear Technology recently.

by Richard Markell

Issue Highlights

Milt Wilcox headlines this issue

with his article on the LT1158 half-

bridge MOSFET driver. This part is a

significant addition to the new line of

power control circuits that Milt is

developing with his group. Milt has

many years of experience designing

RF and video circuits as well as con-

sumer IC’s. He holds more than 25

patents. Milt has been known to spend

weekdays finessing the ultimate per-

formance from a circuit design while

spending the occasional weekend driv-

ing fast cars on an open track.

Tony Bonte describes the architec-

ture of his LT1103 offline switching

regulator in his design feature. The

LT1103 is another major design

achievement for Linear Technology.

Tony has designed all flavors of linear

integrated circuits in his eight-year

career. His interests include tennis

and making handcrafted bread. Can

we get an engineering sample of the

bread Tony?

Carl Nelson describes the LT1432

switching regulator controller. This

part allows 5 volt regulators to achieve

90% efficiency. Carl is employee num-

ber 11 and one of the founders of LTC.

Carl wastes enormous amounts of

time restoring his Victorian home.

Alexander Strong describes the

new low-noise operational amplifiers,

the LT1124, 25, 26, and 27. These

amplifiers challenge the industry stan-

dard OP-27 and improve upon its

noise performance. Alex is a Vermont

native who has been designing analog

integrated circuits for over 14 years.

Sammy Lum introduces the

LTC1292 serial I/O, 12-bit data ac-

quisition system. The LTC1292 is an

8-pin, differential-input, CMOS ana-

log-to-digital converter, which is quite

easy to use. Sammy designed the

12-bit A/D series which includes the

LTC1290 through 1294 and the

LTC1296. He has been designing in

CMOS since 1979.

Tim Skovmand and Willie Rempfer

were contributors to the last issue.

From the manufacturer’s point of view,

power ICs are a difficult topic. This is

less a result of the difficulties of the

integrated circuit design than of the

host of peripheral parts that are gen-

erally required. The customer must

not only design the application cir-

cuit, but must, in many cases, design

the magnetics necessary to make the

IC perform as specified. This is not the

case with the ICs available from LTC.

LTC offers power-control devices rang-

ing from micropower DC-DC convert-

ers (the LT1073 family), to high-power,

high-efficiency switching regulators

(the LT1070/1170/1270 families),

with a full selection of devices in be-

tween. In addition, every circuit pub-

lished by LTC has specified magnetics

complete with part numbers.

The difficulties of power-supply

design, though not insignificant, are

significantly reduced by the availabil-

ity of fully specified and tested

magnetics. We at LTC endeavor to

offer the user not only the IC, but fully

specified and tested magnetics. This

makes the use of the integrated circuit

easier and allows significant cost

savings by placing the power supply

completely under the control of the

equipment designer. We know that it

is difficult to design power supplies

and their required magnetics, so we

provide whatever kind of support is

required. We have in-house magnet-

ics-design expertise and we are

developing software to assist in the

design of switching power supplies.

We are here to help.

This issue will be mailed to the

subscription list which we collected

from the response cards bound into

the last two issues. If you are not

on the mailing list and would like to

be, please return the response card

bound into this issue, or call your

local sales office or the factory.

EDITOR'S PAGE

Linear Technology Magazine • February 1992

DESIGN FEATURES

LT1158 continued from page 1

continued on page 4

MOSFETs on the top side in low voltage

bridge circuits. However, even this

solution is no longer straightforward

when the supply voltage exceeds the

maximum gate-to-source voltage (V

)

rating for the MOSFET (typically 20V).

The best solution to this problem is

to use a floating top-side N-channel

gate driver operating from a bootstrap

capacitor. Although widely used, the

technique of bootstrapping must be

carefully implemented, since the gate

voltage applied to the top MOSFET

derives directly from the voltage on the

bootstrap capacitor. If this voltage be-

comes either too high or too low, it can

cause problems for the MOSFET. For

example, if the bootstrap supply is

referenced to ground, but the bottom

of the capacitor is swinging below

ground due to output transients, the

capacitor can become overcharged. On

the other hand, if at high duty cycles

the output is not swinging low enough

to fully recharge the capacitor, then

the top-side gate drive will be starved,

leading to over dissipation.

In the LT1158, the internal charge

pump and boost regulator have been

designed to prevent both under- and

over-drive of the top-side gate, regard-

less of the input duty cycle—up to and

including 100% (DC). With the LT1158,

using N-channel MOSFETs becomes

as painless as using P-channels.

Shoot-Through Unwelcome

Probably the most frustrating ele-

ment to address in a synchronous

MOSFET drive circuit is the timing

between the top and bottom drives to

prevent cross-conduction. Although the

presence of cross-conduction or “shoot-

through” currents can lead in extreme

cases to catastrophic heating, it usu-

ally causes only a puzzling reduction of

several percent in efficiency. Since

efficiency is the reason for using syn-

chronous switching in the first place,

it’s rather frustrating when it keeps

slipping through your (hot) fingers.

Present techniques rely on fixed de-

lay times to create a dead-time be-

tween conduction of the top and bottom

MOSFETs. Although this can be made

to work, the delay time must take into

account temperature changes, supply

variations, and production tolerances

of the MOSFETs

and other compo-

nents. And if the driver can’t hold the

gate low against output-voltage

–

V+

RGATE

BOOTSTRAP

CAPACITOR

BOOST DRIVE

BOOST

DRIVE

FEEDBACK

SENSE +

SOURCE

SENSE –

DRIVE

FEEDBACK

RSENSE

TO

LOAD

RGATE

BOT.

GATE

DR.

CURRENT

LIMIT

TOP

GATE

DR.

CHARGE

PUMP/

BOOST

REG.

CONTROL

LOGIC

INPUT

DC-100kHz

FAULT

CEN

ENABLE

1158_1. eps

Figure 1. LT1158 block diagram with pins shown in actual package sequence

Linear Technology Magazine Vol. 2, No. 1, February 1992

DESIGN FEATURES

OUTPUT CURRENT (A)

EFFICIENCY (%)

24 810

1158_3. eps

Schottky diode across the bottom

MOSFETs reduces reverse-recovery

losses. Figure 3 shows the operating

efficiency for the Figure 2 circuit.

Switching regulator applications can

take advantage of an important pro-

tection feature of the LT1158: remote

fault sensing. By sensing the current

on the output side of the inductor and

returning the LT1158 fault pin to the

PWM soft-start pin, a true current-

mode loop is formed. The Figure 2

circuit regulates maximum current in

the inductor to 15A with no output

voltage overshoot upon recovery from

a short circuit.

Designing in Ruggedness

The output of a bridge circuit driv-

ing multiple-ampere inductive loads

can be a very ugly signal to couple

back into a hapless IC. Although

MOSFETs contain integral catch di-

odes which conduct during the dead-

time, slow turn-on times and wiring

inductances can result in spikes of

several volts below ground or above

supply. The LT1158 source pin and

both sense pins have been designed to

take repetitive output transients 5V

outside the supply rails with no dam-

age to the part. This saves the expense

slew-rate-induced currents, transient

shoot-through will occur.

The LT1158 uses an adaptive sys-

tem that maintains dead-time

independent of the type, the size, and

even the number of MOSFETs being

driven. It does this by monitoring the

gate turn-off to see that it has fully

discharged before allowing the oppo-

site MOSFET to turn on (see Figure 1).

During turn-on, the hold-off capabil-

ity of the opposing driver is boosted to

prevent transient shoot-through. In

this way, cross-conduction is com-

pletely eliminated as a design con-

straint.

The high efficiency 10A step-down

(buck) switching regulator shown in

Figure 2 illustrates how different sized

MOSFETs can be used without having

to worry about shoot-through cur-

rents. Since 24V is being dropped

down to 5V, the duty cycle for the

switch (top MOSFET) is only 5/24 or

21%. This means that the bottom

MOSFET will dominate the R

DS(ON)

effi-

ciency losses, because it is turned on

nearly four times as long as the top.

Therefore a smaller MOSFET is used

on the top, and the bottom MOSFET is

doubled up, all without having to worry

about dead-time. The non-critical

of adding high current Schottky diode

clamps.

MOSFET protection schemes usu-

ally rely on detecting either excess

current or excess drain-to-source

voltage (V

). The LT1158 current-

limit strategy combines the best fea-

tures of current sensing and V

sensing. Current limit is set by the

voltage drop across the current shunt

SENSE

, shown in Figure 1. However,

as long as the voltage drop across the

top MOSFET and R

SENSE

is less than

1.2V (representing a relatively low dis-

sipation state for the MOSFET), higher

current is allowed to flow. This allows

Figure 3. Operating efficiency for Figure

2 circuit. Current limit is set at 15A

LT1158 continued from page 3

REF

COMP

LT3525

1158_2. eps

0.1µF

BST

B DR

FAULT

LT1158

30kΩ

4.7kΩ

–

7mΩ

L1*

70µH5V/10A

OUT

(2) 1000µF

LOW ESR

MBR340

(2) IRFZ44

*1 1/4" MP CORE 14GA WIRE

24V IN

IRFZ34

1N4148

(2) 500µF

LOW ESR

B FB

SEN–

SEN+

SRC

T FB

T DR

BST

1N4148

INVNI

SOFT-ST

0.1µF

4.7kΩ

1µF

0.01µF

2.4kΩ

5µF

OSC

= 25kHz

10kΩ

Figure 2. 50W high efficiency switching regulator illustrates the design ease afforded by adaptive dead-time generation

Linear Technology Magazine • February 1992

DESIGN FEATURES

Figure 4b. Proection logic stops motor if either side is shorted to ground

1158_4A. eps

0.1µF

B DR

LT1158

BAT85

IRFZ34

10V-30V

IRFZ34

1N4148

(2) 500µF

LOW ESR

B FB

SEN–

SEN+

SRC

T FB

T DR

BST

BST

DR 15Ω

15Ω

15mΩ

2.4k 2.4k

15mΩ

0.1µF1N4148

BAT85

IRFZ34 15Ω

B DR

LT1158

B FB

SEN–

SEN+

SRC

T FB

T DR

BST BST

IRFZ34 15Ω

ININ

1/2

74HC132

PWM

INPUT

Figure 4a. 10A locked anti-phase full-bridge circuit operates over wide supply range

to allow it to serve as a protection

timer. With the fault and enable pins

connected, the LT1158 will shut down

both MOSFETs in the event of a fault

and retry each time the enable capaci-

tor C

recharges by 1.5V.

The flexibility of the LT1158 current

limit allows other protection schemes

to be implemented. Figure 4 illustrates

a locked anti-phase motor drive in

which the motor stops if either side is

shorted to ground (since a 50% input

duty cycle is used to stop the motor in

normal operation, the motor would

accelerate to half speed with one side

shorted). When a fault is detected by

either LT1158, the Figure 4b latch is

long time constant, high-inrush loads,

such as high-inertia motors, to be

started. When the voltage drop across

SENSE

exceeds 110mV with more than

1.2V across the MOSFET (as in the

case of a short), the fault pin conducts.

If both the input and enable pins

remain high during a short, the LT1158

regulates the top MOSFET current to a

value of 150mV/R

SENSE

while awaiting

a shutdown command. Shutdown can

be performed by an external controller,

or it can be performed locally by con-

necting the fault pin to the enable pin

(as in Figure 1). The LT1158 enable pin

has been designed with 1.5V of hyster-

esis and a 25µA pull-up current source

set, disabling both LT1158s. The cir-

cuit periodically tries restarting the

motor at a time interval determined by

and C

. If the short still exists, the

disabled state is resumed within 20µs,

far too short a time to move the motor.

The LT1158 can be used with virtu-

ally any N-channel power MOSFET,

including 5-lead, current-sensing

MOSFETs. This configuration offers

the benefit of lossless current sensing,

since a current shunt is no longer

needed in the source. In addition,

SENSE

increases by a factor of 1000 or

more: from milliohms to ohms. The

LT1158 can also be used with logic-

level MOSFETs for operation as low as

4.5V if a Schottky boost diode is used

and connected directly to supply.

Conclusion

The LT1158 N-channel power

MOSFET driver anticipates all of the

major pitfalls associated with the de-

sign of high efficiency bridge circuits.

The designed-in ruggedness and nu-

merous protection features make the

LT1158 the best solution for 5 to 30V,

medium-to-high-current synchronous

switching applications.

0.01µF

1/2 74HC132

+5V

FROM LT1158

FAULT PINS



0.1µF1N4148



150k

TO LT1158

ENABLE PINS

1158_4B. eps

Linear Technology Magazine Vol. 2, No. 1, February 1992

DESIGN FEATURES

Figure 1. Micropower design of the ADC’s BiCMOS comparator achieves a 33kHz

sample rate on 100µA of supply current. Automatic power shutdown between conver-

sions saves power as sample rate is reduced

The LTC1096/1098: Micropower,

SO-8 Packaged ADCs Draw 100µA at

33kHz, 3µA at 1kHz by William Rempfer

LTC’s new 8-bit micropower,

switched-capacitor ADCs typically

draw only 100µA of supply current

when sampling at 33kHz. Supply cur-

rent drops linearly as the sample rate

is reduced. At a 1kHz sample rate, the

supply current is 3µA. The ADCs au-

tomatically power down, drawing only

leakage current when not performing

conversions. They are packaged in 8-

pin SO packages and operate on 3V

to 9V supplies or batteries. Both are

fabricated in Linear Technology’s pro-

prietary LTBiCMOS

ΤΜ

process.

MICROPOWER, SO-8,

SAMPLING 8-BIT ADCs

As Figure 1 shows, both the

LTC1096 and the LTC1098 comprise

an 8-bit, switched-capacitor ADC, a

sample-and-hold, and a serial port.

With typical operating currents of

100µA and automatic shut-down be-

tween conversions, they achieve

extremely low power consumption

over a wide range of sample rates (see

Figure 2). As the sample frequency

decreases, the current drain drops.

Even lower power consumption can

be achieved by operating the ADCs

1096_1. eps

–

MICROPOWER

COMPARATOR

S

A

CAPACITIVE DAC

IN+ (CH0)

IN– (CH1)

BIAS AND

SHUTDOWN CIRCUIT SERIAL PORT

REF

) CS CLK

OUT

REF

)GND

PIN NAMES IN PARENTHESES

REFER TO THE LTC1098.

SAMPLE

CC,

TYP (µA)

100

0.3100 1k 10k 33k

SAMPLE RATE (Hz)

1096_2. eps

on a 3V supply. The LTC1096 oper-

ates from single 3V to 9V supplies

and the LTC1098 operates from 3V to

6V supplies.

Both devices can sample at rates of

up to 33kHz. Figure 3 shows remark-

able sampling performance for a de-

vice that draws only 100µA running

at full speed. Dynamic accuracy of

7.5 bits is maintained up to an input

frequency of 40kHz.

Although they share the same ba-

sic design, the LTC1096 and 1098

differ in some respects. The LTC1096

has a differential input and has an

external-reference input pin. It can

measure signals floating on a DC

common mode voltage and can oper-

ate with reduced spans down to

250mV. Reducing the span allows it

to achieve 1mV resolution. The

LTC1098 has a two-channel input

multiplexer and can convert

either channel with respect to ground

or the difference between the two.

Figure 2. Automatic power shutdown

between conversions allows power con-

sumption to drop with sample rate

(LTBiCMOS is a trademark of Linear Technology

Corporation.)

Linear Technology Magazine • February 1992

DESIGN FEATURES

Figure 3b. Dynamic accuracy is main-

tained up to an input frequency of 40kHz

Figure 3a. This clean FFT of an 11.8kHz

input shows remarkable performance for

an ADC that draws only 100µA when

sampling at its maximum 33kHz rate

continued on page 8

BENEFITS OF THE

LTC1096/98

Lower System Cost

Table 1 summarizes the features of

the LTC1096 and LTC1098. These fea-

tures can reduce system cost in sev-

eral ways. Single-supply operation

means no additional supplies are

needed to power the device. It runs

right off the logic supply (5V or 3.3V).

In battery-powered systems, it can

eliminate the need for a voltage regula-

tor by running straight off the battery.

The internal sample-and-hold saves

the cost of an external sample-and-

hold in sampling systems.

Cheaper, Simpler Power Supplies

A cheaper and simpler power sup-

ply can be designed because of the low

supply current and wide supply-volt-

age range. For example, a simple

capacitive charge pump can provide a

floating supply for the device, as shown

in Figure 8. The on-chip sample-and-

hold saves the power consumption and

extra supply voltages required by

external sample-and-holds.

Longer Battery Life

Tremendous gains in battery life are

possible because of the wide supply-

voltage range, the low supply current,

and the automatic power shut-down

between conversions. Eliminating the

voltage regulator and operating directly

off the battery saves the power lost in

the regulator. At a sample rate of 1kHz,

the LTC1096/8 draws only 3µA of

supply current. This is below the self-

discharge rate of many batteries. As an

example, the circuit of Figure 4a, sam-

pling at 1kHz, will run off a Panasonic

CR1632 3V lithium coin cell for five

years.

The automatic shutdown has great

advantages over the alternative of high-

side switching a higher power ADC, as

shown in Figure 4b. First, no switching

signal or hardware is required. Sec-

ond, power consumption is orders of

magnitude lower with the LTC1096/8.

This is because, when an ADC is high-

side switched, the current consumed

in charging the required bypass ca-

pacitor is large, even at very low sample

rates. In fact, a 10µF bypass capacitor,

high-side switched at only 10Hz, will

consume 500µA!

Smaller Instrument Size

The LTC1096/8 can save board

space in compact designs in a number

of ways. The ADC comes in an SO-8

package. No external sample-and-hold

is needed. The serial I/O requires fewer

PC traces and fewer microprocessor

pins than a parallel-port ADC. The

high-impedance analog inputs and the

reduced span capability can eliminate

op amps and gain stages for many

sensors.

In addition to eliminating op amps

in many cases, the differential inputs

allow the endpoints of the ADC

transfer curve to be adjusted to accom-

modate the limited output swings of

single-supply op amps and other single-

supply circuitry. The LTC1098's

two-channel multiplexer provides a sec-

ond channel to measure another sig-

nal, such as the battery voltage.

Figure 4b. High-side switching a power-

hungry ADC wastes power. Repeatedly

switching the required bypass capacitor

consumes 500µA even when taking

readings at only 10Hz

FREQUENCY (kHz)

–120

AMPLITUDE (dB)

–100

–80

–60

–40

–10

246 16

1096_3a. eps

8101214

–20

–30

–50

–70

–90

–110

LTC1096 FFT

SAMPLE

= 31.25kHz, f

= 11.8kHz

INPUT FREQUENCY (kHz)

EFFECTIVE NUMBER OF BITS (ENOBs)

20 40

1096_3b. eps

LTC1096 EFFECTIVE NUMBER OF BITS vs

INPUT FREQUENCY

SAMPLE

= 31.25kHz

Figure 4a. Sampling at 1kHz, this circuit

draws only 3µA and will run off a

120mAhr CR1632 3V lithium coin cell for

5 years

1098_5b. eps

e.g.

ADC0831

ADC08031

(2.5mA)

C

10µF

+5V

OFF/ON

SAMPLE

= CV f

SAMPLE

1Hz

10Hz 50µA

500µA!

1098_5a. eps

LTC1098

0.1µF 3V

CLK

OUT

CH0

CH1

TO µP

GND

REF

Table 1. LTC1096/8 Features

• Micropower Operation: 40-100µA

Typical Current

• Power Shutdown: 1nA Typical

Shutdown Current

• SO-8 Packaging

• Single Supply 3V-9V Operation

• Sample-and-Hold: 33kHz Sample

Rate and 40kHz Full-Accuracy

Bandwidth

• Reduced Reference Operation to

250mV (LTC1096)

• 2-Channel Input Multiplexer

(LTC1098)

Linear Technology Magazine Vol. 2, No. 1, February 1992

DESIGN FEATURES

Easier Remote or Isolated

Installations

Remote or isolated systems are made

easier for three reasons. First, the serial

data transmission requires fewer wires

than parallel transmission. A system

can be isolated with two opto-isolators,

one to send the clock and one to return

the data. Second, analog signals can be

digitized at the source and sent back in

digital form, increasing noise immunity

and reducing difficulties with analog

isolation. Third, the 3V to 9V single

supply range and the low power con-

sumption makes it easier to get power

to a remote or isolated system. Figure 8

shows a floating system, powered by a

diode-capacitor charge pump and trans-

mitting data with two opto-isolators.

The LTC1096 and 1098 make it

easier to meet the UL and gas regula-

tions, which limit the allowable bypass

capacitor size, by operating with a

smaller bypass capacitor. Improved

power supply rejection and lower cur-

rent allow the use of capacitors as small

as 0.01µF.

Advantages over Microprocessors

with Built-in ADCs

As an alternative, designers of 8-bit

systems can use a microprocessor with

a built in ADC, such as the 68HC11.

The LTC1096/8 can have noise, power,

size, and cost advantages over built-in

ADCs.

The LTC1096 is useful with refer-

ence voltages much lower than 1V.

In contrast, ADCs built into micropro-

cessors can have noise and accuracy

problems as the reference is reduced.

By reducing the LTC1096’s reference, a

system can be designed so that the

ADC is located near the sensor, permit-

ting it to directly digitize the sensor’s

output and transmit digital data to the

microprocessor. This can result

in much lower noise and cost and

smaller size than amplifying and send-

ing analog data to the microprocessor

package. Even in systems where the

signal source is near the microproces-

sor, the noise performance of the

LTC1096 is much better than that of

built-in ADCs.

The power consumption of a system

designed with the LTC1096/8 also can

be much lower than that of a system

with the ADC on the microprocessor. In

many CMOS microprocessors without

ADCs, the supply current can be made

arbitrarily low by reducing the supply

voltage and clock frequency. By putting

the ADC function in the LTC1096/8,

extremely low power consumption can

be achieved because the ADC shuts

down when not taking readings. The

processor can continue to perform op-

erations and timing tasks without any

current being consumed by the ADC.

HOW IT WORKS: THE ADC

DESIGN

The LTC1096 and LTC1098 use a

switched-capacitor, successive-ap-

proximation (SAR) architecture. The

SAR technique provides the best com-

promise among die size, speed, and

power.

Die size must be small in order to

achieve SO-8 packaging. Surprisingly,

speed can be important in micropower

applications that are powered-down

between readings. The faster the sys-

tem can take the required readings, the

less time the power needs to be applied

and the lower the average power con-

sumption will be. Some systems are

powered-up continuously or are con-

strained to long power-on times for

reasons other than ADC conversion

time (for example, sensor settling time).

In these applications, the ADC must

not burn excessive power.

The LTC1096 and 1098 achieve these

goals with a conversion time of 16µs at

an operating supply current of 100µA.

They automatically shut down to 1nA

typically between conversions, as shown

in Figure 5. Adding the power-on wake-

up time and data-transfer time gives a

throughput time of 29µs and a maxi-

mum sample rate of 33kHz.

Comparator

In a switched-capacitor ADC, most

of the power is consumed by the com-

parator. As power is reduced, the pri-

mary concern is to keep the comparator

as fast as possible. There are some

techniques for reducing the power

drain of the DAC, logic, and other

circuitry, but the comparator is the

greatest challenge.

LTC1096 continued from page 7

CLOCK FREQUENCY (Hz)

0.002

SUPPLY CURRENT, I

(µA)

140

100 10k 100k 1M

1098_6. eps

01k

120

100

SUPPLY CURRENT vs CLOCK RATE FOR

ACTIVE AND SHUTDOWN MODES

ACTIVE (CS LOW)

SHUTDOWN (CS HIGH)

= 25°C

= 5V

At the low overdrives typically seen

in ADCs, the comparator delay is domi-

nated by the first stage. This is because

the overdrive for later stages is larger

due to the gain of earlier stages. Figure

6a shows the first stage of a compara-

tor. The delay is related to the input

overdrive, the transconductance (g

) of

the input stage, the capacitive load on

the output of the first stage, and the

required swing from the first-stage-

output clamp voltage to the trip point of

the second stage.

Before major bit decisions, the input

swings far away from zero and the

output of the first stage swings into

the clamp. (The first-stage output is

clamped because the input of

the comparator cannot be clamped

without losing charge from the sample-

and-hold capacitor.) When the DAC

updates, the comparator input will

swing back to zero and slightly beyond.

In the case of an 8-bit ADC, this over-

drive can be as low as 1mV.

Figure 5. After a conversion, when the

microprocessor drives CS high, the ADC

automatically shuts down until the next

conversion. The supply current, which is

very low during conversions, drops to

zero in shutdown

Linear Technology Magazine • February 1992

DESIGN FEATURES

1096_7b. eps

DAC

CHARGE

SUMMING

NODE

continued on page 10

consumes 24µA and has a typical

delay of less than 1µs with an over-

drive of 1mV. The comparator, DAC,

bias circuits, and logic were designed

to operate on supplies as low as 3V.

Compact Design

The LTC1096 and LTC1098 come

in 8-pin DIPs or SO-8 packages. The

serial I/O allows the ADC function to

be put into an 8-pin package. The

SAR architecture, being one of the

most space efficient, results in a

small enough die to fit into an SO-8

package.

WHERE IT IS USED:

APPLICATIONS

The LTC1096/8 can be used in a

wide variety of micropower, low

voltage, or compact systems.

Micropower Systems

The LTC1096 and LTC1098 can be

used in low-power applications. In

continual use, operating at the full

33kHz sample rate, they typically

consume only 100µA of supply cur-

rent. If the sample rate is reduced by

a factor of ten, the supply current will

also drop by a factor of ten, because

the converters shutdown between

conversions. At a 1kHz sample rate,

the supply current is only 3µA.

Battery Powered Systems

The circuit of Figure 4a will sample

at 1kHz for five years powered from a

120mAhr, 3V lithium coin cell. The

CS pin is taken low, a conversion is

performed, and CS is taken back

high. The ADC shuts down and draws

only leakage current until the next

conversion.

3.3V Logic Systems

Figure 7 shows a 3.3V single-sup-

ply system. Most analog blocks (sen-

sors, references, op amps, switches,

and other analog glue chips) can be

found in versions that operate on a

3V supply. The LTC1096 and

LTC1098 fill a need for the A/D con-

verter function in 3V systems. They

join the 10-bit LTC1283 and the 12-

bit LTC1289, providing 3V data con-

version in a wide variety of resolutions.

Remote or Isolated Systems

Figure 8 shows a floating system

that sends data to a grounded host

system. The floating circuitry is

isolated by two opto-isolators and

charge pump. The system has very

low power requirements because the

LTC1096 shuts down between con-

versions and the opto-isolators draw

power only when data is being trans-

The comparator delay is roughly

the time it takes for the first-stage

output to swing from the clamp volt-

age and cross the trip point of the

second stage. Smaller clamp voltage

reduces the delay because the output

need not travel as far to reach the

second-stage trip point. Smaller stray

capacitance, C

, will also reduce de-

lay time.

The current available to charge the

stray capacitance is equal to the input

overdrive times the input-stage g

Increasing the overdrive would speed

up the comparison, but in SAR con-

verters the comparator overdrive is

set by the ADC resolution. The only

way to increase the charging current

is to increase the g

of the input stage.

A BiCMOS input stage was chosen

because bipolar transistors provide

higher g

than MOSFETs. Depend-

ing on bias conditions, the g

of a

bipolar transistor can be orders of

magnitude higher. The bipolar input

transistor must be buffered by a

MOSFET follower to prevent the base

current from discharging the sample-

and-hold capacitor (see Figure 6b).

The composite connection has the g

of a bipolar (required for speed) and

the input leakage of the MOSFET.

(The noise contributed by the

MOSFET is insignificant at the 8-bit

level.) The comparator input stage

Figure 6a. The Bipolar transistor’s much higher g

reduces the micropower

comparator’s delay. At low overdrives, the bipolar transistors can provide

more current to charge the stray capacitance than MOSFETs can

Figure 6b. A MOSFET buffers the critical charge

summing node from the bipolar transistor’s base

current. The composite connection has the g

of the

bipolar and the input leakage of the MOSFET

1096_7a. eps

–

+∆V

–∆V

FOR SMALL OVERDRIVE:

DELAY

= C

∆V

gm V

COMPARATOR

2nd STAGE

Linear Technology Magazine Vol. 2, No. 1, February 1992

DESIGN FEATURES

1096_8. eps

MPU

SYSTEM

LTC1096/8

LT1006

LT1077/8/9

LT1178/9

LT1101

3V LOGIC

3V MICROPROCESSORS

3V MEMORY

–

SENSORS

3.3V

LT1004

APPLICATION HINTS:

MICROPOWER, SINGLE-

SUPPLY DESIGN

Several things must be taken into

account to get the lowest power con-

sumption from these micropower ADCs.

Figure 10 shows the operating sequence

of the LTC1096. The converter draws

power when the CS pin is low and shuts

itself down when that pin is high. In

systems that convert continuously, the

LTC1096/8 will draw its normal oper-

ating power continuously. Figure 5a

shows that the typical current varies

from 40µA at clock rates below 50kHz

to 100µA at 500kHz. A 10µs wake-up

time must be provided to the LTC1096

after each falling CS. (The wake-up

time is invisible on the LTC1098 be-

ferred. The system consumes only

50µA at a sample rate of 10Hz (1ms

on-time and 99ms off-time). This is

easily within the current supplied by

the charge pump running at 5MHz. If

a truly isolated system is required,

the system’s low power simplifies gen-

erating an isolated supply or power-

ing the system from a battery.

Systems that must fit into a small

space can benefit from the SO-8 pack-

aging of the LTC1096/8. Operating

the ADC directly off batteries can

eliminate the space taken by a voltage

regulator. Connecting the ADC di-

rectly to sensors can eliminate op

amps and gain stages. The LTC1096/

8 can also operate with small, 0.1µF

or 0.01µF chip bypass capacitors.

Figure 9 shows a temperature-mea-

surement system. The LTC1096 is

connected directly to the low-cost sili-

con temperature sensor. The voltage

applied to the V

REF

pin adjusts the full

scale of the ADC to the output range

of the sensor. The zero point of the

converter is matched to the zero out-

put voltage of the sensor by the volt-

age on the LTC1096’s negative input.

LTC1096 continued from page 9

Figure 8. Power for this floating ADC system is provided by a simple capacitor-

diode charge pump. The two opto-isolators draw no current between samples,

turning on only to send the clock and receive data

1096_9. eps

LTC1096

+IN

OUT

CLK GND

LT1004-2.5

100k

REF

–IN

ANALOG

INPUT

20k

0.022

0.001µF

2kV

5MHz

4N28

FLOATING SYSTEM

2N3904

CLK

DATA

75k

47µF 0.1µF

1N5817

300Ω

10k

100k

500k

Figure 7. The LTC1096 and LTC1098 fill a need for ADCs in 3V systems. With the 10-Bit

LTC1283 and 12-Bit LTC1289, they provide 3V operation in a wide range of resolutions

Linear Technology Magazine • February 1992

DESIGN FEATURES

To generate a truly single-supply

application, all circuitry must run off a

single supply. Fortunately, there is a

good selection of other components for

single supply applications, including

the LT1006, LT1077/8/9, and LT1178/

9 op amps, the LT1101 instrumenta-

tion amp, the LT1017/8 comparators,

and the LT1004 reference. The input

span of the LTC1096 can be adjusted

above ground to accommodate the lim-

ited output swing of single supply op

amps, as shown in Figure 11.

CONCLUSION

Lower system cost, low power, small

size, and other benefits will help the

LTC1096/8 find their way into a vari-

ety of micropower, low-voltage, bat-

tery-powered, and compact systems.

For more information, refer to the

LTC1096/8 data sheet and applica-

tion notes.

cause of the time consumed by the

input address bits).

In systems that have significant time

between conversions, lowest power

drain will occur with the minimum CS

low time. Bringing CS low, waiting 10µs

for the wake-up time, transferring data

as quickly as possible, and then bring-

ing it back high will result in the lowest

current drain. This minimizes the

amount of time the device draws power.

Even though the device draws more

power at higher clock rates, the net

power is less because the device is on

for a shorter time.

Capacitive loading on the digital out-

put can increase power consumption.

A 100pF capacitor on the D

OUT

pin can

more than double the 100µA supply

current drain at a 500kHz clock fre-

quency. An extra 100µA or so of current

goes into charging and discharging the

load capacitor. The same goes for digi-

tal lines driven at a high frequency by

any logic. The CxVxf currents must be

evaluated and the troublesome ones

minimized.

These converters are very easy to use

because of their low supply current and

good power-supply rejection. Of course,

a ground plane is recommended and

bypass capacitors should be located as

close to the device as possible. For

reduced reference applications, the lay-

out becomes more critical.

Figure 9. The LTC1096’s high-impedance input connects directly to this tempera-

ture sensor, eliminating signal conditioning circuitry in this 0–70° thermometer

Figure 10. The ADC’s power consumption drops to zero when CS goes high. 10µs

after CS goes low, the ADC is ready to convert. For minimum power consumption

keep CS high for as much time as possible between conversions

1196_11. eps

LTC1096

0.1µF

+3V

CLK

OUT

TO µP

–IN

REF

+IN

GND

0.01µF 0.01µF

LT1004-1.2

13.5kΩ

678Ω

LM134

63.4k

182k

75k

POWER DOWN

CLK

OUT

WAKE UP



(10µSEC MIN)

B7 B6 B5 B4 B3 B2 B1 B0

CONVERSION

1096_12. eps

LTC1096 POWER DOWN AND WAKE UP

1096_13. eps

LTC1096

CLK

OUT

TO µP

–IN

REF

+IN

GND

LT1004-1.2

10k

100k

240k

SINGLE

SUPPLY

OP AMP

OP AMP SWINGS

TO 50mV

ZERO POINT

OF ADC SET

AT 50mV

–

Figure 11. The voltage on the negative input sets the zero point of the ADC

at 50mV to accommodate the output-swing limitations of single-supply op

amps

Linear Technology Magazine Vol. 2, No. 1, February 1992

DESIGN FEATURES

The LT1432: 5-Volt Regulator Achieves

90% Efficiency by Carl Nelson

continued on page 19

Power-supply efficiency has become

a highly visible issue in many portable,

battery-powered applications. Higher

efficiency translates directly to longer

useful operating time—a potent selling

point for products such as notebook

computers, cellular phones, data-ac-

quisition units, sales terminals, and

word processors. The “holy grail” of

efficiency for 5V outputs is 90%.

For a number of reasons, older de-

signs were limited to efficiencies of 80

to 85%. High quiescent current in the

control circuitry limited efficiency at

lower output currents. Losses in the

power switch, inductor, and catch di-

ode all added up to limit efficiency at

moderate-to-high output currents.

Each of these areas must be addressed

in a design that is to have high effi-

ciency over a wide output-current

range.

Some portable equipment has the

additional requirement of high effi-

ciency at extremely light loads (1-5mA).

These applications have a “sleep” mode

in which RAM is kept alive to retain

information. The instrument may

spend days or even weeks in this mode,

so battery drain is critical. Ordinary

5V switchers draw quiescent currents

of 5 to 15mA for these light loads. The

efficiency of a 12V to 5V converter with

10mA supply current and 1mA load is

only 4%! Clearly, some method must

be provided to eliminate the quiescent

current of the switching-regulator con-

trol section.

An additional requirement for some

systems is full shutdown of the regula-

tor. It would be ideal if a simple logic

signal could cause the converter to

turn off and draw only a few microam-

peres of current.

The combination of battery form

factor, their discrete voltage steps, and

the use of higher-voltage wall adapters

requires a switching regulator that

operates with inputs from 6V to 30V.

Both of these voltages present prob-

lems for a MOS design because of

minimum and maximum gate-voltage

requirements of power MOS switches.

The LT1432 was designed to ad-

dress all the requirements described

above. It is a bipolar control chip that

interfaces directly to the LT1070 fam-

ily of switching regulators, and is ca-

pable of operating with 6V to 30V

inputs. These ICs have a very efficient

quasi-saturating NPN switch which

mimics the resistive nature of MOS

transistors with much smaller die area.

The NPN is a high frequency device

with an equivalent voltage and current

overlap time of only 10ns. Drive to the

switch is automatically scaled with

switch current, so drive losses are also

low. Switch and driver losses using an

LT1271 with a 12V input and a 5V,

500mA load are only about 2%.

To reduce quiescent-current losses,

the LT1271 is powered from the 5V

output rather than from the input

voltage. This is done by pumping the

supply capacitor, C3, from the output

via D2. Quick minded designers will

observe that this arrangement does

not self-start; accordingly, a parallel

path was included inside the LT1432

to provide power to the IC switcher

directly from the input during start-

up. Equivalent quiescent supply

current is reduced to about 3.5mA

with this technique.

Catch-diode losses cannot be

reduced with IC “tricks” unless the

diode is replaced with a synchronously

driven MOS switch. This is more

expensive, and still requires the diode

to avoid voltage spikes during switch

non-overlap times. The question is, is

it worth it?

1432_1. eps

C1

330µF

35V

C6

0.02µFR1

680Ω

C4

0.1µF

D1

MBR330P

C5

0.03µF

LT1271

GND

C3

4.7µF

TANT

D2

1N4148

L1

50µHR2*

0.013Ω

C2

390µF

16V

OUT

5V, 3A

DIODEV

MODE

LIM

OUT

GND

200pF

< 0.3V = NORMAL MODE

> 2.5V = SHUTDOWN

OPEN = BURST MODE LT1432

MODE INPUT

* R2 IS MADE FROM PC BOARD COPPER TRACES L1 = COILTRONICS CTX 50-3-MP (3A) (305) 781-8900

Figure 1. High efficiency 5V buck converter

Linear Technology Magazine • February 1992

DESIGN FEATURES

The LTC1156 Quad High-Side MOSFET

Driver By Tim Skovmand

The new LTC1156 quad high-side

MOSFET driver is designed to protect

and control four high-side, N-channel

MOSFET switches. N-channel switches

offer the lowest possible R

DSON

, but

require gate voltages higher than the

power supply rail when used in high-

side switching applications. The

LTC1156 generates this higher voltage

completely on-chip. No external ca-

pacitors or inductors are required, and

the four drivers with protection are

housed in a 16-lead SO package.

The LTC1156 was designed with

micropower applications in mind.

Standby current consumption is only

16µA from a 5V supply, and the operat-

ing current per-channel is only 95µA.

No external logic is required to revert to

the standby mode. Each channel is

independently powered and protected

to eliminate interaction between driv-

ers and to ensure the lowest possible

supply-current demand.

Typical Applications

Applications for the LTC1156

include lap-top computer load switch-

ing, cellular-radio power management,

high efficiency H bridge drivers, and

automotive load switching.

Figure 1 illustrates the use of the

LTC1156 in a four-cell NiCad note-

book-computer power system. The first

channel of the LTC1156 generates gate

drive for the extremely low voltage drop

5V regulator made up of Q1 and the

LT1431. Q1 has an R

DSON

of 0.1Ω and

the drain sense resistor adds another

0.03Ω. The voltage drop is simply the

load current times the total series re-

sistance. Therefore, the regulator drops

less than 0.3V at 2A. Or, to put it

another way, the regulator delivers 5V

out with as little as 5.3V in. The other

three switches are powered from the

output of the regulator and control

three 5V loads under microprocessor

control. Q2 and Q3 are both 0.1Ω

MOSFETs and are housed in the same

8-pin SO package. Q4 is two 0.1Ω

MOSFETs connected in parallel to

create a 0.05Ω switch for powering

high-current loads. All of the compo-

nents shown in Figure 1, including the

LTC1156 and the drain-sense current

shunt, are available in surface mount

packaging and therefore consume very

little board space.

Note: Some portable-computer

power-management systems utilize

P-channel MOSFETs for load switch-

ing. Replacing these switches with

protected N-channel MOSFETs can sig-

nificantly reduce power-supply volt-

age drops and guard against

catastrophic MOSFET and printed cir-

cuit board damage.

Figure 1. Four-cell NiCad notebook power-management system

1156_1. eps

5V

LOAD 5V

LOAD HIGH CURRENT

5V LOAD

+4-CELL

NICAD

PACK 47µF

µP

REG ON/OFF

FAULT IN4

IN3

IN2

IN1

DS4

DS3

DS2

VSVS

DS1

GND GND

1N4148

0.1µF

100k

0.1µF36mΩ**

2.8A MAX

IRLR024

SI9956DY

0.1Ω

0.1ΩSI9956DY

0.05Ω

5V/2A

SWITCHED

470µF*

10k

200pF

LT1431

LTC1156

CAPACITOR ESR LESS THAN 0.5Ω

IMS026 INTERNATIONAL MANUFACTURING SERVICES, INC.

(401) 683-9700

*

Q2 Q3

Linear Technology Magazine Vol. 2, No. 1, February 1992

DESIGN FEATURES

Figure 1. LT1103 block diagram

The LT1103/1105 Family of Offline

Switching Regulators

Introduction

Offline power supplies generate well-

regulated DC output voltages from the

AC line and provide isolation as de-

fined by various international safety/

regulatory agencies. The Verband

Deutscher Elektrothniker (VDE) speci-

fications are generally regarded as the

most stringent and a power supply

which meets these guidelines is usu-

ally capable of worldwide operation.

Universal offline power supplies can

accept inputs ranging from 85VAC to

270VAC and can operate without

alterations or switches. Offline power-

supply topologies include the flyback

and the forward converter; both em-

ploy a transformer to convert one

voltage to either a higher or lower

voltage. The output voltage can be of

either polarity and multiple outputs

can be obtained easily by including

additional windings.

To obtain well-regulated output volt-

ages, a feedback path, which senses

the output voltage and which crosses

the isolation barrier, is provided. This

feedback path typically consists of

an opto-isolator along with a voltage

reference and an amplifier. This

configuration provides the most accu-

rate output-voltage regulation at

the expense of numerous discrete

components, board space, aging con-

siderations for the opto-isolator, and

design problems associated with loop

stability, spurious noise pickup, start-

up, and output overshoot.

A simpler method for providing a

feedback path is magnetic flux-sens-

ing. In this mode, the flyback voltage

on the primary winding during “switch-

off” time is sensed and regulated. It is

difficult to derive a feedback signal

directly from the primary flyback volt-

age, as this voltage is several hundred

volts. A common practice is to provide

a lower-voltage auxiliary (or bias) wind-

ing from which the feedback signal is

generated. This bias winding is also

convenient for powering the switching

regulator IC.

by Anthony Bonte

–

15V

GATE BIAS

STARTUP

16V

15V

0VLO

OSC

OSCILLATOR

LOGIC

GATE BIAS

DETECT

SPIKE

BLANK

COMP

4.5V

5V

VREF

SAMPLING

ERROR AMP

gm = 0.012

OVERVOLTAGE

LOCKOUT

2.5V 0.15V

SHUTDOWN

40µA

RESET

SSV

GND

0.15Ω

= 10

CURRENT

LIMIT

AMPLIFIER

ANTI-SAT

DRIVER

1103_1. eps

Linear Technology Magazine • February 1992

DESIGN FEATURES

Practical flux-sensing simplifies the

design of offline power supplies by

minimizing the total number of exter-

nal components. In addition, it

reduces the number of components

which must cross the isolation barrier

to one, the transformer, resulting in

greater safety and reliability. Although

magnetic flux-sensing has been used

in the past, the technique has exhib-

ited poor output-voltage regulation due

to the parasitic elements present in a

transformer-coupled design. Another

problem is that transformers which

provide the safety and isolation re-

quired by VDE also provide the poor-

est output-voltage regulation.

These problems are addressed by a

new family of offline switching regula-

tor ICs. The LT1103 is designed for

high-input-voltage applications using

an external FET whose source is driven

by the open-collector output stage of

the IC. The LT1105 uses a totem pole

output stage that drives the gate of an

external FET. The unique design of the

LT1103/LT1105 eliminates the need

for an opto-isolator while providing

±1% line and load regulation in a

magnetic flux-sensed topology. This

level of performance is achieved with a

novel sampling-error amplifier in the

control loop of the switching regulator.

A block diagram for the LT1103 is

shown in Figure 1. The block diagram

for the LT1105 is identical except for

the totem pole output stage and the

availability of the input to the current-

limit amplifier for use with an external

current-sense resistor.

Theory

A brief review of flyback-converter

operation and the problems which

create a poorly regulated output will

provide insight on how the LT1103/

LT1105 address the issues of mag-

netic flux-sensed converter design. Fig-

ure 2 shows a simplified diagram of a

flyback converter using magnetic flux-

sensing. The parasitic elements present

in the transformer-coupled design are

continued on page 16

Figure 2. Simplified flyback converter

1103_2. eps

VOUT

COMMON

L (lksec)

N = TRANSFORMER TURNS RATIO FROM SECONDARY TO PRIMARY.



N1 = TRANSFORMER TURNS RATIO FROM SECONDARY TO BIAS.



N2 = N/N1



L (lkpri) = PRIMARY LEAKAGE INDUCTANCE.



L (lksec ) = SECONDARY LEAKAGE INDUCTANCE.



RP = LUMPED SUM EQUIVALENT OF SECONDARY WINDING RESISTANCE,

OUTPUT DIODE RESISTANCE AND OUTPUT CAPACITOR RESISTANCE.

1:N

1:N1

VIN

L (lkpri)

VBIAS

FEEDBACK SIGNAL IS DERIVED

FROM BIAS WINDING VOLTAGE

indicated. The relationships between

the primary voltage, the secondary

voltage, the bias voltage, and the wind-

ing currents are indicated in Figures 3

and 4 for continuous and discontinu-

ous modes of operation.

When the switch “turns on,” the

primary winding sees the input volt-

age and the secondary and bias wind-

ings go to negative voltages. Current

builds in the primary as the trans-

former stores energy. When the switch

“turns off,” the voltage across the switch

flies back to a clamp level as defined by

a snubber network until the energy in

the leakage-inductance of the primary

dissipates. Leakage inductance is one

of the main parasitic elements in a

flux-sensed converter; it is modeled as

an inductor in series with the primary

and secondary of the transformer.

These parasitic inductances contrib-

ute to changes in the bias-winding

voltage, and hence in the output volt-

age, with increasing load current. Vari-

ous winding techniques exist for

reducing the leakage inductances of a

transformer. However, VDE require-

ments for safety and isolation effect

these techniques severely and thus

limit their usefulness. The energy

stored in the transformer transfers to

the secondary and bias windings dur-

ing “switch off” time. Ideally, the volt-

age across the bias winding is set by

the DC output voltage, the forward

voltage of the output diode, and the

turns ratio of the transformer (after

the energy in the leakage-inductance

spike of the primary dissipates). This

relationship holds until the energy in

the transformer drops to zero (discon-

tinuous mode) or the switch turns on

again (continuous mode). Therefore,

the voltage on the bias winding is only

valid as a representation of the output

voltage while the secondary is deliver-

ing current.

Although the bias-winding flyback

voltage is a representation of the

output voltage, this voltage is not con-

stant. For a brief period following the

leakage-inductance spike, the bias-

winding flyback voltage decreases due

to nonlinearities and parasitic elements

present in the transformer. Following

this nonlinear behavior is a period

when the bias-winding flyback voltage

decreases linearly. This behavior is

easily explained. Current flow in the

secondary decreases linearly at a rate

determined by the voltage across the

secondary and the inductance of the

secondary. The parasitic secondary-

leakage inductance appears as an im-

pedance in series with the secondary

winding. In addition, parasitic resis-

tances exist in the secondary winding,

Linear Technology Magazine Vol. 2, No. 1, February 1992

DESIGN FEATURES

LT1103 continued from page 15

the output diode, and the output ca-

pacitor. These impedances combine to

form a lumped-sum equivalent and

cause a voltage drop as secondary cur-

rent flows. This voltage drop is coupled

from the secondary to the bias-winding

flyback voltage and becomes more sig-

nificant as the output is loaded more

heavily. The voltage drop is largest at

the beginning of “switch off” time and

smallest just prior to either all trans-

former energy being depleted or the

switch turning on again.

The best representation of the out-

put voltage occurs just prior to either all

transformer energy being used up and

the bias-winding voltage collapsing to

zero or just prior to the switch turning

on again and the bias-winding voltage

going negative. This point in time also

corresponds to the smallest forward

voltage for the output diode. It is pos-

sible to redefine the relationship be-

tween the secondary-winding voltage

and the bias-winding voltage as:

VVVIxR

BIAS OUT f

=++

()

where V

is the forward voltage of the

output diode, I is the current flowing in

the secondary, R is the lumped-equiva-

lent secondary-parasitic impedance and

N1 is the transformer-turns ratio from

the secondary to the bias winding. It is

apparent that even though the above

point in time offers the most accurate

representation of the output voltage,

the answer given by the bias-winding

voltage still differs from the “true” an-

swer by the amount

IxR

Innovation

The LT1103/LT1105 offline switch-

ing regulators provide a solution for

each of the problems in a magnetic flux-

sensed topology and are able to achieve

±1% line and load regulation over a

wide range of line and load conditions.

The answer to these problems is pro-

vided by a unique sampling-error am-

plifier built into the LT1103/LT1105. It

comprises a leakage-inductance spike

blanking circuit, a slew-rate-limited

tracking amplifier, a level detector, a

sample-and-hold, an output transcon-

ductance (g

) stage and load regulation

correction circuitry. When viewed from

a system or block level, the sampling-

error amplifier behaves like a simple

transconductance amplifier. Here’s how

it works.

The feedback network no longer com-

prises a traditional diode/capacitor

peak detector in conjunction with a

resistor divider network. Instead, the

feedback network consists of a diode in

series with the bias-winding, which

feeds the resistor divider network di-

rectly. The resultant error signal is fed

into the input of the error amplifier.

Rather than acting as a peak detector,

the diode in series with the bias wind-

ing serves to prevent the FB pin (input

to the error amplifier) from being pulled

negative and forward biasing the

substrate of the IC when the bias

winding changes polarity with “switch

turn-on.”

The primary-winding leakage-induc-

tance spike effects are first eliminated

with an internal blanking circuit in the

LT1103/1105 which suppresses the

input of the FB pin for 1.5µs at the start

of “switch-off” time. This prevents the

primary-leakage inductance spike from

being propagated through the error

amplifier and affecting the regulated

output voltage. This achieves ±5% regu-

lation, comparable to the performance

of previously available solutions.

With the effects of the leakage-in-

ductance spike eliminated, the effects

of decreasing bias-winding flyback volt-

age can be addressed. With the tradi-

tional diode/capacitor peak-detector

N • V

N2 • V

PRI

∆I

PRIMARY

SWITCH

VOLTAGE

SECONDARY

VOLTAGE

BIAS

WINDING

VOLTAGE

PRIMARY

CURRENT

SECONDARY

CURRENT

SWITCH

CURRENT

1103_3. eps

ZENER

OUT

+ V

+ (I

SEC

• R

)]

OUT

+ V

+ (I

SEC

• R

)]

N  =

PRIMARY FLYBACK VOLTAGE

OUT

+ V

+ (I

SEC

• R

)]

N1 

BIAS FLYBACK VOLTAGE

SEC

= I

PRI

Figure 3. Continuous-mode flyback

converter waveforms

Linear Technology Magazine • February 1992

DESIGN FEATURES

circuitry eliminated from the feedback

network, the tracking amplifier of the

LT1103/LT1105 follows the flyback

waveform as it changes with time and

amplifies the difference between the

flyback signal and the internal refer-

ence. Tracking is maintained until the

bias winding voltage collapses as a

result of all transformer energy being

depleted (discontinuous mode) or the

switch turning on again (continuous

mode). The level-detector circuit senses

the fact that the bias winding flyback

voltage is no longer a representation of

the output voltage and activates an

internal peak detector. This effectively

saves the most accurate representa-

tion of the output voltage, which is

then buffered to the second stage of the

error amplifier.

The second stage of the error ampli-

fier consists of a sample-and-hold. When

the switch “turns on”, the sample-and-

hold samples the buffered error voltage

for 1µs and then holds it for the remain-

der of the switch cycle. This held voltage

is then processed by the output g

stage and converted into a control sig-

nal at the output of the error amplifier

(the V

pin). This tracking and sam-

pling technique improves the output-

voltage regulation from ±5% to ±2–3%.

The final adjustment in regulation

to ±1% or better is provided by the

load-regulation correction circuitry. As

stated earlier, output regulation de-

grades with increasing load current

(output power). This effect is traced to

secondary leakage inductance and

parasitic secondary-winding, diode,

and output-capacitor resistances. Even

though the tracking amplifier has ob-

tained the most accurate representa-

tion of the output voltage, its answer is

still flawed by the amount of the volt-

age drop across the parasitic lumped-

sum equivalent impedance which is

coupled to the bias-winding voltage.

This error increases with increasing

load current. Therefore, a technique

for sensing load-current conditions has

been added to the LT1103/LT1105.

The switch current is proportional to

the load current as defined by the

turns ratio of the transformer. A small

current, proportional to switch cur-

rent, is generated in the LT1103/

LT1105 and fed back to the FB pin.

This allows the input-bias current of

the sampling-error amplifier to be a

function of load current. A resistor in

series with the feedback pin generates

a linear increase in the effective refer-

ence voltage with increasing load

current. This translates to a linear

increase in output voltage with in-

creasing load current. By adjusting

the value of the series resistor, the

slope of the load compensation is ad-

justed and can be set to cancel the

effects of these additional parasitic volt-

age drops. Thus, load regulation can

be improved to ±1% or better.

Conclusion

The new LT1103/LT1105 offline

switching regulators eliminate the need

for an opto-isolator while providing

±1% line and load regulation in a mag-

netic flux-sensed converter. Practical

flux-sensing simplifies the design of

universal offline power supplies, re-

duces the total number of external

components, and provides greater

safety and reliability, as only the trans-

former requires VDE conformance.

Special circuitry built into the LT1103/

LT1105 addresses the problems of pri-

mary-leakage inductance spikes, non-

linear transformer behavior and

parasitic impedances, which are

present in a transformer-coupled de-

sign and which previous switching

regulators have failed to address. There-

fore, the LT1103/LT1105 offline switch-

ing regulators provide an economical

and technological advantage for the

user who needs well-regulated DC out-

put voltages from the AC line.

N • V

N2 • V

PRI

∆I

PRIMARY

SWITCH

VOLTAGE

SECONDARY

VOLTAGE

BIAS

WINDING

VOLTAGE

PRIMARY

CURRENT

SECONDARY

CURRENT

SWITCH

CURRENT

1103_4. eps

ZENER

OUT

+ V

+ (I

SEC

• R

)]

OUT

+ V

+ (I

SEC

• R

)]

N 

PRIMARY FLYBACK VOLTAGE

OUT

+ V

+ (I

SEC

• R

)]

N1 

BIAS FLYBACK VOLTAGE

SEC

= I

PRI

Figure 4. Discontinuous-mode flyback

converter waveforms

Linear Technology Magazine Vol. 2, No. 1, February 1992

DESIGN FEATURES

The LT1124 and LT1125 are new

dual and quad low-noise op amps.

These parts have been optimized for

DC performance, AC precision, and

low noise, and are packaged in sur-

face-mount for optimum performance

per-square-mil of circuit-board area.

Both the 8-pin surface-mount LT1124

and the 16-pin surface-mount LT1125

are equal in specifications to the DIP-

packaged versions.

The LT1124/1125 undergo more

rigorous testing than conventional,

multiple op amps. Each individual

amplifier is tested at room tempera-

ture for 1kHz noise performance and

100kHz gain-bandwidth product. Slew

rate is tested over the specified tem-

perature ranges. This testing is per-

formed for all grades and package

styles. Other manufacturers perform

noise tests using only a single mea-

surement, as shown in Figure 1. When

the amplifiers are connected in series

and a single test is performed, the

noise contributions of the individual

op amps are RMS summed. For a quad

amplifier, the total noise would be:

out = √(e

)

+ (e

)

+ (e

)

+ (e

)

If the LT1125 were tested this way,

the noise limit would be:

√4 x (4.2nV/Hz)

= 8.4nV/(Hz)

1/2

This method has an inherent flaw. If

three of the four op amps have a typical

noise of 2.7nV/(Hz)

1/2

, and the fourth

op amp is contaminated and has

6.9nV/(Hz)

1/2

noise, which is 64% over

the 4.2nV/(Hz)

1/2

limit, the result

would be:

RMS sum = √(2.7)

+ (2.7)

+ (6.9)

= 8.33nV/(Hz)

1/2

This part passes the test, but should

it be sold? Clearly, a combined ampli-

fier noise test, although better than a

sample test or no test at all, is not an

effective screen. This is why multiple

op amps should be tested individually

for noise. Thorough test procedures

and tighter specifications make the

LT1124/1125 stand out from the com-

petition. Traditionally, dual and quad

op amp performance is degraded rela-

tive to the performance of single op

amps. For the LT1124/25, this is not

the case. Table 1 summarizes the per-

formance of the LT1124/1125 com-

pared to the low-cost grades available

from other manufacturers. The com-

parison shows that the specifications

of the LT1124/1125 not only equal

those of the industry-standard OP-27,

but are, in most cases, superior.

For applications requiring higher

slew rates or gain-bandwidth prod-

ucts, decompensated versions of these

parts are available. The LT1126 (dual)

and the LT1127 (quad) offer slew rates

of 11V/µs and gain-bandwidth prod-

ucts of 65MHz, while maintaining the

he LT1124/1125: What’s New in

Precision, High-speed Op Amps

by Alexander Strong

same noise specifications and DC per-

formance as the LT1124/1125. The

LT1126 and LT1127 are stable at a

gain of ten or more. The LT1124/25

and LT1126/27 families are compen-

sated to maximize gain over the audio

range. The maximum gain at 20kHz is

53dB for the LT1124/1125 and 67dB

for the (Av = 10 stable) LT1126/27.

High closed-loop gain makes this fam-

ily of op amps an excellent choice for

low-distortion signal processing. The

combination of low distortion and low

noise puts the LT1124/25/26/27

ahead of the competition in precision

applications. Figure 2 shows a com-

parison of the LT1124, the LT1126,

the OP-270, and the industry-stan-

dard OP-27 single.

Figure 1. Competing quad op amp noise-test method

Figure 2. Total harmonic distortion plus

noise vs frequency comparison

All of the amplifiers have high DC

gains and low noise characteristics

which make them good choices for

applications under 200Hz. The LT1124

has better gain linearity and the same

distortion as the OP-270 at 10 x the

frequency. Also it has superior gain-

bandwidth when compared to the OP-

27 single. For higher performance in

gains of ten or more, the LT1126 out

performs them all.

1124_1. eps

DOUT

–

FREQUENCY (Hz)

TOTAL HARMONIC DISTORTION + NOISE (%)

0.010

0.1

20 1k 10k 20k

1124_2. eps

100

0.001

0.0001

= –10

= 20Vpp

= 2k

MEASUREMENT BANDWIDTH = 

10Hz TO 80kHz

LT1126

OP27

OP270

LT1124

continued on page 19

Linear Technology Magazine • February 1992

DESIGN FEATURES

The following formula was devel-

oped to calculate the improvement in

efficiency when adding a synchronous

switch.

Efficiency change = (VIN - VOUT)(Vf - RFET x IOUT)(E)2

)(V

OUT

)

With V

= 10V, V

OUT

= 5V, V

(diode

forward voltage) = 0.45V, R

FET

= 0.1Ω,

and I

OUT

= 1A, the improvement in

efficiency is only 2.8%. This does not

take into account the losses associated

with MOS gate drive, so real improve-

ment would probably be closer to 2%.

The availability of low-forward-voltage

Schottky diodes such as the MBR330P

makes synchronous switches less at-

tractive than they used to be.

To achieve higher efficiency during

“sleep,” the LT1432 has a burst mode.

In this mode, the LT1271 is either

driven full on or completely shut down

to its micropower state. The LT1432

acts as a comparator with hysteresis

instead of a linear amplifier. This mode

reduces equivalent input supply cur-

rent to 1.3mA with a 12V battery. Bat-

tery life with NiCad AA cells is over 300

hours with a 1mA 5V load.

Burst mode increases output ripple,

especially with higher output currents,

LT1432 continued from page 12

so maximum load in this mode is

100mA.

The LT1271 normally draws about

50–100µA in its shutdown state. A shut-

down command to the LT1432 opens

all connections to the LT1271 V

pin,

so its current drain is eliminated. This

leaves only the shutdown current of the

LT1432 and the switch leakage of the

LT1271, which typically add up less

than 20µA—less than the self-discharge

rate of NiCad batteries. For many appli-

cations, the on/off function is under

keystroke control. Digital chips which

draw only a few microamps are avail-

able for keystroke recognition and power

control.

There is no way to design around

inductor losses. These losses are mini-

mized by using low-loss cores such as

molypermalloy or ferrite, and by sizing

the core to use wire with sufficient

diameter to keep resistive losses low.

The 50µH inductor shown has a core

loss of 200mW with type-52 powdered-

iron material, and 28mW with

molypermalloy. For a 1A load this rep-

resents efficiency losses of 4% and

0.56% respectively—a major difference.

Ferrite cores would have even lower

losses than molypermalloy, but the

“moly” has such low losses that ferrites

should be chosen for other reasons,

such as height, cost, mounting, and the

like. DC resistance of the inductor

shown is 0.02Ω. This represents an

efficiency loss of 0.4% at 1A load and

0.8% at 2A. Significant reduction in

these resistance losses would require a

somewhat larger inductor. The choice

is yours.

The LT1432 has a high efficiency

current limit, with a sense voltage of

only 60mV. This has a side benefit in

that printed circuit board trace mate-

rial can be used for the sense resistor. A

3A limit requires a 0.02Ω sense resistor

and this is easily made from a small

section of serpentine trace. The 60mV

sense voltage has a positive tempera-

ture coefficient that tracks that of cop-

per, so that the current limit is flat with

temperature. Foldback current limit-

ing can be easily implemented.

The LT1432 represents a significant

improvement in high efficiency 5V sup-

plies that must operate over a wide

range of load currents and input volt-

ages. Its efficiency has a very broad

peak that exceeds 90%, requiring a new

definition of the “holy grail.” Logic con-

trolled shutdown, milli-power burst

mode, and efficient, accurate, current

limiting make this new regulator ex-

tremely attractive for battery-powered

applications.

LT1124 continued from page 18

LT1124CN8

PARAMETER/UNITS LT1125CN OP-27 GP OP-270 GP OP-470 GP UNITS

Voltage Noise, 1kHz 4.2 4.5 – 5.0 nV/√Hz

100% Tested Sample Tested No Limit Sample Tested

Slew Rate 2.7 1.7 1.7 1.4 V/µs

100% Tested Not Tested

Gain-Bandwidth Product 8.0 5.0 – – MHz

100% Tested Not Tested No Limit No Limit

Offset Voltage LT1124 100 100 250 – µV

LT1125 140 – – 1000 µV

Offset Current LT1124 20 75 20 – nA

LT1125 30 – – 30 nA

Bias Current 30 80 60 60 nA

Supply Current/Amp 2.75 5.67 3.25 2.75 mA

Voltage Gain, R

= 2k 1.5 0.7 0.35 0.4 V/µV

Common Mode Rejection Ratio 106 100 90 100 dB

Power Supply Rejection Ratio 110 94 104 105 dB

S8 Package Yes - LT1124 Yes No –

Table LT1124/1

Table 1. Performance Comparison

Guaranteed performance, V

= ±15V, T

= 25°C, low cost devices.

Linear Technology Magazine Vol. 2, No. 1, February 1992

DESIGN FEATURES

the LTC1292 is to compensate for the

loading of the bridge by resistor R

Full scale can be adjusted by the 500kΩ

trim pot and offset can be adjusted by

the 100Ω trim pot in series with R

. A

lower R

PLAT

value than that in AN43 is

used here to improve dynamic range.

The signal voltage on the +IN pin must

not exceed V

REF

. The differential volt-

age range is V

REF

minus approximately

100mV. This is enough range to mea-

sure 0°C to 400°C with 0.1°C

resolution.

The circuit in Figure 2 demonstrates

how to float the LTC1292 to make a

differential measurement. This circuit

will digitize a 5V range from 10V to 15V

with 12-bits of resolution. The digital

I/O has been level translated. The

LT1019-5 is used in shunt mode to

create the floating analog ground for

the LTC1292. The digital I/O lines

make use of 4.3V zeners to clamp the

single-transistor inverters. Opto-iso-

lators can also be used. The floating

Introducing the LTC1292: 12-Bit, 8-Pin,

Serial-I/O Data Acquisition System

The LTC1292 is a 12-bit data acqui-

sition system that contains a 12-bit,

switched-capacitor, successive-ap-

proximation A-to-D converter, a differ-

ential input, a sample-and-hold on the

(+) input, and serial I/O. All these

functions are packaged in an 8-pin

DIP. Given its accuracy, ease of use,

and small package size, this device is

well suited for digitizing analog signals

in remote applications where a mini-

mum number of interconnects and

low power consumption are impor-

tant. Three circuits are presented here

to show the capabilities of the device.

The circuit in Figure 1 shows how a

transducer output, such as a plati-

num RTD bridge, can be digitized with

one op amp. This circuit is a modifica-

tion of that found in Application Note

43.

The differential input of the

LTC1292 removes the common mode

voltage. The LT1006 is used for ampli-

fication. The resistor tied between pin

3 of the LT1006 and the +IN input of

analog ground should be laid out as a

ground plane for the LTC1292. The

47µF bypass capacitor should be tied

from the V

pin to the floating ground

plane with minimum lead length and

placed as close to the device as pos-

sible. Likewise, keep the lead length

from the GND pin to the floating ground

plane at a minimum (a low-profile

socket is acceptable).

The circuit in Figure 3 digitizes the

difference in temperature between two

locations. The two LM134s are used as

temperature sensors. These are ide-

ally suited for remote applications be-

cause they are current output devices.

This allows long wires to run from the

sensor back to the LTC1292 without

any degradation to the signal from the

sensor. Resistor R

SET

sets the current

to 1µA/°K. The current is converted to

a voltage by the resistor R1 connected

from V

–

to ground. The reference volt-

age and resistor were selected to give a

change of 0.05°C/LSB. The resolution

by Sammy Lum

Figure 1. 0° to 400°C temperature-measurement system

–

+15V

1µF4.7µF

TANTALUM

500kΩ

400°C

TRIM

12.5kΩ*12kΩ*

100Ω

0°C TRIM



13kΩ** LT1006

1MΩ**

100pF

0.1µF

1MΩ**

–IN

+IN

GND V

REF

OUT

CLK

1N4148

22µF

TANTALUM

SCK

MISO

MPU

(e.g., 68HC11)

LTC1292

PLAT



100Ω RTD

AT 0°C

100Ω*

TRW-IRC MAR -6 RESISTOR -0.1%

1% METLA FILM RESISTOR

PLAT

= ROSEMOUNT 118MFRTD

*

1292_1. eps

LT1027 +5V

DESIGN IDEAS

Linear Technology Magazine • February 1992

DESIGN FEATURESDESIGN IDEAS

Figure 3. Differential temperature-measurement system

is given by °C/LSB = V

REF

/ ((4096)

(1mA) (R1)). The maximum tempera-

ture at each input is 125°C. Note that if

the temperature on the +IN pin is less

than the temperature on the –IN pin,

the output will be zero. Because the

LTC1292 is being driven from a high

source impedance, you should limit the

CLK frequency to 100kHz or less.

The software code for interfacing the

LTC1292 to the Motorola MC68HC11

or the Intel 8051 is found in the LTC1292

data sheet. The code needs to be modi-

fied for the circuit in Figure 2 to account

for the inversion introduced by the

digital level translators.

Williams, Jim, “Bridge Circuits, Marrying Gain and

Balance,” Application Note 43, Linear Technology

Corp.

+15V

1µF

–IN

+IN

GND V

REF

OUT

CLK

4.7µF

TANTALUM

P1.4

P1.3

P1.1

MPU

(e.g., 8051)

LTC1292

1292_3. eps

LT1027

22µF

TANTALUM

22µF

TANTALUM

–

228Ω*

R1

10kΩ*

–

228Ω*

R1

10kΩ*

LM134

10.2kΩ*

14.7kΩ*

+5V

*1% METAL FILM RESISTOR

–IN

+IN

GND V

REF

OUT

CLK

1N5229

47µF

TANTALUM

LTC1292

1292_2. eps

LT1019-5 1µF

TANTALUM

+5V

1N4148

–INPUT

+INPUT

10V TO 15V

1kΩ2N2222

2N2222

1.5kΩ

1kΩ

1.5kΩ

1kΩ

OUT

GND

1kΩ

1N5229

MPU

(e.g., 8051)

2N3906

+15V

1kΩ

1N4148

DIODES

1.5kΩ

P1.3

P1.1

P1.4

Figure 2. Floating, 12-bit data acquisition system

Linear Technology Magazine Vol. 2, No. 1, February 1992

DESIGN FEATURES

FREQUENCY

–90.00

AMPLITUDE

–50.00

–30.00

0.0

10.000

10k 100K 200K

1063_2. eps

–10.00

–20.00

–40.00

–60.00

–70.00

–80.00

CAPACITOR AT

MAX VALUE CAPACITOR AT

1/2 MAX VALUE CAPACITOR AT

MIN VALUE

DC-Accurate, Programmable-Cutoff,

Fifth-Order Butterworth Lowpass Filter

Requires No On-Board Clock

Figure 1. Schematic diagram of LTC1063 with programmable cutoff frequency

READ

1063_1. eps

–

LTC1063

15k

INPUT

7.5V

.1µF

LT1007

20k

+7.5V

0.1µF

–7.5V

+7.5V

20k

SER CLK 2

SER IN 3

SER OUT

PROG 14

READ

6C1

GND

SCLK

SD IN

PROG

SD OUT

GND

74LS14

74LS05

74LS14

0.01µF

GNDGND

51Ω1k

+5V

74LS05 270Ω

25 PIN

PARALLEL PORT

CONNECTOR

FOR IBM PCs

AND COMPATIBLES

0.1µF

GND

+5V

OUT

0.1µF

GND

PROGRAMMER FOR NON-VOLATILE CAPACITOR, HC2021

NOTES:

1. THE HC2021 SHOULD BE LOCATED CLOSE TO THE LTC1063 FOR BEST RESULTS.

2. +3.5 ≤ V

≤ +18.8.

3. POSITIVE POWER SUPPLY FOR DEVICES 74LS05 AND 74LS14 IS +5V.

4. HUGHES TELEPHONE NUMBER (714) 759-2665.

7.5

+7.5

GND

V–

CLK

OUT

ADJ

OUT

V+

CLK

HC2021

nal resistor and capacitor. The scheme

shown here allows the filter’s cutoff

frequency to be programmed using

an external microprocessor or the

parallel port of a personal computer.

This allows the cutoff frequency of the

filter to be set before the product is

shipped.

The new LTC1063 is a clock-tun-

able, monolithic filter with low-DC

output offset (1mV typical with ±5V

supplies). The frequency response of

the filter closely approximates a fifth-

order Butterworth polynomial.

Most users choose to tune the filter

with an on-board microprocessor

and/or timer. This is quite conve-

nient if these components are avail-

able. If a clock is not available, the

LTC1063 can be tuned with an exter-

by Richard Markell

The tuning scheme makes use of

non-volatile, tunable capacitors avail-

able from Hughes Semiconductor.

These capacitors allow approximately

a decade of tuning range. More range

could be obtained by using dual de-

vices. Figure 1 shows the schematic

diagram of the application. Be sure to

place the variable capacitor as close

as possible to the LTC1063 to mini-

mize parasitic elements. Figure 2

shows the frequency response of the

filter when the capacitor is varied

from minimum to half-value, and then

to maximum capacitance. The pro-

gramming part of the circuit may be

disconnected once the variable ca-

pacitor is set. The capacitor will re-

member its value until it is

reprogrammed.

DESIGN IDEAS

Figure 2. LTC1063 frequency response

Linear Technology Magazine • February 1992

DESIGN FEATURES

New Device Cameos by LTC Marketing

LT1246: 1MHz Current-Mode PWM

Controller

The LT1246 is an improved UC1842-

architecture device that can operate at

switching frequencies up to 1MHz.

The improvements are: It eliminates

output cross conduction and achieves

5x shorter current-sense delay times

(30ns typical), 2x tighter oscillator ac-

curacy, reference tolerance, and drift,

and better than 2x faster output rise/

fall times. Start-up current is 4 x lower

(<250µA). It is equipped with a cur-

rent-sense blanking circuit that elimi-

nates erratic operation and it also has

active PWM output pulldown in un-

der-voltage lockout. The 1MHz switch-

ing frequency allows the use of very

small inductors and capacitors.

LT1117 Adjustable, 800mA, Low-

Dropout Regulator

The LT1117 adjustable, low-drop-

out regulator provides up to 800mA

output current with a 1.0V (typical)

dropout voltage in a compact surface-

mount SOT-223 package. The LT1117

(adjustable) provides the most output

current of any surface-mountable,

low-dropout regulator. Unlike PNP low-

dropout regulators, where up to 10%

of the output current flows to ground

as quiescent current, the LT1117 qui-

escent current flows to the load, rais-

ing efficiency.

Dropout voltage is a function of

load current and is guaranteed to be

1.2V maximum at 800mA load cur-

rent. Dropout voltage decreases with

lower output currents. The LT1117

reference is trimmed to ±1%. The

LT1117 has output-current limiting to

minimize stress during overload

conditions. Fixed 2.85 and 5V ver-

sions are available for SCSI-2 and

other applications.

driving applications. This driving

capability is achieved using a tech-

nique which senses the load induced

output pole and adds compensation at

the amplifier gain node.

LT1217: Low Power, 10MHz

Current-Feedback Amplifier

The LT1217 offers high speed along

with excellent DC accuracy. The 10MHz

bandwidth, 500V/µs slew rate, and

fast settling time of only 280ns (to

0.1%) is complemented by a DC offset

voltage of only 1mV. Manufactured on

Linear Technology’s proprietary

complementary-bipolar process, the

LT1217 draws only 1mA of quiescent

current. The LT1217 also features a

shutdown mode that reduces supply

current to 350µA.

The LT1217 has a high gain- band-

width product at high gains. The

bandwidth is over 1MHz at a gain of

100. With a 50mA guaranteed mini-

mum output current, the LT1217 is

excellent for driving cables or other

low-impedance loads. The LT1217 op-

erates on supplies from ±5V to ±15V

and can drive a 2kΩ load to ±13V with

±15V supplies.

LT1217 applications include high-

speed buffers, wide-band amplifiers,

multi-stage active filters, high-speed

data acquisition systems, and video

amplifiers. The LT1217 comes in the

industry-standard pinout and can up-

grade the performance of many older

products.

For further information on the above

or any other devices mentioned in this

issue of Linear Technology, use the

reader service card or call the LTC

literature service number: (800) 637-

5545. Ask for the pertinent data sheets

and application notes.

Information furnished by Linear Technology Corpo-

ration is believed to be accurate and reliable. How-

ever, no responsibility is assumed for its use. Linear

Technology Corporation makes no representation

that the circuits described herein will not infringe on

existing patent rights.

Single, 3V Supply Family of 10-Bit

and 12-Bit A/D Converters

LTC leads the pack in 3V-supply

A/D converters with three new

products— the LTC1283 and 1289

10-bit and 12-bit serial-output A/Ds

with 8-channel input MUX and sample-

and-hold; and the LTC1287, a 12-bit,

serial-output A/D with a differential

input. All three devices are guaranteed

to operate on supply voltages as low as

2.7 volts.

The LTC1289 and LTC1283 allow

the input MUX to be software

configured for either single-ended or

differential inputs (or combinations of

both). An on-chip sample-and-hold is

provided for all single-ended input

channels. The LTC1289 can be put

into a power shutdown state in which

it consumes only 5µA of supply

current.

All three devices feature a three- or

four-wire serial interface that commu-

nicates directly to most controllers

and microprocessors.

LT1200: High-Speed Op Amp with

Low Power Consumption

The LT1200 is a unity-gain-stable

op amp which combines low-power

operation with high speed and excel-

lent DC characteristics. Its 50V/µs

slew rate, 11MHz gain-bandwidth

product, 430nA settling time (to 0.1%),

and 1mA supply current make the

LT1200 an ideal choice for applica-

tions where power is at a premium.

Excellent DC specifications (1mV maxi-

mum V

, 100nA maximum I

) and

high gain (6 V/mV) combined with the

fast settling, enable the LT1200 to be

used for fast data acquisition systems.

The output can drive a 2kΩ load to

±12 volts with a ±15 volt supply and

can drive 500Ω to ±3 volts on ±5 volt

supplies. The circuit is stable with all

capacitive loads, a property which

makes it useful as a buffer or in cable-

NEW DEVICE CAMEOS

Linear Technology Magazine Vol. 2, No. 1, February 1992

DESIGN FEATURES

DESIGN TOOLS

Applications on Disk

NOISE DISK

This IBM-PC (or compatible) progam allows the user to

calculate circuit noise using LTC op amps, determine the

best LTC op amp for a low noise application, display the

noise data for LTC op amps, calculate resistor noise, and

calculate noise using specs for any op amp.

SPICE MACROMODEL DISK

This IBM-PC (or compatible) high density diskette contains

the library of LTC op amp SPICE macromodels. The

models can be used with any version of SPICE for general

analog circuit simulations. The diskette also contains work-

ing circuit examples using the models, and a demonstration

copy of PSPICE

by MicroSim.

FILTERCAD DISK

FilterCAD is a menu-driven filter design aid program which

runs on IBM-PCs (or compatibles). This collection of design

tools will assist in the selection, design, and implementation

of the right switched capacitor filter circuit for the application

at hand. Standard classical filter responses (Butterworth,

Cauer, Chebyshev, etc.) are available, along with a CUS-

TOM mode for more esoteric filter responses. SAVE and

LOAD utilities are used to allow quick performance com-

parisons of competing design solutions. GRAPH mode,

with a ZOOM function, shows overall or fine detail filter

response. Optimization routines adapt filter designs for

best noise performances or lowest distortion. A design time

clock even helps keep track of on-line hours.

Technical Books

Linear Databook — This 1,600 page collection of data

sheets covers op amps, voltage regulators, references,

comparators, filters, PWMs, data conversion and interface

products (bipolar and CMOS), in both commercial and

military grades. The catalog features well over 300 devices.

$10.00

Linear Applications Handbook — 928 pages chock full of

application ideas covered in-depth through 40 Application

Notes and 33 Design Notes. This catalog covers a broad

range of “real world” linear circuitry. In addition to detailed,

systems-oriented circuits, this handbook contains broad

tutorial content together with liberal use of schematics and

scope photography. A special feature in this edition in-

cludes a 22-page section on SPICE macromodels.

$20.00

Monolithic Filter Handbook — This 232 page book comes

with a disk which runs on PCs. Together, the book and disk

assist in the selection, design and implementation of the

right switched capacitor filter circuit. The disk contains

standard filter responses as well as a custom mode. The

handbook contains over 20 data sheets, Design Notes and

Application Notes. $40.00

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