SEMICONDUCTOR
11-52
August 1997
HI-1818A, HI-1828A
Low Resistance, Single 8-Channel, and
Differential 4-Channel, CMOS Analog Multiple x er s
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1997 File Number 3141.1
Features
• Signal Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+15V
• “ON” Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . .250Ω
• Input Leakage (Max) . . . . . . . . . . . . . . . . . . . . . . . .50nA
• Access Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . .350ns
• Power Consumption . . . . . . . . . . . . . . . . . . . . . . . .5mW
• DTL/TTL Compatible Address
• Operation . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Applications
• Data Acquisition Systems
• Precision Instrumentation
• Demultiplexing
• Selector Switch
Description
The Hl-1818A and HI-1828A are monolithic, high
performance CMOS analog multiplexers offering built-in
channel selection decoding plus an inhibit (enable) input for
disabling all channels. Dielectric Isolation (Dl) processing is
used for enhanced reliability and performance (see Applica-
tion Note 521). Substrate leakage and parasitic capacitance
are much lower, resulting in extremely low static errors and
high throughput rates. Low output leakage (typically 0.1nA)
and low channel ON resistance (250Ω) assure optimum
performance in low level or current mode applications.
The HI-1818A is a single-ended, 8-Channel multiplexer, while
the HI-1828A is a differential 4-Channel version. Either device
is ideally suited f or medical instrumentation, telemetry systems,
and microprocessor based data acquisition systems.
For MIL-STD-883 compliant parts, request the HI-1818A/883;
HI-1828A/883 data sheet.
Pinouts
HI-1818A (CERDIP, PDIP)
TOP VIEW HI-1828A (CERDIP, PDIP)
TOP VIEW
HI-1818A (PLCC)
TOP VIEW HI-1828A (CLCC, PLCC)
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
ADDRESS A1
+5V SUPPLY
ENABLE
ADDRESS A2
IN 8
IN 7
IN 5
IN 6
ADDRESS A0
+VSUPPLY
IN 1
OUT
IN 2
IN 3
IN 4
-VSUPPLY
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
ADDRESS A1
+5V SUPPLY
ENABLE
OUT 5 THRU 8
IN 8
IN 7
IN 5
IN 6
ADDRESS A0
+VSUPPLY
IN 1
OUT 1 THRU 4
IN 2
IN 3
IN 4
-VSUPPLY
193 2 201
15
16
17
18
14
910 11 12 13
4
5
6
7
8
A2
NC
IN 8
IN 7
ENABLE
IN 6
IN 5
NC
IN 4
IN 3
IN 1
NC
OUT
IN 2
+VSUPPLY
+5V
A1
NC
A0
-VSUPPLY
193 2 201
15
16
17
18
14
910 11 12 13
4
5
6
7
8
OUT 5 THRU 8
NC
IN 8
IN 7
ENABLE
IN 6
IN 5
NC
IN 4
IN 3
IN 1
NC
OUT 1 THRU 4
IN 2
+VSUPPLY
+5V
A1
NC
A0
-VSUPPLY
11-53
Ordering Information
PART NUMBER TEMP.
RANGE (oC) PACKAGE PKG.
NO.
HI3-1818A-5 0 to 75 16 Ld PDIP E16.3
HI1-1818A-2 -55 to 125 16 Ld CERDIP F16.3
HI1-1818A-5 0 to 75 16 Ld CERDIP F16.3
HI4P1818A-5 0 to 75 20 Ld PLCC N20.35
HI1-1818A/883 -55 to 125 16 Ld CERDIP F16.3
HI1-1828A-5 0 to 75 16 Ld CERDIP F16.3
HI1-1828A-7 0 to 75 + 96
Hour Burn-In 16 Ld CERDIP F16.3
HI3-1828A-5 0 to 75 16 Ld PDIP E16.3
HI1-1828A-2 -55 to 125 16 Ld CERDIP F16.3
HI1-1828A/883 -55 to 125 16 Ld CERDIP F16.3
HI4-1828A/883 -55 to 125 20 Ld CLCC J20.A
PART NUMBER TEMP.
RANGE (oC) PACKAGE PKG.
NO.
Functional Block Diagrams
HI-1818A
HI-1828A
N
A0A1A2ENABLE
DI
G
ITAL ADDRE
SS
ENABLE
BUFFER
DECODERS P
MULTIPLEX
SWITCHES
N P
IN 1
OUT
IN 8
ADDRESS
INPUT
BUFFERS
N
A0A1ENABLE
ENABLE
BUFFER
DECODERS P
MULTIPLEX
SWITCHES
N P
IN 1
OUT 1-4
IN 4
ADDRESS
INPUT
BUFFERS
N P
N P
IN 5
OUT 5-8
IN 8
HI-1818A, HI1828A
11-54
Schematic Diagrams
All N-Channel Bodies to V-
All P-Channel Bodies to V+
Unless Otherwise Specified
ADDRESS INPUT BUFFER
All N-Channel Bodies to V-
All P-Channel Bodies to V+
A2 or A2 not used for
HI-1828A
ADDRESS DECODER
All N-Channel Bodies to V-
All P-Channel Bodies to V+
Unless Otherwise Specified
MULTIPLEXER SWITCH
N9
P9
N10
P10
N8
P8
N7
P7
N6
P6
N5
N4
N3
V-
N1
P1
P2
N2
P5
P4
VCC
V+
V-
ADDRESS
INPUT
D1
D2
200Ω
P3
A
A
V+
V-
A0 OR
A0
N14
N13
A1 OR
A1
N12N11
A2 OR
A2
EN
P14
P13
P12
P11
N15
P15
N16
P16
TO P-CHANNEL
SWITCH
TO N-CHANNEL
SWITCH
IN SWITCH CELL
V+
N18
N17
N19
P17
P18
FROM DECODE
FROM DECODE
V+
OUTIN
HI-1818A, HI1828A
11-55
Absolute Maximum Ratings (Note 1) Thermal Information
Voltage Between Supply Pins. . . . . . . . . . . . . . . . . . . . . . . . . .40.0V
Logic Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30.0V
Analog Input Voltage:
+VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +VSUPPLY +2V
-VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -VSUPPLY -2V
Digital Input Voltage . . . . . . . . . . . . . . . . . . .-VSUPPLY to +VSUPPLY
Operating Conditions
Temperature Ranges
HI-1818A/HI-1828A-2 . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
HI-1818A/HI-1828A-5, -7 . . . . . . . . . . . . . . . . . . . . . .0oC to 75oC
Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W)
CERDIP Package . . . . . . . . . . . . . . . . 85 32
CLCC Package . . . . . . . . . . . . . . . . . . 80 28
PDIP Package . . . . . . . . . . . . . . . . . . . 100 N/A
PLCC Package . . . . . . . . . . . . . . . . . . 80 N/A
Junction Temperature
CERDIP, CLCC Packages. . . . . . . . . . . . . . . . . . . . . . . . . . 175oC
PDIP, PLCC Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range
PDIP, PLCC Packages. . . . . . . . . . . . . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300oC
(PLCC - Lead Tips Only)
CA UTION: Stresses abo v e those listed in “Absolute Maximum Ratings” ma y cause permanent damage to the de vice. This is a stress only rating and oper ation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications Supplies = +15V, -15V, +5V; VAL = 0.4V, VAH = 4.0V, Unless Otherwise Specified
PARAMETER TEST
CONDITIONS TEMP
(oC)
HI-1818A/1828A -2, -8 HI-1818A/1828A -5, -7
UNITSMIN TYP MAX MIN TYP MAX
SWITCHING CHARACTERISTICS
Access Time, TA(Note 4) 25 - 350 500 - 350 - ns
Full - - 1000 - - 1000 ns
Break-Before-Make Delay 25 - 25 - - 100 - ns
Settling Time
0.1% 25 - 1.08 - - 1.08 - µs
0.025 % 25 - 2.8 - - 2.8 - µs
Channel Input Capacitance, CIN 25 - 4 - - 4 - pF
Channel Output Capacitance, COUT -
HI-1818A 25 - 20 - - 20 - pF
HI-1828A 25 - 10 - - 10 - pF
Drain-To-Source Capacitance, CDS(OFF) 25 - 0.6 - - 0.6 - pF
Digital Input Capacitance, CD25 - 5 - - 5 - pF
Enable Delay (ON), tON(EN) 25 - 300 500 - 300 - ns
Full - - 1000 - - 1000 ns
Enable Delay (OFF), tOFF(EN) 25 - 300 500 - 300 - ns
Full - - 1000 - - 1000 ns
DIGITAL INPUT CHARACTERISTICS
Input Low Threshold, VAL Full - - 0.4 - - 0.4 V
Input High Threshold, VAH (Note 3) Full 4.0 - - 4.0 - - V
Input Leakage Current, IAFull - - 1 - - 1 µA
ANALOG CHANNEL CHARACTERISTICS
Analog Signal Range, VlN Full -15 - +15 -15 - +15 V
ON Resistance, rON (Note 2) 25 - 250 400 - 250 400 Ω
Full - - 500 - - 500 Ω
Input Leakage Current, IS(OFF) Full - - 50 - - 50 nA
On Channel Leakage Current, lD(ON)
Hl-1818A Full - - 250 - - 250 nA
HI-1828A Full - - 125 - - 125 nA
Output Leakage Current, ID(OFF)
HI-1818A Full - - 250 - - 250 nA
HI-1828A Full - - 125 - - 125 nA
HI-1818A, HI1828A
11-56
POWER SUPPLY CHARACTERISTICS
Power Dissipation, PDFull - - 27.5 - - 27.5 mW
Current, I+ Full - - 0.5 - - 0.5 mA
Current, I- Full - - 1 - - 1 mA
Current, ILFull - - 1 - - 1 mA
NOTES:
1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired.
Functional operation under any of these conditions is not necessarily implied.
2. VOUT = ±10V, IOUT = 1mA.
3. To drive from DTL/TTL circuits, 1kΩ pull-up resistors to +5.0V supply are recommended.
4. Time measured to 90% of final output level; VOUT = -5.0V to +5.0V, Digital Inputs = 0V to +4.0V.
Electrical Specifications Supplies = +15V, -15V, +5V; VAL = 0.4V, VAH = 4.0V, Unless Otherwise Specified (Continued)
PARAMETER TEST
CONDITIONS TEMP
(oC)
HI-1818A/1828A -2, -8 HI-1818A/1828A -5, -7
UNITSMIN TYP MAX MIN TYP MAX
±
Switching Waveforms
FIGURE 1A.
NOTE: 1. Similar connections for HI-1828A.
FIGURE 1B. FIGURE 1C.
FIGURE 1. ENABLE DELAY, tON(EN), tOFF(EN)
FIGURE 2A.
NOTE: 1. Similar connections for HI-1828A.
FIGURE 2B. FIGURE 2C.
FIGURE 2. BREAK-BEFORE-MAKE DELAY, tOPEN
VAH = 4.0V
VAL = 0V
OUTPUT
10%
tOFF
(EN)
90%
tON
(EN)
50%
ENABLE DRIVE
+15
VA
+5V
-15 +5.0
+V -V VL
IN 1
IN 2-8
OUT
HI-1818A
200 12.5
Ω
50
Ω
A0
EN
A1
A2
pF
(NOTE 1)
ENABLE DRIVE
2V/DIV.
OUTPUT
2V/DIV.
50ns/DIV.
50%50%
0V
4.0V
ADDRESS
DRIVE (VA)
tOPEN
ADDRESS DRIVE
+15
VA
+5V
-15 +5.0
+V -V VL
IN 1
IN 2
IN 3-8
OUT
HI-1818A
50
Ω
A0
EN
A1
A2
200 12.5
ΩpF
(NOTE 1)
VA INPUT
2V/DIV.
OUTPUT
1V/DIV.
100ns/DIV.
HI-1818A, HI1828A
11-57
Typical Performance Curves
FIGURE 3. ON RESISTANCE vs ANALOG SIGNAL LEVEL FIGURE 4. ON CHANNEL CURRENT vs VOLTAGE
FIGURE 5. LEAKAGE CURRENTS vs TEMPERATURE†FIGURE 6. ACCESS TIME
350
300
250
200
150
100-10 -8 -6 -4 -2 0 2 4 6 8 10
SIGNAL LEVEL (V)
ON RESISTANCE (Ω)
125oC
25oC
-55oC
OUT
IN
V1
V2
1mA
RON = V2
1mA
60
20
0
-20
-40
-60-10-8-6-4-20246810
VOLTAGE ACROSS SWITCH (V)
SWITCHING CURRENT (mA)
40
OUT
V
I
25oC
-55oC
125oC
-55oC
125oC
25oC
OUT
EN
OUT
±10V
EN 4V
+10V
AID(OFF)
±10V
A
IS(OFF)
4V
+10V
OUT
±10V
EN
0.4V
+10V
AID(ON)
A0A1
OFF LEAKAGE ON LEAKAGE
†Tw o measurements per
channel:
+10V/-10V and -10V/+10V
(Two measurements per
device for ID(OFF):
+10V/-10V and -10V/+10V
100nA
10nA
1nA
100pA
10pA25 50 75 100 125
TEMPERATURE (oC)
HI-1818A
ID(ON) - ID(OFF)
HI-1828A
IS(OFF)
HI-1818A
HI-1828A
100ns/DIV.
A0INPUT
2V/DIV.
50Ω
12.5pF
ENA0
ACCESS TIME
† Similar connection for HI-1828A.
A1A2
HI-1818A†
0V T O 4V
IN 3-8
IN 2
IN 1
-5VDC
+5VDC
10
MΩ
PROBE
4V
50%
+5V
OUTPUT
5V/DIV.
-5V
90%
TA
HI-1818A, HI1828A
11-58
Truth Tables
HI-1818A TRUTH TABLE
ADDRESS
“ON” CHANNELA2A1A0EN
LLLL 1
LLHL 2
LHLL 3
LHHL 4
HLLL 5
HLHL 6
HHLL 7
HHHL 8
X X X H None
HI-1828A TRUTH TABLE
ADDRESS
“ON” CHANNELA1A0EN
L L L 1 and 5
L H L 2 and 6
H L L 3 and 7
H H L 4 and 8
X X H None
HI-1818A, HI1828A
11-59
Die Characteristics
DIE DIMENSIONS:
67.7 mils x 103.5 mils
METALLIZATION:
Type: CuAl
Thickness: 16kű2kÅ
PASSIVATION:
Type: Nitride/Silox
Thickness: Silox: 12kű2kÅ, Nitride: 3.5kű1kÅ
WORST CASE CURRENT DENSITY:
1.43 x 105 A/cm2 at 25mA
Metallization Mask Layout
HI-1818A HI-1828A
VLA1A0
-VSUPPLY
+VSUPPLY
IN 1
OUTPUT
IN 2IN 3IN 4IN 5IN 6
IN 7
IN 8
A2
EN
VLA1A0
-15VSUPPLY
+VSUPPLY
IN 1
OUT 1
IN 2IN 3IN 4IN 5IN 6
IN 7
IN 8
OUT 5
EN
THRU 4
THRU 8
HI-1818A, HI1828A
