April 2012
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSA2467 Rev. 1.0.8
FSA2467 — 0.4Ω Low-Voltage Dual DPDT Analog Switch
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FSA2467
0.4Ω Low-Voltage Dual DPDT Analog Switch
Features
Typical 0.4Ω On Resistance (RON) for +2.7V Supply
Features Less then12µA ICCT Current when Sn
Input is Lower than VCC
0.25Ω Maximum RON Flatness for +2.7V Supply
3 x 3mm 16-Lead MLP Package
1.8x2.6mm 16-Lead UMLP Package
Broad VCC Operating Range
Low THD (0.02% Typical for 32Ω Load)
Applications
Cell Phone
PDA
Portable Media Player
Description
The FSA2467 is a dual Double-Pole, Double-Throw
(DPDT) analog switch. The FSA2467 operates from a
single 1.65V to 4.3V supply. The FSA2467 features an
ultra-low on resistance of 0.4Ω at a +2.7V supply and
25°C. This device is fabricated with sub-micron CMOS
technology to achieve fast switching speeds and is
designed for break-before-make operation.
FSA2467 features very low quiescent current even when
the control voltage is lower than the VCC supply. This
feature allows mobile handset applications direct
interface with baseband processor general-purpose
I/Os.
Ordering Information
Part Number Top Mark Package Description
FSA2467MPX FSA
2467 16-lead Molded Leadless Package (MLP), JEDEC MO-220, 3 x 3mm Square
FSA2467UMX GC 16-lead Ultrathin Molded Leadless Package (UMLP), 1.8 x 2.6mm
Application Diagram
Figure 1. Application Diagram
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSA2467 Rev. 1.0.8 2
FSA2467 — 0.4Ω Low-Voltage Dual DPDT Analog Switch
Pin Assignments
1
5 6 7 8
9
10
112
3
12
16 15 14 13
4
1A 1B1VCC 4B0
4A
4B1
2S
3B0
2B0GND 3B13A
1B0
1S
2B1
2A
Figure 2. MLP (Top Through View) Figure 3. UMLP (Top View)
Truth Table Pin Descriptions
Control Inputs Function Name Function
LOW nB0 Connected to nA nA，nB0，nB1 Data Ports
HIGH nB1 Connected to nA nS Control Input
Analog Symbol
Figure 4. Analog Symbol
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSA2467 Rev. 1.0.8 3
FSA2467 — 0.4Ω Low-Voltage Dual DPDT Analog Switch
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol Parameter Min. Max. Unit
VCC Supply Voltage -0.5 5.0 V
VS Switch Voltage -0.5 VCC+0.3 V
VIN Input Voltage -0.5 5.0 V
IIK Input Diode Current -50 mA
ISW Switch Current 350 mA
ISWPEAK Peak Switch Current (Pulsed at 1ms duration, <10% Duty Cycle) 500 mA
TSTG Storage Temperature Range -65 +150 ºC
TJ Junction Temperature +150 ºC
TL Lead Temperature, Soldering 10 Seconds +260 ºC
ESD Electrostatic Discharge Capability Human Body Model,
JESD22-A114 5.5 kV
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol Parameter Min. Max. Unit
VCC Supply Voltage 1.65 4.30 V
VIN Control Input Voltage(1) 0 VCC V
Vs Switch Input Voltage 0 VCC V
TA Operating Temperature -40 +85 ºC
Note：
1. Unused inputs must be held HIGH or LOW. They may not float.
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSA2467 Rev. 1.0.8 4
FSA2467 — 0.4Ω Low-Voltage Dual DPDT Analog Switch
DC Electrical Characteristics
Typical values are at 25ºC unless otherwise specified.
Symbol Parameter Condition VCC (V)
TA = +25ºC TA = -40 to
+85ºC Unit
Min. Typ. Max. Min Max.
VIH Input Voltage High
4.3 1.4
V
2.7 to 3.6 1.3
2.3 to 2.7 1.1
1.65 to 1.95 0.9
VIL Input Voltage Low
4.3 0.7
V
2.7 to 3.6 0.5
2.3 to 2.7 0.4
1.65 to 1.95 0.4
IIN Control Input Leakage VIN=0V to VCC 1.65 to 4.30 -0.5 0.5 A
INO(OFF)
INC(OFF)
Off Leakage Current of
Port nB0 and nB1
nA=0.3V, VCC-0.3V
1.95 to 4.30 -10 10 -50 50 nA
nB0 or nB1=0.3V, VCC-
0.3V or floating
IA(ON) On Leakage Current of
Port A
nA=0.3V,VCC-0.3V
1.95 to 4.30 -10 10 -50 50 nA
nB0 or nB1=0.3V, VCC-
0.3V or Floating
RON Switch On
Resistance(2)
IOUT=100mA 4.3 0.4 0.6
nB0 or nB1=0V,0.8V,
1.8V,2.7V 2.7 0.4 0.6
IOUT=100mA, nB0 or
nB1=0V,0.7V, 1.2V, 2.3V 2.3 0.55 0.95
IOUT=100mA, nB0 or
nB1=1.0V 1.8 0.8 2.0
RON
On Resistance
Matching Between
Channels(3)
IOUT=100mA, nB0 or
nB1=0.8V 2.7 0.04 0.10
IOUT=100mA, nB0 or
nB1=0.7V 2.3 0.03 0.10
RFLAT(ON) On Resistance
Flatness(4)
IOUT=100mA, B0 or
nB1=0V to VCC
2.7 0.25
2.3 0.3
ICC Quiescent Supply
Current VIN=0V to VCC IOUT=0V 4.3 -100 100 -500 500 nA
ICCT Increase in ICC Current
per Control Voltage
VIN=1.8V 4.3 7 12 15
A
VIN=2.6V 4.3 3 6 7
Notes:
2. On resistance is determined by the voltage drop between A and B pins at the indicated current through the switch.
3. RON=RON max – RON min measured at identical VCC, temperature and voltage.
4. Flatness is defined as the difference between the maximum and minimum value of on resistance over the
specified range of conditions.
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSA2467 Rev. 1.0.8 5
FSA2467 — 0.4Ω Low-Voltage Dual DPDT Analog Switch
AC Electrical Characteristics
Typical values are at 25ºC unless otherwise specified.
Symbol Parameter Condition VCC
TA = +25ºC TA = -40 to
+85ºC Unit Figure
Min. Typ. Max. Min. Max.
tON Turn-On Time
nB0 or nB1=1.5V 3.6 to 4.3 50 60
ns Figure 8
RL=50, CL=35pF 2.7 to 3.6 65 75
2.3 to 2.7 80 90
tOFF Turn-Off Time
nB0 or nB1=1.5V 3.6 to 4.3 32 40
ns Figure 8
RL=50, CL=35pF 2.7 to 3.6 42 50
2.3 to 2.7 52 60
tBBM Break-Before-
Make Time
nB0 or nB1=1.5V 3.6 to 4.3 12
ns Figure 9
RL=50, CL=35pF 2.7 to 3.6 15
2.3 to 2.7 20
Q Charge Injection
CL=100pF,
VGEN=0V, RGEN=0 3.6 to 4.3 15
pC Figure 11
CL=100pF,
VGEN=0V, RGEN=0 2.7 to 3.6 10
CL=100pF,
VGEN=0V, RGEN=0 2.3 to 2.7 8
OIRR Off Isolation f=100KHz,
RL=50,CL=5pF
3.6 to 4.3 -75
dB Figure 10
2.7 to 3.6 -75
2.3 to 2.7 -75
Xtalk Crosstalk f=100KHz, RL=50,
CL=5pF
3.6 to 4.3 -75
dB Figure 10
2.7 to 3.6 -75
2.3 to 2.7 -75
BW -3dB Bandwidth RL=50 2.3 to 4.3 85 MHZ Figure 13
THD Total Harmonic
Distortion
RL=32, VIN=2VPP,
f=20 to 20kHZ 3.6 to 4.3 0.02
% Figure 14
RL=32, VIN=2VPP,
f=20 to 20kHZ 2.7 to 3.6 0.02
RL=32, VIN=2VPP,
f=20 to 20kHZ 2.3. to 2.7 0.02
Capacitance
Symbol Parameter Condition VCC T
A = +25ºC Typical Unit Figure
CIN Control Pin Input Capacitance f=1MHZ 0 1.5 pF Figure 8
COFF B Port Off Capacitance f=1MHZ 3.3 32 pF Figure 8
CON A Port On Capacitance f=1MHZ 3.3 118 pF Figure 8
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSA2467 Rev. 1.0.8 6
FSA2467 — 0.4Ω Low-Voltage Dual DPDT Analog Switch
Typical Applications
Figure 5. RON at 2.7V VCC
Figure 6. RON at 2.3V VCC
Figure 7. RON at 1.8V VCC
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSA2467 Rev. 1.0.8 7
FSA2467 — 0.4Ω Low-Voltage Dual DPDT Analog Switch
AC Loadings and Waveforms
Figure 8. Turn-On / Turn-Off Timing
Figure 9. Break-Before-Make Timing
Figure 10. Off Isolation and Crosstalk
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSA2467 Rev. 1.0.8 8
FSA2467 — 0.4Ω Low-Voltage Dual DPDT Analog Switch
AC Loadings and Waveforms (Continued)
Figure 11. Charge Injection
Figure 12. On / Off Capacitance Measurement Setup
Figure 13. Bandwidth
Figure 14. Harmonic Distortion
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSA2467 Rev. 1.0.8 9
FSA2467 — 0.4Ω Low-Voltage Dual DPDT Analog Switch
Package Dimensions
Figure 15. 16-Lead, Molded Leadless Package (MLP), JEDEC MO-220 3x3mm Square
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:
http://www.fairchildsemi.com/packaging/3x3MLP16_Pack_TNR.pdf.
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSA2467 Rev. 1.0.8 10
FSA2467 — 0.4Ω Low-Voltage Dual DPDT Analog Switch
Package Dimensions
RECOMMENDED
LAND PATTERN
NOTES:
A. PACKAGE DOES NOT FULLY CONFORM TO
JEDEC STANDARD.
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
D. LAND PATTERN RECOMMENDATION IS
BASED ON FSC DESIGN ONLY.
E. DRAWING FILENAME: MKT-UMLP16Arev4.
F. TERMINAL SHAPE MAY VARY ACCORDING
TO PACKAGE SUPPLIER, SEE TERMINAL
SHAPE VARIANTS.
SCALE : 2X
LEAD
OPTION 1
SCALE : 2X
LEAD
OPTION 2
PIN#1 IDENT
PIN#1 IDENT
PACKAGE
EDGE
TOP VIEW
BOTTOM VIEW
0.10 C
0.08 C
2.60
1.80
0.10 C
2X
2X
SIDE VIEW
0.10 C
0.05
0.00
0.10 C A B
0.05 C
0.55 MAX.
0.40
1
5
9
13
16
2.10
2.90
0.40
0.663
0.563
0.225
1
(15X)
(16X)
0.152
0.40
0.60
0.10 0.30
0.50
0.10
TERMINAL SHAPE VARIANTS
0.15
0.25 15X
PIN 1 NON-PIN 1
0.15
0.25
15X
0.30
0.50
0.15
0.25
0.30
0.50
0.15
0.25 15X
15X
Supplier 1
Supplier 2
PIN 1 NON-PIN 1
AB
C
SEATING
PLANE
0.45
0.35
0.55
0.45
0.25
0.15
R0.20
Figure 16. 16-Lead, Ultrathin Molded Leadless Package (UMLP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
FSA2467 Rev. 1.0.8 11
FSA2467 — 0.4Ω Low-Voltage Dual DPDT Analog Switch
