© 2004 California Micro Devices Corp. All rights reserved.
01/14/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲Tel: 408.263.3214 ▲Fax: 408.263.7846 ▲www.calmicro.com 1
CM1210
1, 2, 4 and 8-Channel Very Low Capacitance ESD Protectors
Features
• 1,2,4 and 8 channels of ESD protection
• Very low loading capacitance (1.0pF typical)
•+6 kV ESD protection per channel (IEC 61000-4-2
standard)
• Available in SOT23, SOT143, SC70 and MSOP
packages
• Lead-free versions available
Applications
• USB2.0 ports at 480Mbps
• IEEE1394 Firewire ports at 400Mbps
• Gigabit Ethernet ports
• Flat panel display interfaces
• Wireless antennas
• General purpose high-speed data line ESD
protection
Product Description
The CM1210 family of diode arrays has been designed
to provide ESD protection for electronic components or
sub-systems requiring minimal capacitive loading.
These devices are ideal for protecting systems with
high data and clock rates or for circuits requiring low
capacitive loading. Each ESD channel consists of a
pair of diodes which will steer the ESD current pulse to
either the positive (VP) or negative (VN) supply rail. The
CM1210 will protect against ESD pulses up to +6KV
per the IEC 61000-4-2 standard.
This device is particularly well-suited for systems using
high-speed port implementations such as USB2.0,
IEEE1394 (Firewire, i.Link), Gigabit Ethernet and
corresponding ports in removable storage, digital cam-
corders, DVD-RW drives and other applications where
extremely low loading capacitance with ESD protection
are required in a small package footprint.
The CM1210 family of devices is optionally available
with lead-free finishing.
Electrical Schematics
CH1
V
P
V
N
CM1210-01ST/SO
CH1
V
P
V
N
CM1210-02ST/SO
CH2
CH1
V
P
V
N
CM1210-04ST/SO
CH4
CH2
CH3
CH3 V
N
CH6
CH4
CH5
CH1
V
P
CM1210-08MS/MR
CH8
CH2
CH7
CM1210-01SC/S7
CM1210-02SC/S7
© 2004 California Micro Devices Corp. All rights reserved.
2430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲Tel: 408.263.3214 ▲Fax: 408.263.7846 ▲www.calmicro.com 01/14/04
CM1210
PACKAGE / PINOUT DIAGRAMS
Note: These drawings are not to scale.
3-Pin SOT23-3
CH1
V
P
V
N
1
2
3
To p V i ew
D10/D101
4-Pin SOT143-4
14
23
D10/D102
Top View
V
N
CH1
V
P
CH2
5-pin SC70-5
1
2
5
34
D10/D112
Top View
6-pin SOT23-6
1
2
6
5
34
D10/D104
Top View
CH1
V
N
CH2
CH4
V
P
CH3
V
N
V
N
V
P
CH2
CH1
10-pin MSOP-10
1
2
3
4
10
9
8
7
CH1
CH2
CH3
CH4
CH8
CH7
V
P
CH6
Top View
56V
N
CH5
D10/D108
3-Pin SC70-3
CH1
V
P
V
N
1
2
3
To p V i ew
D10/D111
SOT23-3 & SC70-3 PACKAGE
PIN DESCRIPTIONS
PIN NAME TYPE DESCRIPTION
1 CH1 I/O ESD Channel
2V
PPWR Positive voltage supply rail
3V
NGND Negative voltage supply rail
SC70-5 PACKAGE PIN DESCRIPTIONS
PIN NAME TYPE DESCRIPTION
1V
NGND Negative voltage supply rail
2V
NGND Negative voltage supply rail
3V
PPWR Positive voltage supply rail
4 CH1 I/O ESD Channel
5 CH2 I/O ESD Channel
SOT23-6 PACKAGE PIN DESCRIPTIONS
PIN NAME TYPE DESCRIPTION
1 CH1 I/O ESD Channel
2V
NGND Negative voltage supply rail
3 CH2 I/O ESD Channel
4 CH3 I/O ESD Channel
5V
PPWR Positive voltage supply rail
6 CH4 I/O ESD Channel
SOT143-4 PACKAGE PIN DESCRIPTIONS
PIN NAME TYPE DESCRIPTION
1V
NGND Negative voltage supply rail
2 CH1 I/O ESD Channel
3 CH2 I/O ESD Channel
4V
PPWR Positive voltage supply rail
MSOP-10 PACKAGE PIN DESCRIPTIONS
PIN NAME TYPE DESCRIPTION
1 CH1 I/O ESD Channel
2 CH2 I/O ESD Channel
3 CH3 I/O ESD Channel
4 CH4 I/O ESD Channel
5V
NGND Negative voltage supply rail
6 CH5 I/O ESD Channel
7 CH6 I/O ESD Channel
8V
PPWR Positive voltage supply rail
9 CH7 I/O ESD Channel
10 CH8 I/O ESD Channel
© 2004 California Micro Devices Corp. All rights reserved.
01/14/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲Tel: 408.263.3214 ▲Fax: 408.263.7846 ▲www.calmicro.com 3
CM1210
Ordering Information
Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.
Specifications
Note 1: Only one diode conducting at a time.
PART NUMBERING INFORMATION
Pins Package
Standard Finish Lead-free Finish
Ordering Part
Number1Part Marking
Ordering Part
Number1Part Marking
3 SOT23-3 CM1210-01ST D10 CM1210-01SO D101
3 SC70-3 CM1210-01SC D10 CM1210-01S7 D111
4 SOT143-4 CM1210-02ST D10 CM1210-02SO D102
5 SC70-5 CM1210-02SC D10 CM1210-02S7 D112
6 SOT23-6 CM1210-04ST D10 CM1210-04SO D104
10 MSOP-10 CM1210-08MS D10 CM1210-08MR D108
ABSOLUTE MAXIMUM RATINGS
PARAMETER RATING UNITS
Supply Voltage (VP - VN)8.0V
Diode Forward DC Current (Note 1) 8 mA
Operating Temperature Range -40 to +85 °C
Storage Temperature Range -65 to +150 °C
DC Voltage at any channel input (VN - 0.5) to (VP + 0.5) V
Package Power Rating
SOT23-3 Package (CM1210-01ST/SO)
SC70-3 Package (CM1210-01SC/S7)
SOT143 Package (CM1210-02ST/SO)
SC70-5 Package (CM1210-02SC/S7)
SOT23-6 Package (CM1210-04ST/SO)
MSOP10 Package (CM1210-08MS/MR)
225
200
225
200
225
400
mW
mW
mW
mW
mW
mW
STANDARD OPERATING CONDITIONS
PARAMETER RATING UNITS
Operating Temperature Range -40 to +85 °C
Operating Supply Voltage (VP - VN)0 to 5.5V
© 2004 California Micro Devices Corp. All rights reserved.
4430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲Tel: 408.263.3214 ▲Fax: 408.263.7846 ▲www.calmicro.com 01/14/04
CM1210
Note 1: All parameters specified at TA = -40°C to +85°C unless otherwise noted.
Note 2: These parameters guaranteed by design and characterization.
Note 3: From I/O pins to VP or VN only. VP bypassed to VN with a 0.22µF ceramic capacitor (see Application Information for more
details).
Note 4: Human Body Model per MIL-STD-883, Method 3015, CDischarge = 100pF, RDischarge = 1.5KΩ, VP = 3.3V, VN grounded.
Note 5: Standard IEC 61000-4-2 with CDischarge = 150pF, RDischarge = 330Ω, VP = 3.3V, VN grounded.
ELECTRICAL OPERATING CHARACTERISTICS (SEE NOTE 1)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT
S
IPSupply Current (VP-VN)=3.3V 8.0 µA
VF Diode Forward Voltage
Top Diode
Bottom Diode
IF = 8mA
0.60
0.60
0.80
0.80
0.95
0.95
V
V
ILEAK Channel Leakage Current +0.1 +1.0 µA
CIN Channel Input Capacitance At 1 MHz, VP=3.3V, VN=0V,
VIN=1.65V; Note 2 applies
1.0 1.3 pF
VESD ESD Protection
Peak Discharge Voltage at any
channel input, in system
a) Contact discharge per IEC
61000-4-2 standard
Notes 2,3 and 5; TA=25°C
+
6kV
VCL Channel Clamp Voltage
CM1210-01ST, CM1210-01SC,
CM1210-02ST, CM1210-02SC
Positive Transients
Negative Transients
At 8kV ESD HBM; Notes 2 & 4
VP + 10.0
VN - 10.0
V
V
Channel Clamp Voltage
CM1210-04ST, CM1210-08MS
Positive Transients
Negative Transients
At 8kV ESD HBM; Notes 2 & 4
VP + 13.0
VN - 13.0
V
V
© 2004 California Micro Devices Corp. All rights reserved.
01/14/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲Tel: 408.263.3214 ▲Fax: 408.263.7846 ▲www.calmicro.com 5
CM1210
Performance Information
Input Channel Capacitance Performance Curves
0.75
0.80
0.85
0.90
0.95
1.00
1.05
1.10
1.15
1.20
1.25
-50 -25 0 25 50 75 100
Temperature (°C)
Input Capacitance (pF)
0V DC Input Bias
1.65V DC Input Bias
Typical Variation of C
IN
vs. V
IN
(f=1MHz, VP = 3.3V, VN = 0V, 0.1
µ
F chip capacitor between VP and VN,
25°C
)
0
0.5
1
1.5
2
00.511.522.53
Input Voltage (V)
Input Capacitance (pF)
Typical Variation of C
IN
vs. Temp
(f=1MHz, V
IN
=30mV, VP = 3.3V, VN = 0V,
0.1
µ
F chip capacitor between VP and VN)
© 2004 California Micro Devices Corp. All rights reserved.
6430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲Tel: 408.263.3214 ▲Fax: 408.263.7846 ▲www.calmicro.com 01/14/04
CM1210
Performance Information (Cont’d)
Typical Filter Performance (nominal conditions unless specified otherwise, 50 Ohm Environment)
Figure 1. Insertion Loss (S21) VS. Frequency (0V DC Bias, VP=3.3V)
Figure 2. Insertion Loss (S21) VS. Frequency (2.5V DC Bias, VP=3.3V)
V
P
(3.3V)
GND
P1
I/On
P2
TEST CIRCUIT
V
P
(3.3V)
GND
P1
I/On
P2
TEST CIRCUIT
© 2004 California Micro Devices Corp. All rights reserved.
01/14/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲Tel: 408.263.3214 ▲Fax: 408.263.7846 ▲www.calmicro.com 7
CM1210
Application Information
Design Considerations
In order to realize the maximum protection against
ESD pulses, care must be taken in the PCB layout to
minimize parasitic series inductances on the Supply/
Ground rails as well as the signal trace segment
between the signal input (typically a connector) and the
ESD protection device. Refer to Figure 3, which illus-
trates an example of a positive ESD pulse striking an
input channel. The parasitic series inductance back to
the power supply is represented by L1 and L2. The volt-
age VCL on the line being protected is:
VCL = Fwd voltage drop of D1 + VSUPPLY + L1 x d(IESD ) / dt
+ L2 x d(IESD ) / dt
where IESD is the ESD current pulse, and VSUPPLY is
the positive supply voltage.
An ESD current pulse can rise from zero to its peak
value in a very short time. As an example, a level 4
contact discharge per the IEC61000-4-2 standard
results in a current pulse that rises from zero to 30
Amps in 1ns. Here d(IESD)/dt can be approximated by
∆IESD/∆t, or 30/(1x10-9). So just 910nH of series induc-
tance (L1 and L2 combined) will lead to a 300V incre-
ment in VCL!
Similarly for negative ESD pulses, parasitic series
inductance from the VN pin to the ground rail will lead
to drastically increased negative voltage on the line
being protected.
Another consideration is the output impedance of the
power supply for fast transient currents. Most power
supplies exhibit a much higher output impedance to
fast transient current spikes. In the VCL equation
above, the VSUPPLY term, in reality, is given by (VDC +
IESD x ROUT), where VDC and ROUT are the nominal
supply DC output voltage and effective output imped-
ance of the power supply respectively. As an example,
a ROUT of 1 ohm would result in a 10V increment in
VCL for a peak IESD of 10A.
If the inductances and resistance described above are
close to zero, the rail-clamp ESD protection diodes will
do a good job of protection. However, since this is not
possible in practical situations, a bypass capacitor
must be used to absorb the very high frequency ESD
energy. So for any brand of rail-clamp ESD protection
diodes, a bypass capacitor should be connected
between the VP pin of the diodes and the ground plane
(VN pin of the diodes) as shown in the Application Cir-
cuit diagram below. A value of 0.22µF is adequate.
Ceramic chip capacitors mounted with short printed
circuit board traces are good choices for this applica-
tion. Electrolytic capacitors should be avoided as they
have poor high frequency characteristics. For extra
protection, connect a zener diode in parallel with the
bypass capacitor to mitigate the effects of the parasitic
series inductance inherent in the capacitor. The break-
down voltage of the zener diode should be slightly
higher than the maximum supply voltage.
As a general rule, the ESD Protection Array should be
located as close as possible to the point of entry of
expected electrostatic discharges. The power supply
bypass capacitor mentioned above should be as close
to the VP pin of the Protection Array as possible, with
minimum PCB trace lengths to the power supply,
ground planes and between the signal input and the
ESD device to minimize stray series inductance.
Additional Information
See also California Micro Devices Application Notes
AP209, “Design Considerations for ESD Protection”
and APxxx, "ESD Protection for USB 2.0 Systems".
Figure 3. Application of Positive ESD Pulse between Input Channel and Ground
N
L
2
L1
V
P
V
PATH OF ESD CURRENT PULSE I
ONE
CHANNEL
OF
CM1210
CHANNEL
INPUT
GROUND RAIL
POSITIVE SUPPLY RAIL
SYSTEM OR
CIRCUITRY
BEING
PROTECTED
LINE BEING
PROTECTED
ESD
D
0.22µF
1
2
D
0A
20A
V
CL
© 2004 California Micro Devices Corp. All rights reserved.
8430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲Tel: 408.263.3214 ▲Fax: 408.263.7846 ▲www.calmicro.com 01/14/04
CM1210
Mechanical Details
The CM1210 is available in SOT23-3, SC70-3, SC70-
5, SOT23-6, SOT143-4 and MSOP-10 packages.The
various package drawings are presented below.
SOT23-3 Mechanical Specifications
Dimensions for CM1210 devices packaged in 3-pin
SOT23 packages are presented below.
For complete information on the SOT23-3 package,
see the California Micro Devices SOT23 Package Infor-
mation document.
Package Dimensions for SOT23-3.
PACKAGE DIMENSIONS
Package SOT23-3 (JEDEC name is TO-236)
Pins 3
Dimensions Millimeters Inches
Min Max Min Max
A0.89 1.12 0.0350 0.0441
A1 0.01 0.10 0.0004 0.0039
b0.30 0.50 0.0118 0.0197
c0.08 0.20 0.0031 0.0079
D2.80 3.04 0.1102 0.1197
E2.10 2.64 0.0827 0.1039
E1 1.20 1.40 0.0472 0.0551
e0.95 BSC 0.0374 BSC
e1 1.90 BSC 0.0748 BSC
L0.40 0.60 0.0157 0.0236
L1 0.54 REF 0.0213 REF
# per tape
and reel
3000 pieces
Controlling dimension: millimeters
Mechanical Package Diagrams
TOP VIEW
e
E1 E
A
SIDE VIEW
L1
END VIEW
D
A1
c
12
e1
b
L
3
© 2004 California Micro Devices Corp. All rights reserved.
01/14/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲Tel: 408.263.3214 ▲Fax: 408.263.7846 ▲www.calmicro.com 9
CM1210
Mechanical Details (cont’d)
SOT23-6 Mechanical Specifications
CM1210 devices are packaged in 6-pin SOT23 pack-
ages. Dimensions are presented below.
For complete information on the SOT23-6 package,
see the California Micro Devices SOT23 Package Infor-
mation document.
Package Dimensions for SOT23-6.
PACKAGE DIMENSIONS
Package SOT23-6 (JEDEC name is MO-178)
Pins 6
Dimensions Millimeters Inches
Min Max Min Max
A-- 1.45 -- 0.0571
A1 0.00 0.15 0.0000 0.0059
b0.30 0.50 0.0118 0.0197
c0.08 0.22 0.0031 0.0087
D2.75 3.05 0.1083 0.1201
E2.60 3.00 0.1024 0.1181
E1 1.45 1.75 0.0571 0.0689
e0.95 BSC 0.0374 BSC
e1 1.90 BSC 0.0748 BSC
L0.30 0.60 0.0118 0.0236
L1 0.60 REF 0.0236 REF
# per tape
and reel
3000 pieces
Controlling dimension: millimeters
Mechanical Package Diagrams
TOP VIEW
12 3
65 4
e1 e
E1 E
b
A
SIDE VIEW
D
A1
L1
END VIEW
c
L
Pin 1
Marking
© 2004 California Micro Devices Corp. All rights reserved.
10 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲Tel: 408.263.3214 ▲Fax: 408.263.7846 ▲www.calmicro.com 01/14/04
CM1210
Mechanical Details (cont’d)
SOT143 Mechanical Specifications
Dimensions for CM1210 devices packaged in 4-pin
SOT143 packages are presented below.
For complete information on the SOT143 package, see
the California Micro Devices SOT143 Package Infor-
mation document.
Package Dimensions for SOT143.
PACKAGE DIMENSIONS
Package SOT143
Pins 4
Dimensions Millimeters Inches
Min Max Min Max
A0.80 1.22 0.031 0.048
A1 0.05 0.15 0.002 0.006
b0.30 0.50 0.012 0.019
b2 0.76 0.89 0.030 0.035
c0.08 0.20 0.003 0.008
D2.80 3.04 0.110 0.119
E2.10 2.64 0.082 0.103
E1 1.20 1.40 0.047 0.055
e1.92 BSC 0.075 BSC
e1 0.20 BSC 0.008 BSC
L0.4 0.6 0.016 0.024
L1 0.54 REF 0.021 REF
# per tape
and reel
3000 pieces
Controlling dimension: millimeters
Mechanical Package Diagrams
TOP VIEW
43
e
E1 E
b2
A
SIDE VIEW
L
END VIEW
D
A1
c
12
b
e1
L1
© 2004 California Micro Devices Corp. All rights reserved.
01/14/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲Tel: 408.263.3214 ▲Fax: 408.263.7846 ▲www.calmicro.com 11
CM1210
Mechanical Details (cont’d)
SC70-3 Mechanical Specifications
Dimensions for CM1210 devices packaged in 3-pin
SC70 packages are presented below.
For complete information on the SC70-3 package, see
the California Micro Devices SC70 Package Informa-
tion document.
Package Dimensions for SC70-3.
PACKAGE DIMENSIONS
Package SC70-3
(JEDEC name is MO-203 Issue A)
Pins 3
Dimensions Millimeters
Min Max
A0.80 1.10
A1 0.00 0.10
A2 0.70 1.00
B0.15 0.30
c0.08 0.25
D1.85 2.25
E1 1.15 1.35
e0.65 BSC
E2.00 2.40
L0.26 0.46
# / tape and reel 3000 pieces
Mechanical Package Diagrams
TOP VIEW
e
A
SIDE VIEW
END VIEW
D
A1
c
12
B
e
A2
E1 E
3
L
© 2004 California Micro Devices Corp. All rights reserved.
12 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲Tel: 408.263.3214 ▲Fax: 408.263.7846 ▲www.calmicro.com 01/14/04
CM1210
Mechanical Details (cont’d)
SC70-5 Mechanical Specifications:
Dimensions for CM1210 devices packaged in 5-pin
SC70 packages are presented below.
For complete information on the SC70-5 package, see
the California Micro Devices SC70 Package Informa-
tion document.
Package Dimensions for SC70-5.
PACKAGE DIMENSIONS
Package SC70-5
(JEDEC name is MO-203 Issue A)
Pins 5
Dimensions Millimeters
Min Max
A0.80 1.10
A1 0.00 0.10
A2 0.70 1.00
B0.15 0.30
c0.08 0.25
D1.85 2.25
E1 1.15 1.35
e0.65 BSC
E2.00 2.40
L0.26 0.46
# / tape and reel 3000 pieces
END VIEW
c
L
Mechanical Package Diagrams
TOP VIEW
e e
E1 E
B
A
SIDE VIEW
D
A2
A1
54
12 3
© 2004 California Micro Devices Corp. All rights reserved.
01/14/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲Tel: 408.263.3214 ▲Fax: 408.263.7846 ▲www.calmicro.com 13
CM1210
Mechanical Details (cont’d)
MSOP Mechanical Specifications
CM1210 devices are packaged in 10-pin MSOP pack-
ages. Dimensions are presented below.
For complete information on the MSOP-10 package,
see the California Micro Devices MSOP Package Infor-
mation document.
* This is an approximate number which may vary.
Package Dimensions for MSOP-10
PACKAGE DIMENSIONS
Package MSOP
Pins 10
Dimensions Millimeters Inches
Min Max Min Max
A0.75 0.95 0.028 0.038
A1 0.05 0.15 0.002 0.006
B0.18 0.40 0.006 0.016
C0.18 0.007
D2.90 3.10 0.114 0.122
E2.90 3.10 0.114 0.122
e0.50 BSC 0.0196 BSC
H4.76 5.00 0.187 0.197
L0.40 0.70 0.0137 0.029
# per tube 80 pieces*
# per tape
and reel
4000
Controlling dimension: inches
Mechanical Package Diagrams
E
D
H
1234
10 9 8 7
L
END VIEW
C
e
B
A
A1
SEATING
PLANE
SIDE VIEW
TOP VIEW
6
5
Pin 1
Marking
