TPCA8104
2010-01-05
1
TOSHIBA Field Effect Transistor Silicon P-Channel MOS Type (U-MOS III)
TPCA8104
High-Side Switching Applications
Portable Equipment Applications
Small footprint due to small and thin package
Low drain-source ON-resistance: RDS (ON) = 11 m (typ.)
High forward transfer admittance:|Yfs| = 50 S (typ.)
Low leakage current: IDSS = -10 μA (max) (VDS = -60 V)
Enhancement mode: Vth = -0.8 to -2.0 V (VDS = -10 V, ID = -1 mA)
Absolute Maximum Ratings (Ta = 25°C)
Characteristic Symbol Rating Unit
Drain-source voltage VDSS -60 V
Drain-gate voltage (RGS = 20 kΩ) VDGR -60 V
Gate-source voltage VGSS ±20 V
DC (Note 1) ID -40
Drain current
Pulse (Note 1) IDP -120
A
Drain power dissipation (Tc = 25°C) PD 45
Drain power dissipation (t = 10 s)
(Note 2a) PD 2.8
Drain power dissipation (t = 10 s)
(Note 2b) PD 1.6
W
Single-pulse avalanche energy
(Note 3) EAS 116 mJ
Avalanche current IAR -40 A
Repetitive avalanche energy
(Tc = 25°C) (Note 4) EAR 4.5 mJ
Channel temperature Tch 150 °C
Storage temperature range Tstg 55 to 150 °C
Note: For Notes 1 to 4, see the next page.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e.
operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate
reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and
Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).
This transistor is an electrostatic-sensitive device. Handle with care.
Unit: mm
0.5±0.1
6.0±0.3
1.27 0.4±0.1
5.0±0.2
0.595
0.05 M
A
14
5
8
0.15±0.05
0.8±0.1
1.1±0.2
4.25±0.2
0.6±0.1
3.5±0.2
14
58
5.0±0.2
0.95±0.05
S0.05 S
A
0.166±0.05
1, 2, 3: Source 4: Gate
5, 6, 7, 8: Drain
JEDEC
JEITA
TOSHIBA 2-5Q1A
Weight: 0.080 g (typ.)
Circuit Configuration
8 6
1 2 3
7 5
4
TPCA8104
2010-01-05
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Thermal Characteristics
Characteristic Symbol Max Unit
Thermal resistance, channel to case (Tc = 25°C) Rth (ch-c) 2.78 °C/W
Thermal resistance, channel to ambient
(t = 10 s) (Note 2a) Rth (ch-a) 44.6
Thermal resistance, channel to ambient
(t = 10 s) (Note 2b) Rth (ch-a) 78.1
°C/W
Marking (Note 5)
Note 1: The channel temperature should not exceed 150°C during use.
Note 2: (a) Device mounted on a glass-epoxy board (a) (b) Device mounted on a glass-epoxy board (b)
Note 3: VDD = -24 V, Tch = 25°C (initial), L = 0.1 mH, RG = 25 Ω, IAR = -40 A
Note 4: Repetitive rating: pulse width limited by maximum channel temperature.
Note 5:
(a)
FR-4
25.4 × 25.4 × 0.8
(Unit: mm)
(b)
FR-4
25.4 × 25.4 × 0.8
(Unit: mm)
* Weekly code (three digits):
Week of manufacture
(01 for the first week of the year, continuing up to 52 or 53)
Year of manufacture
(the last digit of the calendar year)
Type TPCA
8104
Lot No.
TPCA8104
2010-01-05
3
Electrical Characteristics (Ta = 25°C)
Characteristic Symbol Test Condition Min Typ. Max Unit
Gate leakage current IGSS VGS = ±16 V, VDS = 0 V ±10 μA
Drain cutoff current IDSS VDS = 60 V, VGS = 0 V 10 μA
V (BR) DSS ID = 10 mA, VGS = 0 V 60
Drain-source breakdown
voltage V (BR) DSX ID = 10 mA, VGS = 20 V 35
V
Gate threshold voltage Vth VDS = 10 V, ID = 1 mA 0.8 2.0 V
VGS = 4 V, ID = 20 A 17 24
Drain-source ON-resistance RDS (ON)
VGS = 10 V, ID = 20 A 11 16
m
Forward transfer admittance |Yfs| VDS = 10 V, ID = 20 A 25 50 S
Input capacitance Ciss 4300
Reverse transfer capacitance Crss 450
Output capacitance Coss
VDS = 10 V, VGS = 0 V, f = 1 MHz
600
pF
Rise time tr 10
Turn-on time ton 20
Fall time tf 60
Switching time
Turn-off time toff
Duty 1%, tw = 10 μs 200
ns
Total gate charge
(gate-source plus gate-drain) Qg 90
Gate-source charge 1 Qgs1 16
Gate-drain (“Miller”) charge Qgd
VDD 48 V, VGS = 10 V
ID = 40 A
28
nC
Source-Drain Ratings and Characteristics (Ta = 25°C)
Characteristic Symbol Test Condition Min Typ. Max Unit
Drain reverse current Pulse (Note 1) IDRP 120 A
Forward voltage (diode) VDSF IDR = 40 A, VGS = 0 V 1.2 V
RL = 1.5 Ω
VDD 30 V
0 V
VGS10 V
4.7 Ω
ID = 20A
Output
TPCA8104
2010-01-05
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Drain currrent ID (A)
RDS (ON) – ID
Drainsource ON-resistance
RDS (ON) (mΩ)
Gatesource voltage VGS (V)
ID – VGS
Drain current ID (A)
Drainsource voltage VDS (V)
Gate
source voltage VGS (V)
VDS – VGS
Drainsource voltage VDS (V)
ID – VDS
Drain current ID (A)
Drain
source voltage VDS (V)
ID – VDS
Drain current ID (A)
Drain current ID (A)
Yfs – ID
Forward transfer admittance Yfs (S)
25
100
Tc = 55°C
1
1 10 100
10
100
50
40
20
10
0
30
Common source
Tc = 25°C
Pulse test
VGS = 2.6 V
3.6
3
2.8
3.8
10
6
0 0.4 0.8 1.2 1.6 2.0
100
80
40
20
0
60
0 1 2 3 4 5
Tc = 55°C
25
100
Common source
VDS = −10 V
Pulse test
0 1 23
0
5
4
100
80
60
20
ID = 40 A
20
10
0 4 8 12 16 20
0
0.8
0.6
0.4
0.2
1.0
Common source
VDS = 10 V
Pulse test
0.1 1 10 100
0.1
10
100 Common source
Tc = 25°C
Pulse test
V
GS
= 4 V
10
3.2
3.4
4
8
5
10
8
6
54
3.8
3.6
3.4
3.2
3
2.8
VGS = 2.6 V
40
1
Common source
Tc = 25°C
Pulse test
Common source
Tc = 25°C
Pulse test
TPCA8104
2010-01-05
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Drainsource voltage VDS (V)
C – VDS
Capacitance C (pF)
0.1
10
100
10000
1 10 100
Common source
VGS = 0 V
f = 1 MHz
Tc = 25°C
Ciss
Coss
Crss
Case temperature Tc (°C)
RDS (ON) – Tc
Drainsource ON-resistance
RDS (ON) (m Ω)
Drain
source voltage VDS (V)
IDR – VDS
Drain reverse current IDR (A)
Gate threshold voltage Vth (V)
Case temperature Tc (°C)
Vth – Tc
0
0.5
1.5
2.0
2.5
80 40 0 40 80 120 160
Common source
VDS = 10 V
ID = 1mA
Pulse test
Drain power dissipation PD (W)
Ambient temperature Ta (°C)
PD – Ta
160 40 0 40 80 120 80
50
40
30
20
0
0
0.1
Common source
Tc = 25°C
Pulse test
0.2
1
10
100
1000
0.8 1.0
3
10
0.4 1.2
3.0
1.0
0
0 40 80 120
0.5
2.0
2.5
160
(1)
(2)
Gatesource voltage VGS (V)
Total gate charge Qg (nC)
Dynamic input/output
characteristics
Drainsource voltage VDS (V)
0 20 60
Common source
ID = 40 A
Tc = 25°C
Pulse test
VDD = 48 V
VDS
VGS
80 120
50
20
0
30
40
30
25
0
24
12
10
15
60
10
Common source
Pulse test
VGS = 10V
VGS = 4 V 20
ID = 10 A, 20 A, 40 A
ID = 40 A
10
0.6
5
1VGS = 0 V
1000
1.0
1.5
40 100
20
5
10
VDD = 48 V
12
24
(1) Device mounted on a glass-epoxy
board (a) (Note 2a)
(2) Device mounted on a glass-epoxy
board (b) (Note 2b)
t = 10s
TPCA8104
2010-01-05
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rth – tw
Pulse width tw (s)
Transient thermal impedance rth (/W)
0.1
0.001
1
100
1000
0.01 0.1 1 10 100 1000
(3)
(2)
(1)
Drainsource voltage VDS (V)
Safe operating area
100
0.1
1000
10 1 100
ID max (pulse) *
10 ms *
1 ms *
VDSS max
Drain current ID (A)
1
0.1
Single pulse
10
10
ID max (continuous)
DC
operation
Drain power dissipation PD (W)
Case temperature Tc (°C)
PD – Tc
0
10
30
40
50
0 40 80 120 160
20
(1) Tc = 25°C
(1) Device mounted on a glass-epoxy board (a) (Note 2a)
(2) Device mounted on a glass-epoxy board (b) (Note 2b)
* Single pulse
Tc = 25°C
Curves must be derated
linearly with increase in
temperature.
TPCA8104
2010-01-05
7
RESTRICTIONS ON PRODUCT USE
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in this document, and related hardware, software and systems (collectively “Product”) without notice.
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TOSHIBA’s written permission, reproduction is permissible only if reproduction is without alteration/omission.
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responsible for complying with safety standards and for providing adequate designs and safeguards for their hardware, software and
systems which minimize risk and avoid situations in which a malfunction or failure of Product could cause loss of human life, bodily
injury or damage to property, including data loss or corruption. Before customers use the Product, create designs including the
Product, or incorporate the Product into their own applications, customers must also refer to and comply with (a) the latest versions of
all relevant TOSHIBA information, including without limitation, this document, the specifications, the data sheets and application notes
for Product and the precautions and conditions set forth in the “TOSHIBA Semiconductor Reliability Handbook” and (b) the
instructions for the application with which the Product will be used with or for. Customers are solely responsible for all aspects of their
own product design or applications, including but not limited to (a) determining the appropriateness of the use of this Product in such
design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in charts,
diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operating
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