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3/24/97 9-5 8051 Compatibility
The XA, however, uses only as many clocks as are needed to execute each instruction, so an
ALE for every fetch would slow things down considerably. With this change, up to 16 bytes (or
8 words) of code may be accessed without the need to insert an ALE cycle on the XA bus.
The number of XA clocks used for each type of bus cycle (code read, data read, or data write)
can also be programmed, so that slower peripheral devices can work with the XA without the
need for an external WAIT state generator.
Due to the various changes to the bus just mentioned, an XA device cannot be completely pin
compatible with an 80C51 derivative if the external bus is used. The changes to application
hardware needed are relatively small and easy to make.
9.1.5 Instruction Set
The simplest goal of the XA for instruction set compatibility was to have every 80C51
instruction translate to one XA instruction. That has been achieved but for a single exception.
The 80C51 instruction, XCHD or exchange digits, cannot be translated in that manner. XCHD is
an instruction that is rarely used on the 80C51 and could not be implemented on the XA, due to
its internal architecture, without adding a great deal of extra circuitry. So, if this instruction is
encountered when 80C51 source code is being translated, a sequence of XA instructions is used
to duplicate the function:
PUSH R4H ; Save temporary register.
MOV R4H,(Ri) ; Get second operand.
RR R4H,#4 ; Swap one byte.
RR R4L,#4 ; Swap second byte (the "A" register).
RL R4,#4 ; Swap word.
; Result is swapped nibbles in A and R4H.
MOV (Ri),R4H ; Store result.
POP R4H ; Restore temporary register.
If the application requires this sequence to not be interruptible, some additional instruction must
be added in order to disable and re-enable interrupts. The table at the end of this section shows
all of the other XA code replacements for 80C51 instructions.
The XA instruction set is much more powerful than the 80C51 instruction set, and as a direct
consequence, the average number of bytes in an instruction is higher on the XA. In code written
for the XA, the capability of a single instruction is high, so the size of an entire XA program will
normally be smaller than the same program written for an 80C51. Of course, this depends on
how much the application can take advantage of XA features. When code is translated from
80C51 source, however, the size change can be an issue.
In the case of a jump table, where the JMP @A+DPTR instruction is used to jump into a table of
other jumps composed of the 80C51 AJMP instruction, the XA cannot always duplicate the
function of the jumps in the table with instructions that are 2 bytes in length, as in the case of the
AJMP instruction. An adjustment to the calculation of the table index will be required to make
the translated code work properly. For a data table, accessed using MOVC @A+PC, the distance
to the table may change, requiring a similar index adjustment.