| IAS Integrated Circuit Systems, Inc. ICS1700A QuickSaver Charge Controller for Nickel-Cadmium and Nickel-Metal Hydride Batteries General Description The I1CS1700A is a CMOS device designed for the intelligent charge control of either nickel-cadmium (NiCd) or nickel-met- al hydride (NiMH) batteries. The controller uses a pulsed-cur- rent charging technique together with voltage slope termination. The ICS1700A employs a four stage charge sc- quence that provides a complete recharge without overcharg- ing. The controller has four user-selectable charge rates available tor customized charging systems. The ICS1700A is a pin-for-pin replacement for the original ICS 1700 controller, The 1CS1700A monitors for the presence of a battery and begins charging if a battery is installed within the first 10 seconds after a reset. Voltage and temperature are measured to ensure a battery is within fast charge conditions before charge is initiated. Applications Battery charging systems for: - Portable consumer electronics - Power tools - Audio/video equipment - Communications equipment Block Diagram Features Multiple charge termination methods include: - Voltage slope ~ Maximum temperature ~ Charge timer e = Four stage charge sequence: - Soft start charge - Fast charge ~ Topping charge ~ Maintenance charge Reverse-pulse charging available in all charge stages Four programmable charge rates between 15 minutes (4C) and two hours (C/2) Out-of-temperature range detection - Hot battery: charger shutdown - Cold battery: low current charge e = Ten second polling mode for battery detection e = Battery fault with shutdown protection CHARGE SELECT POLLING/ VOLTAGE - [wicrocoDE conTroL| FAULT LED ADC SENSE / CHARGE | MODE LED OUTPUT TEMPERATURE PROCESSOR CONTROL STATUS LED | CHARGE ; CONTROL r eee ee NSE 3_ FAM [ROM DISCHARGE HOT CONTROL ST RESET RC [ OSCILLATOR QuickSaver is a registered trademark of Integrated Circuit Systems, Inc. H-3ICS1700A Pin Configuration CJ CHG ~{1 20 P- vob x oD DCHG ~2 19 P~ unused CHG 1 16 VDD PFN ~<{3 18 P VIN DCHG ~}2 15 P- unused ne ~]4 17 P- ne PEN 3 14P> VIN CMN ~<]5 b- VREF 16 CMN ~14 13 P- VREF ICS1700A ICS1700A nc | 6 15 b- nc OTN ~<{5 12D- THERM 2 < 7 THERM SELO <{6 11 RC OTN 14 SELO 8 RC vss ~<|7 10>- MAN x 13 P- VSS 9 1 MRN AVSS ~<a op- seu { 2p AVSS <]10 11 P- SEL1 16-Pin DIP 20-Pin SOIC J-4 J-7 Pin Definitions Pin Number Pin - | DIP. | soic , Name Type Definition | ! ] CHG : OUT Active high TTL compatible signal used to turn on an external current source 10 provide current to: | charge the battery. I : : : : | 2 2 | DCHG OUT Active high TTL compatible signal available to tum on a discharge circuit, | 3 3 PEN : OUT Polling fault indicator. An active low turns on an external indicator to show the controller is either polling | | : | for the presence of the battery or has determined the battery has been removed. 4 | 5 CMN OUT Charge mode indicator. A continuous low shaws the controller is in a soft start or fast charge. The indicator flashes during the topping and maintenance charges. | t li 5 7 OTN : OUT Out-of-temperature range indicator. An active low turns on an external indicator showing the battery is . | out of the normal fast charge temperature range. | 6 | 8 SELO IN Input used with the SEL] pin to program the device for the desired charge rate. 7 9 VSS Ground. 8 10 | AVSS Ground. | | 9 Wo SEL] | IN Input used with the SELO pin to program the device for the desired charge rate. 10 12: MRN IN Master reset signal. A logic low pulse greater than 700 ms initiates a device reset. : ' 11 13 RC IN An external resistor and capacitor sets the frequency of the internal clock. \ 12) 14 THERM IN Thermistor or thermal switch input for temperature sensing. / 13.) 16 | VREF 1.26V voltage reference, | 14 | 18 VIN IN Battery voltage normalized to one cell with an external resistor divider, | 15 19 unused Ground. | 16 20 VDD Device supply =+5.0 VDC i L 1 t Note: (DIP/SOIC) Pin 6/8 has an internal pull-up. Pin 9/11 has an internal pull-up. Pin 10/12 has an internal pull-up. Pin 12/14 has an internal pull-up. Pins 4. 6, 15, and 17 are unconnected in the SOIC package. H-4ICS1700A Controller Operation Charging Stages The charging sequence consists of four stages. The applica- tion of current is shown graphically in Figure }. The soft start stage gradually increases current levels up to the user selected fast charge rate during the first two minutes. The soft start stage is followed by the fast charge stage, which continues until termination. After termination, a two hour C/10 topping charge is applied. The topping charge is followed by a C/40 maintenance charge. Average Current Fast Charge Topping Charge Soft Start Charge Some batteries may exhibit an unusual high impedance condi- don while accepting the initial charging current, as shown in Figure 2. Unless dealt with, this high impedance condition can cause a voltage peak at the beginning of the charge cycle that would be misinterpreted as a fully charged battery by the voltage termination methods. The soft start charge eases batteries into the fast charge stage by gradually increasing the current to the selected fast charge rate. The gradual increase in current alleviates the voltage peak. During this stage, only positive current pulses are applied to the battery. The duty cycle of the applied current is increased to the selected fast charge rate, as shown in Figure 3, by extending the current pulse on every cycle until the pulse is about one second in duration. The initial current pulse is approximately 200ms. The CMN indicator is activated continu- ously during this stage Maintenance Charge Soft-Start (not to scale) | Stage 1 | Stage 2 | Stage 3 l Stage 4 0 2 min termination termination + 2 hours Time (not to scale) OO Figure 1: Graphical representation of average current leveis during the four charging stages 4.55 154 1.53 4.52 1.54 1.505 1.49 - a ao 14g. | 7 1.47 - 146 raph jf High Impedance Voltage Spike Voltage (volts/cell) ede ol ol 1. .-! Time (Samples) Figure 2: High impedance voltage spike at the beginning of charge H-5ICS1700A Initial Pulse Width KF Initial Pulse Width kI time TT increment Initial Pulse Width je? x increment time fp-___ oc time > cycle time _>- cycle time | Figure 3: Cycle-to-cycle increase of the soft-start current pulse widths Fast Charge In the second stage. the ICS1700A applies the charging current in a series of charge and discharge pulses. The technique consists of a positive current charging pulse followed by a high current, short duration discharge pulse. The cyele, shown with charge, discharge, rest and data acquisition periods in Figure 4, repeats every second until the batteries are fully charged. JL af The amplitude of the current pulse is determined by system parameters such as the current capability of the charging system, the desired charge rate, the cell capacity and the ability of that cell to accept the charge current. The ICS1700A can be set for four user-selectable fast charge rates from 15 minutes (4C) to two hours (C/2). Charge pulses occur approximately every second. The CMN indicator is activated continuously during this stage. rest time < rest voltage | time acquisitiontime = s_ | kk < _ fast charge pulse width i< cycle time => ' discharge pulse width 5 a Figure 4: Charge cycle showing charge and discharge current pulsesICS1700A The discharge current pulse amplitude is typically set to about 2.5 times the amplitude of the charging current based on 1.4V/cell. For example, if the charge current is 4 amps, then the discharge current is set at about 10 amps. The energy removed during the discharge pulse is a fixed ratio to the positive charge rate. The amplitude of the discharge pulse does not affect the operation of the part as described in this section. A voltage acquisition window immediately follows a brief rest time after the discharge pulse. No charge is applied during the rest time or during the acquisition window to allow the cell chemistry to settle. Since no current is flowing, the measured cell voltage is not obscured by any internal or external IR drops or distortions caused by excess plate surface charge. The 1CS1700A makes one continuous reading of the no-load battery voltage during the entire acquisition window. The voltage that is measured during this window contains less noise and is a more accurate representation of the true state of charge of the battery. cycle K time >_______ delay time ____________5}e Topping Charge The third stage is a topping charge that applies current at a rate low enough to prevent cell heating but high enough to ensure a full charge. The topping charge applies a C/10 charging current for two hours. The current consists of the same pulse technique used during the fast charge stage; however, the duty cycle of the pulse sequence has been extended as shown in Figure 5. Extending the time between charge pulses allows the same charging cur- rent used in the fast charge stage so that no changes to the current source are necessary. For example, the same charge pulse that occurs every second at a 2C fast charge rate will occur every 20 seconds for a topping charge rate of C/10. The CMN indicator flashes al a one second rate during this stage. Maintenance Charge The maintenance charge is intended to offset the natural self- discharge of NiCd or NiMH batteries by keeping the cells primed at peak charge. After the topping charge ends, the ICS1700A begins this charge stage by extending the duty cycle of the applied current pulses to a C/40 rate. The maintenance charge will last for as long as the battery voltage is greater than 0.5V at the VIN pin. The CMN indicator flashes at a one second rate during this stage. cycle time Figure 5: Representative timing diagram for topping and maintenance chargeICS1700A Charge Termination Methods Several charge termination schemes, including voltage slope, maximum temperature and a fast charge timer are available. The voltage slope method may be used with or without the maximum temperature method, Maximum temperature and the fast charge timer are available as backup methods. Voltage Slope Termination The most distinctive point on the voltage curve of a charging battery in response to a constant current is the voltage peak that occurs as the cell approaches full charge. By mathematically calculating the first derivative of the voltage, a second curve can be generated showing the change in voltage with respect to time as shown in Figure 6, The slope will reach a maximum just before the actual peak in the cell voltage. Using the voltage slope data, the ICS1700A calculates the point of full charge and accurately terminates the applied current as the battery reaches that point. The actual termination point depends on the charging characteristics of the particular battery. Cells that are not thoroughly conditioned or possess an unusual cell construction may not have a normal voltage profile. The ICS1700A uses an alternate method of charge termination based on a slight decrease in the voltage slope to stop charge to cells whose voltage profile is very shallow. This method looks for a flattentng of the voltage slope which may indicate a shallow peak in the voltage profile. The zero slope point occurs slightly beyond the peak voltage and is shown on the voltage curve graph. | Voltage | Voltage (volts/cell) mh Voltage Slope Maximum Temperature Termination Maximum temperature can be sensed using either a NTC ther- mistor or a thermal switch. Maximum temperature termination can also be bypassed if desired, although it is strongly recom- mended that some form of temperature termination be used. If an NTC thermistor is used, an internal voltage threshold determines when the battery is too hot to charge. As tempera- ture increases, the voltage across the thermistor will drop. This voltage is continually compared to the internal voltage thresh- old. If the thermistor voltage drops below the internal thresh- old, the OTN indicator is activated and the controller shuts down. The controller must be reset once the hot battery fault condition has cleared to restart the charge sequence. If a thermal switch is used, a 45C open circuit switch is recommended. When the thermal switch opens, an internal pull-up at the THERM pin results in a logic high which shuts down the controller and activates the OTN indicator. The controller must be reset once the hot battery fault condition has cleared to restart the charge sequence. Maximum temperature termination can be disabled by ground- ing the THERM pin. See the section on Temperature Sensing for more information. Fast Charge Timer Termination The controller uses a timer to limit the fast charge duration. These times are pre-programmed, and are automatically ad- justed in time duration according to the charge rate selected. Fast charge timer termination is best suited as a safety backup feature to limit the duration of the fast charge stage. The fast charge timer is always enabled and cannot be disabled. See Table 2 for more information. Inflection Point ; | Slope (volts/sample) Zero Slope 0 Poa alee Time (Samples) Figure 6: Voltage and slope curves showing inflection and zero slope points H-8ICS1700A Battery Polling Upon power-up or after a reset is issued, any excess charge from filter capacitors at the charging system terminals is re- moved with a series of discharge pulses. After the discharge pulse series is complete, the voltage at VIN must be greater than 0.5V when a battery is present. If the voltage at VIN is less than 0.5V, the ICS1700A assumes no battery is attached and initiates a polling sequence. The 1CS1700A then applies a 100ms charge pulse. During the pulse, the 1CS1700A monitors the VIN pin to determine if the divided down terminal voltage is greater than the internal 2.0V reference. If the battery is present, the voltage is clamped below the 2.0V reference when the current pulse is applied and the fast charge stage begins immediately. If a battery is not present, the voltage at VIN rises above the 2.0V reference and the PFN fault indicator is activated. The charge pulses repeat for 10 seconds. If the battery is installed within 10 seconds, the ICS1700A will turn off the PFN fault indicator and enter the soft start stage. If the battery is not installed within 10 seconds, the PFN fault indicator remains active and the ICS1700A shuts down. A reset must be issued to restart the controller after installing the battery. Battery Fault Detection The 1CS1700A will turn on the PFN fault indicator and shut down if the battery is removed or if an open circuit occurs in the current path anytime after fast charge has been initiated. When in the topping charge or maintenance charge stages, a charge pulse may not occur for several seconds. During the period between charge pulses, the voltage at VIN should be greater than 0.5V if a battery is attached. If the voltage at VIN is less than 0.5, the 1CS1700A assumes the battery has been removed, a fault condition is indicated by the PFN fault indi- cator, and the controller shuts down. Cold Battery Charging Cold battery charging is activated if a voltage at the THERM pin is in the cold battery voltage range, as shown in Figure 7. The ICS1700A checks for a cold battery before initiating fast charge. If a cold battery is present before fast charging begins, the ICS1700A begins a two hour C/10 topping charge (the pulsed duty cycle is based on the selected charge rate). If the battery is still cold after the two hour topping charge is com- plete, the 1CS1700A begins a C/40 maintenance charge. The maintenance charge will continue for as long as the battery remains cold. The thermistor voltage at the THERM pin is checked every second to see if the battery has warmed up. If so, the ICSI700A stops the topping charge or maintenance charge and begins a fast charge at a rate selected by the SELO and SEL 1 inputs. See the section on Temperature Sensing for more information. The CMN will flash at a one second rate, and the OTN indicator will be active, indicating that a low current charge is being applied to a battery that is outside the specified temperature range for fast charging. H-9ICS1700A Pin Descriptions The ICS1700A requires some external components to control the clock rate, sense temperature and provide an indicator display. The controller must be interfaced to an external power source that will provide the current required to charge a battery pack and, if desired, a circuit that will sink discharge current. Output Logic Signals: CHG, DCHG Pins The CHG and DCHG pins are active high, TTL compatible outputs. In addition to being TTL compatible, the CMOS outputs are capable of sourcing current which adds flexibility when interfacing to other circuitry. A logic high on the CHG pin indicates that the charging current supply should be acti- vated. If applicable, a logic high on the DCHG pin indicates that the discharge circuit should be activated. Care must be taken to control wiring resistance and inductance. The load resistor must be capable of handling this short dura- tion high-amplitude pulse. Table 1: Indicator Description List Indicators: CMN, PFN, OTN Pins The controller has three outputs for driving external indicators. These pins are active low. The three indicator outputs have open drains and are designed to be used with LEDs. Each output can sink over 20mA which requires the use of an external current limiting resistor. The three indicator signals denote fast charge stage, topping and maintenance stages, and the polling detect or battery fault and out-of-temperature range modes as shown in Table 1. The charge mode (CMN) indicator is activated continuously during the soft start and fast charge stages. The CMN indicator flashes at a one second rate when the ICS1700A is applying a topping or maintenance charge. The polling fault (PFN) indicator is on when the ICS1700A polis for a battery for the first 10 seconds. The controller applies periodic charge pulses to detect the presence of a battery. The indicator is a warning that these charge pulses are appearing at the charging system terminals at regular intervals. When a battery is detected, the indicator is turned off. The indicator is also active if the battery is removed from the system, warning that a fault has occured. The out-of-temperature range (OTN) indicator is active when- ever the voltage at the temperature sense (THERM) input enters a range that indicates that the attached battery is too hot to charge. The OTN indicator is also activated with the CMN indicator if the controller is initialized with the battery in the cold battery charge region. | PEN | CMN | OTN Description on : ! Polling mode or battery fault | : flash ' Maintenance and topping charge on Fast charge | - ; - / | | on [Hot battery shutdown | flash / on Cold battery charge | on on see Applications Information | on ; one flash | see Applications Information |ICS1700A Charge Rate Selection: SELO, SELI Pins The SELO and SEL! inputs must be programmed by the user to inform the ICS1700A of the desired charge rate. When a low level is required, the pin must be grounded. When a high level is required, no connection is required since each pin has an internal 75kQ pull-up to Vpp. The voltage ranges for low (L) and high (H) are listed in Table 6, DC Characteristics. To program the SELO and SEL] inputs, refer to the Charge Rate List in Table 2. Table 2: Charge Rate List The ICS1700A does not control the current flowing into the battery in any way other than turning it on and off. The required current for the selected charge rate must be provided by the users power source. The external charging circuitry should provide current at the selected charge rate. For example, to charge a 1.2 ampere hour battery in 30 minutes (2C), approxi- mately 2.4 amperes of current is required. a Fast Charge Topping Charge Maintenance Charge Timer Duration SELO : SEL1 Charge Rate Pulse Rate Pulse Rate (after reset) L L __4C (15 min) __| one every 40sec | one every 160 sec . 30min! Lo . 2C GO min) __|_one every 20 sec oneevery 80sec | 60 min HO. LC (60min) | oneevery 10sec | __oneevery 40sec | 90 mi Hd Hed C/2. 120 min) | one every 5 sec one every 20 sec | See the section on Controller Operation for additional information on the topping charge and maintenance charge. See the section on Charge Termination Methods for additional information on the charge timer.ICS1700A Master Reset: MRN Pin The MRN pin is provided to re-program the controller for a new charging sequence. This pin has an internal pull-up of about 75kQ. A logic low on the MRN pin must be present for more than 700ms for a reset to occur. As long as the pin is low, the controller is held in a reset condition. A master reset is required to change charge rates or clear a temperature fault condition. Upon power-up, the controller automatically re- sets itself. Clock Input: RC Pin The RC pin is used to set the frequency of the internal clock when an external | MHz clock is not available. An external resistor must be connected between this pin and Vpp. An external capacitor must be connected between this pin and ground. The frequency of the internal clock will be about | MHz with a 16kQ resistor anda |00pF capacitor. All time durations noted in this document are based on a | MHz clock. Operating the clock at a lower frequency will proportionally change all time durations. Operating the clock at a frequency significantly lower than | MHz, without adjusting the charge current ac- cordingly, will lessen the effectiveness of the fast charge imer and lower the accuracy of the controller. Operating the clock at a frequency greater than 1 MHz will also change all time durations and, without adjusting the charge current accord- ingly, may cause termination to occur due to the fast charge timer expiring rather than by the battery reaching full charge. The clock may be driven by a | MHz external 0 to 5V pulse provided the duty cycle is between 10% and 60%. The clock input impedance is about 1kQ. Temperature Sensing: THERM Pin The THERM pin is provided for hot and cold battery detection and for maximum temperature termination of fast charge when used in conjunction with an NTC thermistor. The THERM pin also provides for hot battery and maximum temperature termi- nation when used in conjunction with a normally closed ther- mal switch. Several internal voltage thresholds are used by the controller depending on whether a thermistor or a thermal switch is used. Figure 7 shows the internal thresholds over laid on a typical thermistor curve. e Using an NTC thermistor for hot and cold bat- tery detection: Trarmal Switch Temparature (C) Temperature > 45C Tamperature < 45C 50 | No charging permitted as due to a "not" opened thermal switch < ag 62 N & 35 . Cold battery charge z 30 NY due to aco thermistor EF as Y 20 . tN Fast charge allowed i 16 ~ using a thermistor > 40 29Q 83 No charging permitted as { | due to a hot thermistar osyv Fast charge allowed oo due to a closed thermal switch 0 10 20 30 40 50 Thermiator Temperature {C} Figure 7: Voltage levels for temperature sensing with a thermistor or thermal switch The THERM pin requires some thought if a thermistor is going to be used for hot and cold battery detection. The example below works for a typical 10kQ @ 25C NTC thermistor. Consider using the controller to prevent charging above 45C and reducing the current below 10C. At 10C the resistance of the thermistor is 18kQ. At 45C, the resistance drops to 4.7kQ. The ICS1700A has an intemal voltage threshold at 10C at 2.4V, and an internal voltage at 45C at 0.93V as shown in Figure 7. At 25C the voltage at the THERM pin is set at the midpoint of the thresholds: 2.40V - 0.93V 0.93V + 4 = 1,67V. The THERM pin has a 75kQ internal pull-up (Rpu). Using a resistor divider with JOkQ for the thermistor (Rth) and a external fixed resistor (Rtix), the divider looks like Figure 8 at 25C: Vop +5V Ruu= 75k Rex 1.67V THERM pin Ri=10k @ 25C Figure 8: Voltage divider at the THERM pin at 25C H-12ICS1700A To set the voltage at the THERM pin for 1.67V at 25C, the equivalent divider looks like Figure 9. +5 V 1.67V THERM pin R,,=10k 7 Figure 9: Equivalent voltage divider The parallel resistance Ry is calculated: 5.0V - 1.67V Ry= = 20kQ. 1.67V/10kQ The internal pull-up resistance Rpy and the parallel resistance Ry are known so the external fixed resistor can be calculated from: RpuR Rix = Rpu - R\ Substituting in known values: Rfix = 27.27kQ. A 27kQ stand- ard value is used for Rfix. Since the thermistor resistance Rth is specified by manufactur- ers at a particular temperature, the voltage across the thermistor Vih at that temperature can be calculated from: Rh Vin= (SV), Ry + Rr with the drop across the resistor divider equal to 5V. For this example, the calculated voltage with Rip=18kQ at 10C is 2.37 and with Rih=4.7kQ. at 45C the voltage is 0.95V. Table 3 lists the internal thresholds for hot and cold battery detection. If the voltage across the thermistor (at the THERM pin) drops below 0.93V, the ICS1700A will shut down due to a hot battery fault condition and will not restart unless reset. If the voltage dropped across the thermistor is above 2.4V before fast charge is initiated, the ICS1700A will begin a reduced current charge. See the Cold Battery Charging section for more information. Table 3: Thermistor Voltage Thresholds Battery Parameter Voltage | Temperature Cold Battery Thermistor >2.4 <10C _ Voltage Hot Battery Thermistor <0.93 >45C Voltage e Using a thermal switch for hot battery detection: A thermal switch that opens at about 45C is recommended. The thermal switch must be connected between the THERM pin and ground. When the thermal switch is closed, the voltage at the THERM pin must be below 0.5V for normal operation. When the thermal switch opens (see Figure 10), the internal pull-up at the THERM pin will raise the voltage above 4.2V and the [CS1700A will shut down and will not restart unless reset, Table 4 contains the internal voltage thresholds used with a thermal switch. Vp D THERM pin ; normally closed thermal switch opens at 45C Figure 10: Thermal switch to connection to ground at the THERM pin Table 4: Thermal Switch Voitage Thresholds ! Battery Parameter Voltage Temperature | Opened Thermal Switch >4.2 >45C ; Voltage . | -Closed Thermal Switch <0.5 | <45C (NoltageICS1700A e Using no temperature sensor: If a temperature sensor is not used, the THERM pin must be grounded. Voltage Input: VIN Pin The battery voltage must be normalized by an external resistor divider network to one ceil. The electrochemical potential of one cell is about 1.2V. For example, if the battery consists of six cells in series, the voltage at the VIN pin must be equal to the total battery voltage divided by six. This can be accom- plished with two resistors, as shown in Figure 11. To determine the correct resistor values, count the number of cells to be charged in series. Then choose either R1 or R2 and solve for the other resistor using: RL =R2x (# of cells -1) or R2 =_ Rl (# of cells - 1) VIN pin # of cells Figure 11: Resistor divider network at the VIN pin Voltage Reference: VREF Pin A 1.26V reference is present at this pin. The reference sets internal voltage references such as the 0.5V and 2.0V internal thresholds used by the controller for battery polling/fault de- tection and the analog/digital converter range. The reference provides a fast way of checking the internal thresholds. Measuring VREF with a high input impedance volt meter (>] M22) is required. The reference can only be used if it is buffered with a high impedance device having an input impedance greater than MQ. Buffering is essential to ensure that the internal voltage thresholds and analog/digital con- verter range and resolution are not altered. The reference may be overridden by an external 1.2V to 1.3V reference. Power: VDD Pin The power supply for the device must be connected to the VDD pin. The voltage should be +5 VDC and should be supplied to the part through a regulator that has good noise rejection and an adequate current rating. The controller requires up to a maximum of 11mA with Vpp=5.00V. Grounding: VSS, AVSS Pins There are two ground pins. Both pins must be connected together at the device. This point must have a direct connection to a solid ground plane.ICS1700A Data Tables Table 5: Absolute Maximum Ratings Supply Voltage 6.5 - v | Logic Input Levels . -0.5 to Vop + 0.5 | Vv | Ambient Operating Temperature : 0 to 70 C : Storage Temperature ; ; ; -55 to 150 C | Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only. Functional operation of the device at the Absolute Maximum Ratings or other conditions not consistent with the characteristics shown in this document is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. Table 6: DC Characteristics fl ~ r ee re = PARAMETER SYMBOL | TESTCONDITIONS. MIN | TYP MAX UNITS | Supply Voltage _ Vop 45 5.0 55 Vv | Supply Current ; Ipp . - 73 : mA : High Level Input Voltage ( Vin | 3.6 41 4.5 v |SELO, SELI | : . | Low Level Input Voltage | Vit | 0.73 0.75 0.8 v SELO, SEL1 | : : Low Level Input Current, pull-up | I. V=0.4V - 74 - LA THERM, MRN : : | i High Level Source Current lou V=Vpp-0.4V - 28 - mA CHG, DCHG . : . : oo. Low Level Sink Current lot V=0.4V - 25 - mA iCHG, DCHG : 4 7 |Low Level Sink Current, indicator | lot lve0.aVv | - 40 - mA | PFN, CMN Low Level Sink Current, indicator low 1V=0.4V - 28 - mA (OTN | 'Input Impedance . - 1.0 - MQ Analog/Digital Converter Range . 0-22 | 0-2,7 _ 0-2.7 - Vv Voltage Reference _ |. VREF 120! 1.26 131 Vv Table 7: DC Voltage Thresholds TAMB=25C | PARAMETER TYP UNITS I Minimum Battery Voltage ; 0.5 Vv | Maximum Battery Voltage ; 2.0 Vv Thermistor - Cold Temperature 2.4 Vv | Thermistor - Hot Temperature ae 0,93 v Thermal Switch - Open 4.2 ; v Thermal Switch - Closed 0.5 | VvICS1700A Table 8: Timing Characteristics R=16kQ2, C=100pF PARAMETER SYMBOL REFERENCE TYP UNITS Clock Frequency : 1.0 : MHz Reset Pulse Duration : (RESET : see Figure B ; 700 : ms | _Charge Pulse Width : (CHG see Figure A : 1048 . ms Discharge Pulse Width : IDCHG . see Figure A . 5.0 : ms | Rest Time . tR . see Figure A 4.0 : ms . | Data Acquisition Time : IDA ! see Figure A 16.4 ms | (Cycle Time ) (CYCLE see Figure A 1077 | ms | iCapacitor Discharge Pulse Width ' | | 5.0 | ms Capacitor Discharge Pulse Period | | 100 ms | Polling Detect Pulse Width | oom Polling Detect Pulse Period / : : 624 / ms Soft Start Initial Pulse Width : : : 200 : ms ' Soft Start Incremental Pulse Width ; / 7.0 , ms RESET to SEL Dynamic Reprogram Period ! (RSA see Figure B 1160 : ms Timing Diagrams Figure A: tors tr CHG | DCHG \ fi voltage ><> t tocus tr toa K__ leycie Figure B: teeser RESET SELO SEL1 tesaICS1700A Applications Information Jo ensure proper operation of the [CS1700A, external compo- nents must be properly selected. The external current source used must meet several important criteria to ensure optimal performance of the charging system. VIN Divider Resistors Figure 12 shows a typical application using the ICS1700A. R1 and R2 must be carefully selected to ensure that battery detec- tion and voltage termination methods operate properly. R1 and R2 are selected to scale the battery voltage down to the voltage of one cell. The following table shows some typical values. Additional information is available in the Voltage Input sec- tion. RI Cells ; . R? | l | Short _ Open 2 2.0k | 2.0k | 3 2.0k 1.0k | woe A. 3.0k a 1.0k | _. 5 12k _ 3.0k 6 , 10k 2.0k SD, [ 12k 2.0k 8 Ok | L.3k | PC Board Design Considerations It is very important that care be taken to minimize noise coupling and ground bounce. In addition, wires and connectors can add significant resistance and inductance to the charge and discharge circuits. When designing the printed circuit board, make sure ground and power traces are wide and bypass capacitors are used right at the controller. Use separate grounds for the signal, charge and discharge circuits. Separate ground planes on the compo- nent side of the PC board are recommended. Be sure to connect these grounds together at the negative lead of the battery only. For the discharge circuit, keep the physical separation between power and return (ground) to a minimum to minimize field radiation effects. This precaution is also applicable to the constant current source, particularly if it is a switch mode type. Keep the ICS1700A and the constant current source control circuits outside the power and return loop described above. These precautions will prevent high circulating currents and coupled noise from disturbing normal operation. Voltage Slope Termination In general, the voltage slope termination method works best for equipment where the battery is fast charged with the equipment off or the battery is removed from the equipment for fast charge. The voltage slope termination method works best with a constant current flow into the battery during fast charge. If equipment draws a known constant current while the battery is charging, this current should be added to the fast charge current. Equipment that randomly or periodically re- quires current from the battery during fast charge needs evalu- ation to ensure it does not interfere with the proper operation of the voltage slope termination method. Charging sources that produce decreasing current as fast charge progresses may cause a voltage inflection that may result in termination before full charge. For example, if the charge current is supplied through a resistor or if the charging source is a constant current type that has insufficient input voltage, the current will decrease and may cause a termination before full charge. Other current source characteristics that can cause a voltage inflection that is characteristic of a fully charged battery are inadequate ripple and noise attenuation capability or charge current decreasing due to thermal drift. Charging sources that have any of the above characteristics need evaluation to access their suitability for the application. The controller soft start stage, built-in noise filtering, and fast charge timer operate optimally when the constant cur- rent source charges the battery at the rate selected. If the actual charge current is significantly less than the rate se- lected, the conditioning effect of the soft start stage and the controller noise immunity are lessened. Also, the fast charge timer may cause termination based on time duration rather than by the battery reaching full charge due to inadequate charge current.ICS1700A Maximum Temperature Termination Maximum temperature termination is best suited as a safety back-up feature. Maximum temperature termination requires that the thermal sensor be in intimate contact with the battery. A low thermal impedance contact area is required for accurate temperature sensing. The area and quality of the contact sur- face between the sensor and the battery directly affects the accuracy of temperature sensing. Thermally conductive adhe- sives may have to be considered in some applications to ensure good thermal transfer from the battery case to the sensor. The thermal sensor should be placed on the largest surface of the battery for the best accuracy. The size of the battery is also a consideration when using temperature termination. The larger the battery, lower the surface area to volume ratio. Because of this, larger batteries are less capable in dissipating internal heat. Additional considerations beyond the basics mentioned above may be involved when using maximum temperature termina- tion where sudden changes in ambient temperature occur or where forced air cooling is used. For these applications, the surface area of the thermal sensor in contact with the battery compared to the surface area of the thermal sensor in contact with the ambient air may be significant. For example, bead type thermistors are relatively small devices which have far less thermal capacity compared to most batteries. Insulating the surface of the thermistor that is in contact with the ambient air should help minimize heat loss by the thermistor and maintain accuracy. Charging System Status by Indicator The fndicator Description List in Table 1 contains displays that are caused by charging system abnormalities. At power-up or after a reset is issued, one flash of the CMN indicator followed by a continuous PFN indication results from a voltage present at the battery terminals with the current source off and no battery. Check the current source and ensure that it produces no more than the equivalent of 350mV/cell when turned off with no battery. If the VIN divider resistors were not properly selected, an open circuit voltage that is actually less than the equivalent of 350mV/cell with the charger off and no battery will not divide down this open circuit voltage properly and produce a PFN fault indication. Check the VIN divider and ensure that it properly normalizes the battery voltage to the electrochemical potential of about 1.2V cell. Hf the PFN fault indicator is active immediately after power-up or after a reset is issued with the battery installed, then the constant current source is producing more than the equivalent of 350mV/cell when off and there is an open connection between the charger terminals and the battery. Check wires, connections, battery terminals, and the battery itself for an open circuit condition. If the CMN and OTN indicators are active together, this is an indication that the battery temperature has dropped to below 10C after a fast charge was initiated with the battery tempera- ture normal, If this condition is observed and the battery temperature did not drop after fast charge was initiated, check the thermistor circuit mechanically for poor contact and elec- trically for excessive noise. Enhanced Performance Characteristics The ICS1700A is an enhanced performance, pin-for-pin re- placement for the original 1CS | 700. Improved internal features provide additional capabilities. The charge sequence, voltage slope termination method, and analog-to-digital converter resolution allow the ICS1700A to charge either NIMH or NiCd batteries. The ICS1700A accepts either a thermal switch or thermistor input for temperature sensing. The polling mode for battery detection responds quickly to the removal of the battery throughout the charge sequence. The reset input debounce eliminates sensitivity to field effects and ground bounce when the PC board design recommendations cited in this document are employed. The temperature sense input debounce elimi- nates sensitivity to shock and vibration associated with the use of a thermal switch.ICS1700A vo > | easier SOURCE R3 (note 1) +5V +45V /\/* Q1 (note 2) +5 V (note 5) 1CS1700A to. 390 CHG t voo | 16 apa Ter TT 87HF (note 3) DCHG unused [| 15 FG Rt 27k (note 4) A FAULT 3 3 | PFN VIN | 14 an CHG 4 | CMN VREF | 13 OTN THERM [12 . o 6 _| SELO RC [11 +5V 7 | vss MAN | 10 Re rompers 8 | AVSS SEL1 L9__-, = options 047 pF Ww 16k u 100pF 10kQ lopen FS @ Cc @ 45C (note 6) Notes: = 1) Value of R3 determined by discharge current and capacity of battery pack. 2) Discharge FET is logic-level compatible in this application. 3) DC return of discharge FET must be connected close to negative battery terminal. 4) Resistor is needed only if a thermistor is used. Value may change depending on thermistor. 5) Regulated supply 6) Power ground; others are signal ground. Connect signal ground to power ground at negative battery terminal only. Figure 12: Functional Diagram Ordering Information ICS1700AN, ICS1700AM, or ICS1700AMT Example: ICS 10OKKA M Package Type N=DIP (Plastic) M=SOIC MT=SOIC Tape and Reel Device Type (consists of 3-5 digit numbers) Prefix ICS=Standard Device H-19