ADC12L080
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SNAS200B –OCTOBER 2004–REVISED MARCH 2013
ADC12L080 12-Bit, 80 MSPS, 450 MHz Bandwidth A/D Converter with Internal Reference
Check for Samples: ADC12L080
1FEATURES DESCRIPTION
2• Single Supply Operation The ADC12L080 is a monolithic CMOS analog-to-
• Low Power Consumption digital converter capable of converting analog input
• Power Down Mode signals into 12-bit digital words at 80 Megasamples
per second (MSPS). This converter uses a
• Internal or External Reference differential, pipeline architecture with digital error
• Selectable Offset Binary or 2's Complement correction and an on-chip sample-and-hold circuit to
Data Format minimize die size and power consumption while
• Pin-Compatible with ADC12010, ADC12020, providing excellent dynamic performance. The
ADC12040, ADC12L063, ADC12L066 ADC12L080 can be operated with either the internal
or an external reference. Operating on a single 3.3V
power supply, this device consumes just 425 mW at
APPLICATIONS 80 MSPS, including the reference current. The Power
• Ultrasound and Imaging Down feature reduces power consumption to just 50
• Instrumentation mW.
• Cellular Base Stations/Communication The differential inputs provide a full scale input swing
Receivers equal to ±VREF. The buffered, high impedance, single-
ended external reference input is converted on-chip
• Sonar/Radar to a differential reference for use by the processing
• xDSL circuitry. Output data format may be selected as
• Wireless Local Loops either offset binary or two's complement.
• Data Acquisition Systems This device is available in the 32-lead LQFP package
• DSP Front Ends and operates over the industrial temperature range of
−40°C to +85°C.
KEY SPECIFICATIONS
• Full Power Bandwidth: 450 MHz
• DNL: ±0.4 LSB (typ)
• SNR (fIN = 10 MHz): 66 dB (typ)
• SFDR (fIN = 10 MHz): 80 dB (typ)
• Power Consumption, 80 MHz
– Operating: 425 mW (typ)
– Power Down: 50 mW (typ)
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2004–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
ADC12L080
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SNAS200B –OCTOBER 2004–REVISED MARCH 2013
Pin Descriptions and Equivalent Circuits
Pin No. Symbol Equivalent Circuit Description
ANALOG I/O
2 VIN+
Differential analog signal Input pins. With a 1.0V reference voltage
the full-scale differential input signal level is 2.0 VP-P with each input
pin centered on a common mode voltage, VCM. The VIN- pin may be
3 VIN−connected to VCM for single-ended operation, but a differential input
signal is required for best performance.
Reference input. This pin should be connected to VAto use the
internal 1.0V reference. If it is desired to use an external reference
1 VREF voltage, this pin should be bypassed to AGND with a 0.1 µF low ESL
capacitor. Specified operation is with a VREF of 1.0V, but the device
will function well with a VREF range indicated in the Electrical Tables.
31 VRP
32 VRM
These pins are high impedance reference bypass pins only. Connect
a 0.1 µF capacitor from each of these pins to AGND. Connect a 1.0
µF capacitor from VRP to VRN. DO NOT LOAD these pins.
30 VRN
DIGITAL I/O
Digital clock input. The range of frequencies for this input is 10 MHz
10 CLK to 80 MHz with guaranteed performance at 80 MHz. The input is
sampled on the rising edge of this input.
Output format selection. When this pin is LOW, the output format is
offset binary. When this pin is HIGH the output format is two's
11 OF complement. This pin may be changed asynchronously, but such a
change will result in errors for one or two conversions.
PD is the Power Down input pin. When high, this input puts the
8 PD converter into the power down mode. When this pin is low, the
converter is in the active mode.
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ADC12L080
SNAS200B –OCTOBER 2004–REVISED MARCH 2013
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Pin Descriptions and Equivalent Circuits (continued)
Pin No. Symbol Equivalent Circuit Description
14–19, Digital data output pins that make up the 12-bit conversion results.
D0–D11
22–27 D0 is the LSB, while D11 is the MSB of the output word.
ANALOG POWER
Positive analog supply pins. These pins should be connected to a
quiet +3.3V source and bypassed to AGND with 0.1 µF low ESL
