SY58626L
DC-to-6.4Gb ps Backp lane T ran smi t Bu ffer with
Selectable Ou t pu t Pre-emphasis, I/O DC-Offset
Control, and 200mV-3.0VPP Output S wing
Precision Edge is a registered t radem ark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
June 2007
M9999-061207-C
hbwhelp@micrel.com or (408) 955-1690
General Description
The SY58626L high-speed, low jitter transmit buffer is
optimi zed for bac kplane and tr ansmiss ion line data-path
management applications in Automatic Test Equipment
(ATE) and Test & Measurement (T&M) systems. The
buff er includes a CML c ompatibl e, variable s wing outp ut
with selectable pre-emphasis. The SY58626L is
capable of driving serial data from DC through 6.4Gbps
with a 3VPP (1.5VPK single ended) differential swing.
The SY58626L differential input includes Micrel’s
unique, 3-pin input termination architecture that directly
interfaces to any DC- or AC-coupled, differential signal
as small as 100mVPK without any termination resistor
networks in the signal path. The outputs are 50Ω
source-terminated CML with a programmable output
swing from 200mVPP to 3VPP (100mVPK to 1.5VPK).
The S Y58626L includes an outp ut stage that provides 4
levels of pre-emphasis. The output pre-emphasis level is
programmed with a three-bit interface. Unlike other
transmitter solutions, the output pre-emphasis duration
can be programmed from 60ps to 400ps.
The SY58626L operates at 3.3V ±10% supply and is
guaranteed over the commercial temperature range of
0°C to +70°C . The SY5862 6L transm itter is optim ized to
work with the SY5 8627L re ceiver . T he SY58626L is p art
of Micrel’s high-speed, Precision Edge® product line.
Data sheets and support documentation can be found
on Micrel’s website at: www.micrel.com.
Precision Edge®
Features
• Transmit driver provides output pre-emphasis to
extend transmission range
• 4 selectable pre-emphasis levels
• Drives 6.4Gbps up to 12 FR4 PCB trace, or longer
combinations of FR4+cable+interconnect
• DC through 6.4Gbps data rate throughput
• Integrated loopback capability
• Unique pre-emphasis:
- Programmable pre-emphasis magnitude
- Programmable pre-emphasis duration
• Unique, flexible I/O:
- Internal termination to VTTIN pin interfaces to any
differential AC- or DC-coupled signals
- 50Ω source terminated CML outputs minimize
round-trip reflections
- Programmable output swing control: 200mV-
3.0VPP
- Output Disab le and output s hutdo wn
- DC-offset control with VTT I/O
• 3.3V ±10% supply voltage
• 0°C to +70°C temperature range
• Available in 32-pin (5mm x 5mm) QFN package
Applications
• ATE, T&M backplane management
• Combination FR4+cable+interconnect driver
• Cable drivers
• Electrical interface and interconnect applications that
require DC-offset control
Micrel, Inc.
SY58626L
June 2007 3 M9999-061207-C
hbwhelp@micrel.com or (408) 955-1690
Ordering Information(1)
Part Number Package Type Operating Range Package Marking Lead Finish
SY58626LMH QFN-32 Commercial SY58626L with
bar-line Pb-Free indica tor NiPdAu
Pb-Free
SY58626LMHTR(2) QFN-32 Commercial SY58626L with
bar-line Pb-Free indicat or NiPdAu
Pb-Free
Notes:
1. Contact f act ory for die availabi lity. Dice are guaranteed at TA = 25°C, DC Electricals only.
2. Tape and Reel.
Pin Configuration
32-Pin QFN
Micrel, Inc.
SY58626L
June 2007 4 M9999-061207-C
hbwhelp@micrel.com or (408) 955-1690
Pin Description
Pin Number Pin Name Pin Function
4, 5 TXIN, /TXIN
Differential inputs: This input pair is the differential signal input to the device. They
accept AC- or DC-coupled signals as small as 100mV (200mVPP). Note that this
input will default to an undetermined state if left open. TXIN and /TXIN internally
terminate to the VTTIN pin through 50Ω. Please refer to the “Input Interface
Applicat ion s” sect ion for more details.
7 VTTIN
Input termination center-tap: TXIN and /TXIN terminate to VTTIN. The VTTIN pin
provides a center -tap to the internal termination network for maximum interf ac e
flexibility and DC-offset capability. Please refer to the “Input Interface Applications”
section for more deta il s.
8 VREF-AC
Reference voltage: This output biases to VCC -1.3V. It is used for AC-coupling the
input pair (TXIN, /TXIN). Connect VREF-AC directly to the VTTIN pin. Bypass with a
0.01uF low ESR capacitor to VCC. Maximum sink/source current is ±1.5mA. Due to
the limited drive capability, the VREF-AC pin is only intended to drive the VTTIN pi n.
Please refer to the “Input Interface Applications” section for more details.
13 TXVCTRL
Analog input that controls TXQ output swing amplitude. The operating range of the
control input is from VREF-CTRL (max swing) to VCC (min swing). Control of the
output swing can be obtained by using a variable resistor between VREF-CTRL and
VCC with the wiper driving TXVCTRL. Output swing ranges from 100mVPK to
1.5VPK. When the TXQ output is selected for maximum swing amplitude of 1.5VPK,
no pre-emphasis is possible since the maximum swing cannot extend beyond
1.5VPK. For applications that only require a fixed, full CML swing, connec t
TXVCTRL to VREF-FIXED.
12 VREF-CTRL
Reference control voltage for TXVCTRL swing control. The operating range of the
control input is from VREF-CTRL (max swing) to VCC (min swing). Control of the
output swing can be obtained by using a variable resistor between VREF-CTRL and
VCC with the wiper driving TXVCTRL. Maximum sink/source current is ±1.5mA.
14 VREF-FIXED Reference output voltage: Connect this reference output pin directly to the
TXVCTRL input pin, and the TXQ output swing is fixed to 400mVPK (800mVPP).
24 /TXEN
TTL/CMOS (or VTH controlled) compatible control input for the TXQ Outputs pair.
When pulled HIGH, the TXQ Output pair is disabled. This input is internally
connected to a 25kΩ pull-down resistor and will default to a logic LOW state
(Enable) if left open. When disabled, the TXQ output goes LOW, and /TXQ goes
HIGH. Default thres hold is Vcc/2 when VTH pin is floating.
29 /TXLBEN
TTL/CMOS (or VTH controlled) compatible control input for the TXLBQ output pair.
When pulled HIGH, the TXLBQ output pair is disabled. This input is internally
connected to a 25kΩ pull-down resistor and will default to a logic LOW state
(Enable) if left open. When disabl ed, the TXLBQ output goes LOW, and /TXLBQ
goes HIGH. Default threshold is Vcc/2 when VTH pin is floating.
1 LBSEL
Loopback MUX select control: The TTL/CMOS (or VTH controlled) comp atible input
selects the input to the Loopback mode multiplexer. When LBSEL input is a logic
HIGH, the Loopback mode is selected, and the RXLBIN input pai r is selected to
pass through the TXQ output. Note that the LBSEL pin is internally connected to a
25kΩ pull-down resistor and will default to a logic LOW state if left open (normal
operation). The loopback MUX includes internal input isolation to minimize
crosst a lk.
30, 31 RXLBIN,
/RXLBIN
Loopback differential input pair: AC-coupled, CML compatible input. This input pair
includes internal termination connected to an internal VBB for a n AC-coup led bia s
configuration. The RXLBIN input pair receives a signal from the RX buffer
(SY58627L RXLBQ) loopback output. This input pair does not include any
equalization. When Loopbac k mode is selected, the signal at the RXLBIN input is
directed to the TXQ output.
Micrel, Inc.
SY58626L
June 2007 5 M9999-061207-C
hbwhelp@micrel.com or (408) 955-1690
Pin Description (Continued)
Pin Number Pin Name Pin Function
27, 28 TXLBQ,
/TXLBQ
Transmit loopback differential output: CML compatible output pair with 400mV swing
into a 50Ω load (100Ω across the pair). The TXLBQ output pair is providing a copy of
the TXIN input signal, bypas sing the pre-emphasis stage. The SY58626L loopback
function is opt imiz e d to operate with the SY58627L receiver, and the TXLBQ output
pair is AC-coupled directly to the TXLBIN input pair on the SY58627L.
23 /TXQSHDN
TXQ shutdown control pin: The TTL/CMOS (or VTH controlled) compatible pin is an
active LOW function. This input is internally connected to a 25kΩ pull-up resistor and
will default to a logic HIGH state if left open. When pulled LOW , the TXQ and /TXQ
output currents are shut off, and the TXQ and /TXQ output voltage is set to the same
potential. The actual voltage level is set by the resistor divider ratio established by
the internal 50Ω source resistors (connected to VTTOUT) and the external load.
Default threshold is Vcc/2 when VTH pin is floating.
2 VTH
Input logic threshold control voltage for logic control threshold settings other than
LVTTL/CMOS. This input control pin can be externally bias ed to set the proper
threshold for all the logic control pins, /TXEN, LBSEL, /TXLBEN, 3-bit pr e-emphasis
control, 2-bit pre-emphasis duration control, and /TXQSHDN. For standard
LVTT L/CM OS control, simply leave the VTH pin floating and the threshold voltage
defaults to VCC/2 (When VEE=0V). For LVPECL thresholds, set VTH to Vcc-1.3V.
21, 20 TXQ,
/TXQ
Differential variable swing output pair: This CML output pair is the output of the
device. This output is designed to drive 100mVPK to 1.5VPK into 50Ω (100Ω across
the pair) with variable pre-emphasis. TXQ outputs include 50Ω sour ce termination
resistors. When the loopback mode is selected, the TXQ output pair is driven by the
RXLBIN inputs.
19, 22 VTTOUT
Output termi nati on cent er-t ap : Each sid e of the diff erent ial ou tput pair term inates to
th e VTTOUT pin through 50Ω. The VTTOUT pin provides a center-tap to the output
termination network for maximum interface flexibi lity, and DC-offset capability.
Please refer to the “CML Output Interface Appl ications” section for more details.
17
18
32
MAG_CTRL0
MAG_CTRL1
MAG_CTRL2
Pre-emphasis magnitude level control input: TTL/CMOS (or VTH controlled)
compatible, 3-bit control interface. There are four l evels of pre-emphasis magnitude,
as shown in the “Pre-Emphasis Magnitude Truth Table.” When MAG_CTRL2 (MSB)
is logic 1, pre-emphasis is disa bled and the TX Q outputs will not incl ude any pre-
emphasis. Pre-emphasis magnitude ranges from 10% to 33% above the base swing.
10
11 DUR_CTRL0
DUR_CTRL1
Pre-emphasis duration control input. TTL/CMOS (or VTH controlled) compatible, 2-bit
control interface. This control establ ishes the pre-emphasis duration. Duration ranges
from 60ps to 400ps typical as shown in the “Pre-emphasis Duration Control Truth
Table.” Pre-emphasis duration is measured from the m id-point of the pre-emphasis
magnitude (50% point). Please refer to the “Pre-emphasis Output Description” for
details.
9, 15, 26 VCC Positive power supply: Connect to +3.3V power supply. Bypass with 0.1µF//0.01µF
low ESR capacitors as close to VCC pins as possible.
3, 6, 16, 25 VEE,
Exposed Pad Ground: Ground pins and exposed pad must be connec ted to the same ground
plane.
Micrel, Inc.
SY58626L
June 2007 6 M9999-061207-C
hbwhelp@micrel.com or (408) 955-1690
Pre-emphasis Magnitude Truth Table
Disable Mag Sele ct
(MSB=MAG_CTRL2) Magnitude Select
(MAG_CTRL1) Magnitude Select
(MAG_CTRL0) Pre-emphasis
Magnitude
0 0 0 10%
0 0 1 15%
0 1 0 25%
0 1 1 33%
1 X X Disabled
Pre-emphasis Duration Control Truth Table
Duration DUR_CTRL1 DUR_CTRL0 Typical Data Rate Time Duration
Minimum (Shortest) 0 0 3.2Gbps-6.4Gbps 60ps
Medium-short 0 1 100ps
Medium-long 1 0 DC-3.2Gbps 200ps
Longest 1 1 400ps
Pre-emphasis Output Description
Micrel, Inc.
SY58626L
June 2007 7 M9999-061207-C
hbwhelp@micrel.com or (408) 955-1690
Absolute Maximum Ratings(1)
Supply Voltage (VCC) ............................................... -0.5V to +4.0V
Input Voltage (VIN) ...................................................... -0.5V to VCC
Input Current (TXIN, /TXIN, ≤120mins) ................................ 67mA
CML Output Current (IOUT)
Continuous (≤120mins) ..................................................... 67mA
Surge .............................................................................. 100mA
Termination Current
VT .................................................................................. ±100mA
VREF-AC Current
Source/sink current on VREF-AC .......................................... ±2mA
Source/sink current on VREF-CTRL ....................................... ±2mA
Lead Temperature (soldering, 20 sec.) .............................. +260°C
Storage Temperature (TS) ..................................... -65°C to 150°C
Operating Ratings(2)
Supply Voltage (VCC) .................................... +3.0V to +3.6V
Ambient Temperature (TA) ............................... 0°C to +70°C
Package Thermal Resistance(3)
QFN (θJA)
Still-Air ............................................................... 34°C/W
QFN (ΨJB)
Junction-to-Board .............................................. 20°C/W
DC Electrical Characteristics(4)
TA= 0°C to +70°C; unless otherwise stated.
Symbol Parameter Condition Min Typ Max Units
VCC Power Suppl y 3.0 3.3 3.6 V
IEE Power Supply Current Max VCC, includes 50Ω internal
source resistors, 1.5VPK output
swing, no ex ternal load current
290 370 mA
RIN Input Resistance
(TXIN-to-VTTIN) 45 50 55 Ω
RDIFF_IN Differential Input R esistance
(TXIN-to-/TXIN) 90 100 110 Ω
VIH Input High Voltage
(TXIN, /TXIN) VEE+1.5 VCC V
VIL Input LO W Voltage
(TXIN, /TXIN) VEE+0.7 VIH-0.1 V
VIN Input Voltage Swing
(TXIN, /TXIN) See Figure 4a. 0.1 1.5 VPK
VDIFF_IN Differential Input Voltage Swing
|TXIN-/TXIN| See Figure 4b. 0.2 VPP
VTTIN TXIN-to-VTTIN
(TXIN, /TXIN) 1. 28 V
VTTIN
Range VTTIN Voltage Range Voltage applied to VTTIN pin VEE+1.7 VCC+0.1 V
VTTOUT
Range VTTOUT Voltage Range Voltage applied to VTTOUT pin VCC-1.5 VCC+1.5 V
Notes:
1. Permanent device dam age may occur if absolute maximum ratings are exceeded. This is a stress rating only and functi onal operation is
not implied at conditions other than thos e detai l ed in the operational sections of this data sheet. Exposure to absolute maximum ra ti ngs
conditi ons for extended periods may aff ect device reli abili t y.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package thermal resist ance assumes exposed pad is soldered (or equivalent) to the devices most negative pot enti al on the PCB. θJA and
ΨJB values are determined for a 4-layer board in still air unless otherwise st ated.
4. The ci rcuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been establis hed. 500lfpm
Airflow. TJ < 125°C.
Micrel, Inc.
SY58626L
June 2007 8 M9999-061207-C
hbwhelp@micrel.com or (408) 955-1690
TXQ Outputs DC Electrical Characteristics(5)
VCC = 3.3V ±10%; VEE = 0V; TA = 0°C to + 70°C; RL = 100Ω across output pair; unless otherwise stated.
Symbol Parameter Condition Min Typ Max Units
VOUT
Range Output Voltage Range
(TXQ, /TXQ) VCC-1.5 VCC V
VOUT
TXQ Output Voltage Swing
(TXQ, /TXQ)(6)
Maxim um Swing (TXVCTRL =
VREF-CTRL)
No pre-emphasis 1500
mVPK
Minimum Swing
(TXVCTRL = VCC) 100
Fixed Output Swing
(TXVCTRL = VREF-Fixed) 325 400
Maxim um Swing (TXVCTRL =
VREF-CTRL)
No pre-emphasis 3000
VDIFF_OUT TXQ Differential Output Voltage
Swing
|TXQ-/TXQ|
(7)
Minimum Swing
(TXVCTRL = VCC) 200 mVPP
Fixed Output Swing
(TXVCTRL = VREF-Fixed) 650 800
ROUT Output Resistance 45 50 55 Ω
VREF-AC Output Voltage Reference VCC-1.4 VCC-1.3 VCC-1.2 V
VREF-CTRL VREF-CTRL Output Voltage VCC-1.4 VCC-1.3 VCC-1.2 V
TXVCTRL Output Swing Control Voltage
Range VREF-AC VCC V
ITX QSHDN TXQ Shutdown Leakage Current -500 500 µA
TXLBQ CML Output DC Electrical Characteristics(5)
VCC = 3.3V ±10%; VEE = 0V; TA = 0°C to + 70°C; RL = 100Ω across output pair; unless otherwise stated.
Symbol Parameter Condition Min Typ Max Units
VOH TXLBQ Output High Voltage RL = 50Ω to Vcc VCC-0.040 VCC-0.010 VCC V
VOUT TXLBQ Output Voltage Swing
(TXLBQ, /TXLBQ)(6) 325 400 mVPK
VDIFF_OUT TXLBQ Differential Output
Voltage Swing
|TXLBQ-/TXLBQ|(7)
650 800 mVPP
ROUT Output Impedance 45 50 55 Ω
Notes:
5. The ci rcuit is designed to meet the DC specifications shown in the above table after therm al equilibrium has been est ablis hed. 500lfpm
Airflow. TJ < 125°C.
6. Pleas e refer to figure 4a.
7. Pleas e refer to figure 4b.
Micrel, Inc.
SY58626L
June 2007 9 M9999-061207-C
hbwhelp@micrel.com or (408) 955-1690
Logic Control DC Electrical Characteristics(8)
VCC = 3.3V ±10%; VEE = 0V; TA = 0°C to + 70°C; unless otherwise stated.
Symbol Parameter Condition Min Typ Max Units
VIH Input HIGH Voltage All control input pins VTH+0.2 VCC V
VIL Input LO W Voltage All control input pins VEE VTH–0.2 V
VCTRL Output Swing Control Voltage
Range at TXVCTRL VREF-CTRL VCC V
IIH Input HIGH Current 300 µA
IIL Input LO W Current -300 µA
VTH Threshold Input Voltage Voltage applied to pin
(VEE = 0V) 1.4 VCC/2 2.6 V
Notes:
8. The ci rcuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been est ablis hed. 500lfpm
Airflow. TJ < 125°C.
Micrel, Inc.
SY58626L
June 2007 10 M9999-061207-C
hbwhelp@micrel.com or (408) 955-1690
AC Electrical Characteristics(9)
VCC = 3.3V ±10%; VEE = 0V; TA = 0°C to + 70°C; RL = 100Ω across output pair; unless otherwise stated.
Symbol Parameter Condition Min Typ Max Units
Freq
Data Rate Throughput (TXQ)
1.5VPK output swing,
No pre-emphasis DC 6.4
Gbps
400mV output swing,
33% pre-emphasis DC 6.4
Data Rate Throughput (TXLB Q) 400mV output swing DC 6.4 Gbps
tpd Differential Propagation Delay
TXIN-to-TXQ (VIN >200mVPK) 150 250 450 ps
RXLBIN-to-TXQ 250 ps
tpd Tempco Differential Propagation Delay
Temperature Coefficient 120 fs/oC
tEN TXQ Enable/Disable Time /TXEN 600 ps
tLB_EN TXLBQ Enable/Disable Time /TXLBEN 200 ps
tSHDN TXQ Shutdown Ti m e
/TXQ_SHDN HIGH-to-LOW
(TXQ Outputs SHUTDOWN) 3 4.5 ns
/TXQ_SHDN LOW-to-HIGH
(TXQ Outpu ts ON) 3 4.5
tLBSEL Loopback Select Time LBSEL 350 600 ps
tPROG Programming Logic Control Time 3-bit pre-emph asi s mag nitu de,
2-bit duration control
update-to-valid TXQ 1 ns
MAG_CTRL Pre-emphasis Magnitude
(Percent beyond base swing)
MAG_CTRL (2,1,0)
(0,0,0) 10
%
(0,0,1) 15
(0,1,0) 25
(0,1,1) 33
(1,X,X) 0
DUR_CTRL Pre-emphasis Duration
DUR_CTRL (1,0)
Minimum (shortest) 60
ps
Medium-short 100
Medium-long 200
Longest 400
tSKEW Part-to-Part Skew Note 10 200 ps
tJITTER Random Jitter (RJ) Note 11, 13, 14, 15 1 ps
Deterministic Jitter (DJ) Note 12, 13, 14, 15 15 ps
tr, tf Output Rise/Fall Time (20% to 80%) At full output swing 20 50 80 ps
Notes:
9. High-frequency AC-parameters are guaranteed by design and characterizati on.
10. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at
the respective inputs.
11. This jitt er is the RMS difference between the RJ measured at the end of a 9in FR4 transmission line driven by the SY58626 and the
signal source.
12. This jitt er is a differenc e between the DJ measured at the end of a 9in FR4 transmission path driven by an SY58626 and the signal
source.
13. PE Mag: 010 and PE Dur: 10.
14. The typical jit ter is measured at 4.25Gbps and 6.4Gbps using PRBS 27 pattern and 4.25Gbps using K28.5 pattern.
15. The transmission l i ne is different i al 6mi l FR4 stri pline with 100Ω differential impedance.
Micrel, Inc.
SY58626L
June 2007 11 M9999-061207-C
hbwhelp@micrel.com or (408) 955-1690
Detailed Description
The SY58626L is a high speed, low jitter transmit
buffer with integrated loopback capability. Adjustable
pre-em phasis am plitudes and s electa ble pre-emphasis
durations are included with the transmitter. The
SY58626L also includes disable and shutdown control
for the transmitter output.
Transmitter
The SY58626L transmitter includes the VTTIN and
VTTOUT pin for maximum interface flexibility and DC-
offset capability for the input and output, respectively.
This feature allows for interfacing with different logic
families without the use of AC-coupling. The output
buffer has internal 50Ω source terminated CML
outputs for minimizing round-trip reflections.
Figure 1. Variable Output Swing Circuit
Transmitter Variable-Swing Output Buffer
• Connectin g VR EF -CT R L to TX VCTRL sets the
transmitter output buffer to max swing 1.5VPK
(3.0VPP).
• Connecting VCC to TXVCTRL sets the
transmitter output buffer to minimum swing
100mVPK (200mVPP).
• Connecting VREF-FIXED to TXVCTRL sets
the transmitter output buffer to 400mVPK
(800mVPP).
• Control of the transmitter output swing buffer
can be obtained by using a variable resistor
connected between VREF-CTRL and VCC
with the wiper driving TX VCTRL. Please refer
to Figure 1 for more details.
Transmitter Disable and Shutdown
The SY58626L provides two methods to turn off the
output whe n desired. W hen /TXEN is pulled HIGH, the
transmitter output pair is disabled. TXQ goes to a LOW
state and /TXQ goes to a HIGH state. When
/TXQSHDN is pulled LOW, the transmitter output pair
is in shutdown mode. TXQ and /TXQ output currents
are shut off and the TXQ and /TXQ outputs are set to
the same potential. The threshold for the /TXEN and
/TXQSHDN pins is set with the VTH pin. Please refer
to the “Typical Operating Characteristics” for more
details.
Loopback
The SY58626L features a loopback test mode,
activated by setting LBSEL to logic HIGH. Using the
SY58626L with the SY58627L enables local loopback
and link side loopback, shown in Figures 2b and 2c.
This mode enables an external loopback path,
bypassing circuitry on both local and link side. Please
refer to Table 1 and Figure 3 for Loopback Control
information.
Figure 2a. Normal Operation
Micrel, Inc.
SY58626L
June 2007 12 M9999-061207-C
hbwhelp@micrel.com or (408) 955-1690
Figure 2b. Local Loopback Mode
Figure 2c. Link Side Loopback Mode
TXLB TXLBENb TXENb TXQ TXLBQ
Normal
Mode
0 0 0 TXIN TXIN
0 0 1 0 TXIN
0 1 0 TXIN 0
0 1 1 0 0
Link Side
Loopback
Mode
1 0 0 RXLBIN TXIN
1 0 1 0 TXIN
1 1 0 RXLBIN 0
1 1 1 0 0
Table 1. Transm it Loopback Control Signal
Figure 3. Loopback Control Pin
Micrel, Inc.
SY58626L
June 2007 14 M9999-061207-C
hbwhelp@micrel.com or (408) 955-1690
Typical Operating Characteristics (Continued)
VCC = 3.3V ±10%; VIN > 400mV; TA = 25°C, RL = 100Ω across output pair; unless otherwise stated.
Output Disable Output Shutdown
Time (250ns/div.)
Time (250ns/div.)
HIGH
LOW
LOW
HIGH
/TXQ
TXQ
/TXEN
LOW
HIGH
TXQ
/TXQ
/TXQSHDN
Micrel, Inc.
SY58626L
June 2007 15 M9999-061207-C
hbwhelp@micrel.com or (408) 955-1690
Single-Ended and Differential Swings
Figure 4a. Single-Ended Volta ge Swing
Figure 4b. Differential Voltage Swing
Input and Output Stages
Figure 5a. Simplified Differential Input Stage
Figure 5b. Simplified Differential Output Stage
Micrel, Inc.
SY58626L
June 2007 16 M9999-061207-C
hbwhelp@micrel.com or (408) 955-1690
Input Interface Applications
Figure 6a. LVPECL Interface
(DC-Coupled)
Figure 6b. LVPECL Interface
(AC-Coupled)
option: may connect VTTIN to VCC
Figure 6c. CML Interface
(DC-Coupled)
Figure 6d. CML Interface
(AC-Coupled)
Figure 6e. LVDS Interface
(DC-Coupled)
Micrel, Inc.
SY58626L
June 2007 17 M9999-061207-C
hbwhelp@micrel.com or (408) 955-1690
CML Output Interface Applications
Figure 7a. CML DC-Coupled
Termination
Figure 7 b. CML DC-Coupled
Termination
Figure 7c. CML AC-Coupled
Termination
Related Product and Support Information
Part Number Function Datasheet Link
SY58627L DC-to-6.4Gbps Backplane Receive Buffer with 4-
Stage Programmable Equalization and DC-Offset
Control
www.micrel.com/product-info/products/sy58627u.shtml
HBW Solutions New Products and Applications www.micrel.com/product-info/products/solutions.shtml
Micrel, Inc.
SY58626L
June 2007 18 M9999-061207-C
hbwhelp@micrel.com or (408) 955-1690
Package Information
32-Pin QFN
Package Not es:
1. Package meets Level 2 Moisture Sensitivity Classification.
2. All parts are dry-packed before shipment.
3. Exposed pad must be soldered to a ground for proper thermal management.
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/ /www.micrel.com
The i nformation furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibili ty is
assumed by Micrel for
its use. Micrel reserves the right to change circuitry and specif ications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support applianc es, devices or systems where malfunction of a
product can reasonably be expected to result i n personal i nj ury. Lif e support devices or systems are devices or systems that (a) are intended for
surgical implant int o the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant
injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk
and Purchaser agrees to fully indem nify Micrel f or any damages resulting from such use or sale.
© 2005 Micrel, Incorporated.
