6478F–ATARM–25-Jul-11
SAM3U-EK Evaluation Kit
....................................................................................................................
User Guide
1-2 SAM3U-EK Evaluation Kit User Guide
6478F–ATARM–25-Jul-11
SAM3U-EK Evaluation Kit User Guide 1-1
6478F–ATARM–25-Jul-11
Section 1
Introduction.................................................................................................................1-1
1.1 SAM3U Evaluation Kit........................................................................................................ 1-1
1.2 User Guide ......................................................................................................................... 1-1
1.3 References and Applicable Documents............................................................................. 1-1
Section 2
Kit Contents ................................................................................................................2-1
2.1 Deliverables ....................................................................................................................... 2-1
2.2 Electrostatic Warning ......................................................................................................... 2-2
Section 3
Power Up....................................................................................................................3-1
3.1 Power up the Board ...........................................................................................................3-1
3.2 Battery................................................................................................................................ 3-1
3.3 DevStart ............................................................................................................................. 3-1
3.4 Recovery Procedure .......................................................................................................... 3-1
3.5 Sample Code and Technical Support ................................................................................ 3-2
Section 4
Evaluation Kit Hardware .............................................................................................4-1
4.1 Board Overview.................................................................................................................. 4-1
4.2 Features List ...................................................................................................................... 4-2
4.3 Function Blocks.................................................................................................................. 4-2
4.3.1 Processor............................................................................................................. 4-2
4.3.2 Memory................................................................................................................ 4-2
4.3.3 Clock Circuitry...................................................................................................... 4-4
4.3.4 Reset and Wake-Up Circuitry .............................................................................. 4-5
4.3.5 Power Supply and Management.......................................................................... 4-6
4.3.6 UART ................................................................................................................... 4-7
4.3.7 USART................................................................................................................. 4-7
4.3.8 LEDs .................................................................................................................... 4-8
4.3.9 LCD, Backlight Control and Touch Panel ............................................................ 4-8
4.3.10 JTAG.................................................................................................................. 4-11
4.3.11 Audio Codec ...................................................................................................... 4-11
4.3.12 USB ................................................................................................................... 4-13
4.3.13 ADC Input ........................................................................................................ 4-14
4.3.14 User Buttons ...................................................................................................... 4-14
4.3.15 G-Sensor ........................................................................................................... 4-15
4.3.16 Temperature Sensor.......................................................................................... 4-16
4.3.17 SD Card ............................................................................................................. 4-16
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6478F–ATARM–25-Jul-11
4.3.18 ZigBee ............................................................................................................... 4-17
4.3.19 PIO Expansion ................................................................................................... 4-18
4.4 Configuration.................................................................................................................... 4-19
4.4.1 PIO Usage ......................................................................................................... 4-19
4.4.2 Jumpers ............................................................................................................. 4-22
4.4.3 Test Points ......................................................................................................... 4-23
4.4.4 Solder Drops...................................................................................................... 4-23
4.4.5 Assigned PIO Lines, Disconnection Possibility.................................................. 4-23
Section 5
Schematics .................................................................................................................5-1
5.1 Schematics......................................................................................................................... 5-1
Section 6
Troubleshooting..........................................................................................................6-1
6.1 Self-Test............................................................................................................................. 6-1
6.2 Board Recovery ................................................................................................................. 6-1
Section 7
Errata..........................................................................................................................7-1
7.1 JTAG/ICE: Missing Pull-up Resistor on TDO Pin............................................................... 7-1
Section 8
Revision History..........................................................................................................8-1
8.1 Revision History ................................................................................................................. 8-1
SAM3U-EK Evaluation Kit User Guide 1-1
6478F–ATARM–25-Jul-11
Section 1
Introduction
1.1 SAM3U Evaluation Kit
The SAM3U Evaluation Kit (SAM3U-EK) allows the evaluation of the SAM3U series devices. It has
enough features to demonstrate most of the product’s capabilities to the users. The SAM3U-EK also fea-
tures extension connectors to allow the users to add new interfaces in case they are not on-board.
1.2 User Guide
This guide gives details on how the SAM3U-EK has been designed. It is made up of 6 sections:
Section 1 includes references, applicable documents.
Section 2 describes the kit contents, its main features.
Section 3 provides instructions to power up the SAM3U-EK and describes how to use it.
Section 4 describes the hardware resources, and includes default jumper and switch settings, and the
schematics.
Section 5 provides all the board schematics.
Section 6 gives troubleshooting recommendations.
1.3 References and Applicable Documents
Table 1-1. References and Applicable Documents
Title Comment
SAM3U Datasheet SAM3U products on Atmel Web site
SAM3U-EK Evaluation Kit User Guide 2-1
6478F–ATARM–25-Jul-11
Section 2
Kit Contents
2.1 Deliverables
The Atmel® SAM3U-EK toolkit contains the following items:
a SAM3U-EK board
power supply
universal input AC/DC power supply with US, Europe and UK plug adapters
one 3V Lithium Battery type CR1225
one USB cable
one serial RS232 cable
A Welcome Letter
Figure 2-1. Unpacked SAM3U-EK
Unpack and inspect the kit carefully. Contact your local Atmel distributor, should you have issues con-
cerning the contents of the kit.
Kit Contents
2-2 SAM3U-EK Evaluation Kit User Guide
6478F–ATARM–25-Jul-11
2.2 Electrostatic Warning
The SAM3U-EK board is shipped in a protective anti-static package. The board must not be subjected to
high electrostatic potentials. A grounding strap or similar protective device should be worn when han-
dling the board. Avoid touching the components or any other metallic element of the board.
SAM3U-EK Evaluation Kit User Guide 3-1
6478F–ATARM–25-Jul-11
Section 3
Power Up
3.1 Power up the Board
Unpack the board taking care to avoid electrostatic discharge. Unpack the power supply, select the right
power plug adapter corresponding to that of your country, and insert it in the power supply.
Connect the power supply DC connector to the board and plug the power supply to an AC power plug.
The board LCD should light up and display a welcome page. Then, click or touch icons displayed on the
screen and enjoy the demo.
3.2 Battery
The SAM3U-EK ships with a 3V coin battery.
This battery is not required for the board to start up.
The coin battery is provided for user convenience in case the user would like to exercise the date and
time backup function of the SAM3U series devices when the board is switched off.
3.3 DevStart
The on-board NAND Flash contains “SAM3U-EK DevStart”.
It is stored in the “SAM3U-EK DevStart” folder on the USB Flash disk available when the SAM3U-EK is
connected to a host computer and you click on the Flash Disk icon of the on-board demo.
Click the file “welcome.html” in this folder to launch SAM3U-EK DevStart.
SAM3U-EK DevStart guides you through installation processes of IAR™ EWARM, Keil MDK and GNU
toolkits. Then, it gives you step-by-step instructions on how to rebuild a single example project and how
to program it into the SAM3U-EK. Optionally, if you have a SAM-ICE™, instructions are also given about
how to debug the code.
We recommend that you backup the “SAM3U-EK DevStart” folder on your computer before
launching it.
3.4 Recovery Procedure
The DevStart ends by giving step-by-step instructions on how to recover the SAM3U-EK to the state as it
was when shipped by Atmel.
Follow the instructions if you deleted the contents of the embedded Flash or the NAND Flash and want
to recover from this situation.
Power Up
3-2 SAM3U-EK Evaluation Kit User Guide
6478F–ATARM–25-Jul-11
3.5 Sample Code and Technical Support
After boot up, you can run some sample code or your own application on the development kit. You can
download sample code and get technical support from Atmel website
http://www.atmel.com/products/at91/default.asp?category_id=163&family_id=605&source=left_nav
Figure 3-1. Atmel Website for SAM3U Series
SAM3U-EK Evaluation Kit User Guide 4-1
6478F–ATARM–25-Jul-11
Section 4
Evaluation Kit Hardware
4.1 Board Overview
This section introduces the Atmel SAM3U Evaluation Kit design. It introduces system-level concepts,
such as power distribution, memory, and interface assignments.
The SAM3U-EK board is based on the integration of an ARM® Cortex®-M3 processor with on-board fast
PSRAM (pseudo-static RAM), NAND Flash and a set of popular peripherals. It is designed to provide a
high performance processor evaluation solution with high flexibility for various kinds of applications.
Figure 4-1. SAM3U-EK Block Diagram
PIO
SAM3U-LQFP144
SAM3U
SWJ-DPUART
System Controller
System Controller
External Memory
External Memory
EBI / 3.3v
EBI / 3.3v
PSRAM
NAND
FLASH
Multimédia Cards Interface
Multimedia Cards Interface
MCI
MCI
USART
USART USB
USB
Device
Device
PIO
PIO
TWI
TWI
oooooooo
oooooooo
4/8 bits
interface
SD/MMC
Micro
Line In
HeadPh
oooooooo
oooooooo
LCD TFT
240 * 320
LCD TFT
240 * 320
PWM
PWM
RS232
Codec
WM8731
Led
User I/OAudioMultimedia CardTFT LCDMain Memory
Touch
Screen
Touch
Screen
BNC * 2VCC 5V JTAGRS232USB Device
High / Full
RS232ZIGBEET°
Power /
Shdn
Push Btn
ADS7843
ADS7843
HX8347
HX8347
SPI
SPI
CD
SSC
SSC
ooooo
ooooo
ZIGBEE
ZIGBEE
Analog
Analog
TWI
TWI
MCP9800
Back Light
AAT3194
RS232
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4.2 Features List
Here is the list of the main board components and interfaces:
SAM3U4E QFP chip with optional socket footprint
12 MHz crystal
32.768 KHz crystal
Optional SMB connector, for external system clock input
PSRAM
NAND Flash
Backup Battery
2.8 inch TFT color LCD display with touch-panel and backlight
UART port with level shifter IC
USART port with level shifter IC
Audio codec with input and output jacks: stereo headphone out, stereo line in, mono microphone in
SD/MMC interface
3-D accelerometer sensor
Temperature sensor
Reset and Wake-Up buttons: NRST, NRSTB, FWUP
User buttons: Left and Right
High Speed USB device port
JTAG port
On-board power regulation with shutdown control (by the SAM3 chip)
Two user LEDs
Power LED
BNC connectors for ADC input
User potentiometer connected to the ADC input
ZigBee® connector
3x32 bit PIO connection interfaces (PIOA, PIOB, PIOC)
4.3 Function Blocks
4.3.1 Processor
The SAM3U-EK is equipped with a SAM3U4E in LQFP144 package.
4.3.2 Memory
The SAM3U4E chip embeds:
256 Kbytes of embedded Flash
48 Kbytes of embedded SRAM with dual bank
16 Kbytes of ROM with embedded bootloader routines (UART, USB) and IAP (In-Application
Programming functions) routines.
Evaluation Kit Hardware
SAM3U-EK Evaluation Kit User Guide 4-3
6478F–ATARM–25-Jul-11
The SAM3U4E features an External Bus Interface (EBI) that permits interfacing to a broad range of
external memories and virtually to any parallel peripheral. The SAM3U-EK board is equipped with two
kinds of memory devices connected to the SAM3U4E EBI:
One 512K x16 PSRAM device(1)
One NAND Flash MT29F2G16ABD.
Figure 4-2. PSRAM
Note: 1. Brand and reference may vary. Check the bill of materiel (BOM) corresponding to your
kit version to get precise information regarding that matter.
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
NBS0
NBS1
NCS0
NRD
NWE
PB9
PB10
PB11
PB12
PB16
PB13
PB15
PB14
PB28
PB25
PB27
PB6
PB29
PB26
PB30
PB31
PC2
PC20
PC1
PC6
PC3
PC0
PC21
PC4
PC8
PC10
PC22
PC5
PC11
PC7
PC9
PC25
PC24
PC23
PB19
PB23
PC15
PB8
PB7
PB19
PB20
PB23
PB7
PB20
+3V3+3V3
+3V3
DGND
PB[31:0]
PC[31:0]
R11
47K
R11
47K
JP12
JP
JP12
JP
C28
100nF
C28
100nF
C29
1uF
C29
1uF
R10
47K
R10
47K
MN2
PSRAM 512K x16
MN2
PSRAM 512K x16
A0
3
A1
4
A2
5
A3
9
A4
10
A5
15
A6
16
A7
22
A8
44
A9
45
A10
46
A11
47
A12
39
A13
40
A14
33
A15
34
A16
28
A17
21
A18
43
DQ0 12
DQ1 17
DQ2 18
DQ323
DQ4 29
DQ5 35
DQ6 36
DQ7 42
DQ87
DQ9 13
DQ10 14
DQ1120
DQ12 26
DQ1332
DQ14 31
DQ15 37
LB#
1
UB#
8
CE#
11
OE#
2
WE#
41
NC1 27
NC2 38
NC348
VCC24
VCCQ 25
VSS 30
VSSQ19
ZZ#
6
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4-4 SAM3U-EK Evaluation Kit User Guide
6478F–ATARM–25-Jul-11
Figure 4-3. NAND Flash
The chip select signals NCS0 and NCS1 are used for PSRAM and NAND Flash chips selection, respec-
tively. Furthermore, a dedicated jumper can disconnect these from the memories, to let NCS0 and NCS1
be used for other custom purpose.
4.3.3 Clock Circuitry
The clock generator of a SAM3U4E microcontroller is made up of:
A Low Power 32,768 Hz Slow Clock Oscillator with bypass mode
A 3 to 20 MHz Crystal Oscillator, which can be bypassed (12 MHz needed in case of USB)
A factory programmed fast internal RC Oscillator. 3 output frequencies can be selected: 4, 8 or
12 MHz (default value is 4 MHz).
A 480 MHz UTMI PLL providing a clock for the USB High Speed Device Controller
A 96 to 192 MHz programmable PLL (input from 8 to 16 MHz), capable of providing the clock MCK to
the processor and to the peripherals.
The SAM3U-EK board is equipped with one 12 MHz crystal, one 32,768 Hz crystal and an external clock
input connector (optional, not populated by default).
PB21
PB22
PB18
PB17
PB24
PB6
PB31
PB30
PB16
PB15
PB14
PB13
PB29
PB28
PB12
PB11
PB10
PB9
PB27
PB26
PB25
PC12
+3V 3 +3V3
+3V 3
DGND
+3V 3
DGND
+3V 3
PB[31:0]
PC[31:0]
NANDR DY
NANDOE
NANDCLE
NANDAL E
NANDWE
NCS 1
R18
DNP
R18
DNP
C30
100nF
C30
100nF
C33
100nF
C33
100nF
C31
100nF
C31
100nF
R17 47K
R17 47K
R13
47K
R13
47K
R12
47K
R12
47K
C32
100nF
C32
100nF
R14 0R
R14 0R
JP13
JP
JP13
JP
MN3
MT29F2G16AADWP
MN3
MT29F2G16AADWP
NC1
1
NC2
2
NC3
3
NC4
4
NC5
5
NC6
6
R/B#
7
RE#
8
CE#
9
NC7
10
NC8
11
VCC1
12
VSS1
13
NC9
14
NC10
15
CLE
16
ALE
17
WE#
18
WP#
19
NC11
20
NC12
21
NC13
22
NC14
23
NC15
24 VSS2 25
IO8 26
IO9 27
IO10 28
IO0 29
IO1 30
IO2 31
IO3 32
IO11 33
VCC2 34
NC16 35
VSS3 36
VCC3 37
NC17 38
VCC4 39
IO12 40
IO4 41
IO5 42
IO6 43
IO7 44
IO13 45
IO14 46
IO15 47
VSS4 48
Evaluation Kit Hardware
SAM3U-EK Evaluation Kit User Guide 4-5
6478F–ATARM–25-Jul-11
Figure 4-4. External Clock Source
4.3.4 Reset and Wake-Up Circuitry
The on-board NRST button BP1 and NRSTB button BP2 provide the SAM3U4E with external reset con-
trol. The on-board WAKE-UP button BP3 can be used to wake up the chip from low power modes.
Figure 4-5. System Buttons
The NRST pin is bidirectional. It is handled by the on-chip reset controller. It can be driven low to provide
a reset signal out to the external components. Conversely, it can be asserted low from the outside to
reset the microcontroller, its core and peripherals, Backup region (RTC, RTT and Supply Controller)
excepted. The NRST pin integrates a permanent pull-up resistor of about 100 kOhm to VDDIO.
On the SAM3U-EK board, the NRST signal is connected to the LCD module and JTAG port.
The NRSTB pin is an input-only signal that enables the asynchronous reset of the SAM3U4E series
when asserted low. The NRSTB pin integrates a permanent pull-up resistor of about 15 kOhm. This
allows the connection of a simple push button for implementing a system-user reset. Whatever the
mode, this pin will reset the chip including the Backup region (RTC, RTT and Supply Controller). It
makes the chip behave as for a Power-on reset. An external capacitor (10 nF) is connected between
NRSTB and VDDIO to enforce the signal stability on this pin.
XIN32
XIN1
XOUT32
XOUT1
XOUT1
XIN1
XOUT32
XIN32
DGND
DGND
DGND
DGND
XIN
XOUT
XIN32
XOUT32
C26
20pF
C26
20pF
R7 0RR7 0R
Y1
12.000MHz
Y1
12.000MHz
C25
20pF
C25
20pF
MN1B
SAM3U
MN1B
SAM3U
XIN32
144
XOUT32
143
XIN
36
XOUT
35
GND1
18
GNDPLL
33
GNDUTMI
43
GND2
52
GND3
60
GNDANA
75
GND4
90
GND5
126
GNDBU
140
C27
20pF
C27
20pF
R60
RR 60
R
Y2
32.768KHz
Y2
32.768KHz
1 2
3
C24
20pF
C24
20pF
J1
J1
1
2 3
5
4
R8 DNPR8 DNP
DGND
VBU
NR ST
NR STB
FWUP
W
AKE_UP#
BP2B P2
1
42
3
BP1B P1
1
42
3
BP3B P3
1
42
3
R65
100K
R65
100K
Evaluation Kit Hardware
4-6 SAM3U-EK Evaluation Kit User Guide
6478F–ATARM–25-Jul-11
The FWUP pin is Force Wake-Up active low input. It is enabled as a wake-up source with external pull-
up. If the FWUP pin is asserted for a time longer than the debouncing period (configurable for 100 µs,
1 ms, 16 ms, 128 ms or 1 second), a core power supply wake-up is initiated.
4.3.5 Power Supply and Management
The SAM3U-EK board is supplied with an external 5V DC block through input J11. Protection circuitry is
obtained by a PolyZen diode MN13 and an LC combinatory filter MN14.
The adjustable LDO regulator MN12 is employed for the main supply of the 3.3V rail. It powers all the
3.3V board components. The shut down control of this LDO is made by MOSFETs Q1, Q2 piloted by the
SAM3U4E SHDN pin. When SAM3U4E is in backup mode, SHDN pin outputs a low level signal, which
shuts down the LDO. When the device is running (not in backup mode), SHDN pin output a high level
signal, which enables the LDO.
By closing the “FORCE POWER ON” jumper JP17, the P-channel MOSFET Q1 will be forced on, no
matter the level present on the SHDN pin, and the LDO 3.3V output will thereby be forced active.
Figure 4-6. Power Block
The SAM3U-EK board uses the 3.3V LDO output as its main supply source. VDDUTMI, VDDANA,
VDDIO, VDDIN are powered directly from that source.
The internal 1.8V regulator output feeds VDDCORE and VDDPLL.
VDDCORE and VDDPLL can also be powered by an external supply. (Refer to the SAM3U datasheet for
more details).
VDDBU pin is powered from the 3.3V rail and a backup battery BT1 via a dual Schottky diode D6.
PWR_CN
PWR_
CN
DGND
+5V +5V
DGND
+3V 3
+5V
DGND
DGND
+3V3 +5V
DGND
DGND
SHDN
D12BVREF
ADVREF
+3V3
+3V3
+2V5
+2V5
C92
100nF
C92
100nF
C104
100nF
C104
100nF
MN13
ZEN056V130A24LS
MN13
ZEN056V130A24LS
1
2
3
+
C95
100uF
+
C95
100uF
R90
4.7K
R90
4.7K
MN12
MIC29152WU
Micrel's 1.5A LDO, TO263-5
MN12
MIC29152WU
Micrel's 1.5A LDO, TO263-5
VIN
2VOUT 4
SD
1
GND1
3
ADJ 5
GND2
6
C96
100nF
C96
100nF
TP3
+3V 3
TP3
+3V 3
R80
10K
R80
10K
Q2
IRLM
L2502
Q2
IRLM
L2502
1
3
2
JP20
JUMP_3
JP20
JUMP_3
1
2
3
R7
7
200R 1%
R7
7
200R 1%
JP17
JP
JP17
JP
C94
15pF
C94
15pF
TP4
+5V
TP4
+5V
MN14
BNX002-01
MN14
BNX002-01
SV
1
SG
2
CV3
CG1 4
CG2 5
CG3 6
+
C93
22uF
+
C93
22uF
R79
100K
R79
100K
C103
100nF
C103
100nF
R78
100K
R78
100K
JP5
JUMP_3
JP5
JUMP_3
1
2
3
J11
MP179P 2.1mm
J11
MP179P 2.1mm
1
2
3
R76
330R 1%
R76
330R 1%
MN15
LM4040-2.5
MN15
LM4040-2.5
Q1
IRLML6401
Q1
IRLML6401
1
3
2
Evaluation Kit Hardware
SAM3U-EK Evaluation Kit User Guide 4-7
6478F–ATARM–25-Jul-11
Figure 4-7. Backup Battery
4.3.6 UART
The Universal Asynchronous Receiver Transmitter features a two-pin UART that can be used for com-
munication and trace purposes. It offers an ideal channel for in-situ programming solutions. This UART
is associated with two PDC channels to reduce the processor time on packet handling.
This two-pin UART (TXD and RXD only) is buffered through an RS232 Transceiver MN6 and brought to
the DB9 male connector J3.
Figure 4-8. UART
4.3.7 USART
The Universal Synchronous/Asynchronous Receiver Transmitter (USART) provides one full duplex uni-
versal synchronous/asynchronous serial link. The data frame format is extensively configurable (data
length, parity, number of stop bits) to support a broad range of serial communication standards. The
USART is also associated with PDC channels for TX/RX data access.
There are 3 USARTs on the SAM3U4E device, SAM3U-EK connects the USART1 bus (including TXD,
RXD, RTS, CTS handshake signals control) to the DB9 male connector J4 through the RS232 Trans-
ceiver MN7.
+3V 3
DGND
VBU
DGND
D6
BAT54C
D6
BAT54C
3
2
1
MN1B
SAM3U
MN1B
SAM3U
VDDBU 139
CR1225
3V
BT1
KY001
CR1225
3V
BT1
KY001
+
1-2
3
344
C21
1uF
C21
1uF
JP4
JP
JP4
JP
PA12
PA11
DGND
+3V3
DGND
+3V3+3V3
PA[31:0]
UT XD
URXD
C45
100nF
C45
100nF
C44
100nF
C44
100nF
C46
100nF
C46
100nF
R330RR330R
MN6
MAX3232CS E
MN6
MAX3232CS E
T1IN
11
T2IN
10 R1OUT
12
R2OUT
9
T1OUT 14
T2OUT 7
R1IN 13
R2IN 8
V+
2
C1+ 1
C1- 3
C2+ 4
C2- 5
V-
6
VCC
16
GND
15
C48
100nF
C48
100nF
R3
1
100K
R3
1
100K
J3
MALE R IG HT ANG LE D
J3
MALE R IG HT ANG LE D
5
4
3
2
1
9
8
7
6
10
11
C47
100nF
C47
100nF
R1
030RR1
030R
TP17
SM
D
TP17
SM
D
TP18
SMD
TP18
SMD
R32
100K
R32
100K
Evaluation Kit Hardware
4-8 SAM3U-EK Evaluation Kit User Guide
6478F–ATARM–25-Jul-11
Figure 4-9. USART
4.3.8 LEDs
There are three LEDs on the SAM3U-EK board:
D2 and D3 green LEDs are user defined and controlled by the GPIO.
D4 red LED is a power LED indicating that the 3.3V rail is enabled. It can also be controlled by the
GPIO (by default, the GPIO is disabled and an on-board pull-up to 3.3V lights the LED).
Figure 4-10. LEDs
4.3.9 LCD, Backlight Control and Touch Panel
SAM3U-EK carries one TFT/Transmissive LCD module with touch screen, FTM280C12D, with inte-
grated driver IC HX8347. The LCD display size is 2.8 inches, with a native resolution of 240 x 320 pixels.
PA22
PA21
PA20
PA23
+3V3
DGND
DGND
+3V3+3V3
PA[31:0]
TXD1
RXD1
RTS1
CTS1
TP20
SM
D
TP20
SM
D
C52
100nF
C52
100nF
C50
100nF
C50
100nF
MN7
MAX3232C S E
MN7
MAX3232C S E
T1IN
11
T2IN
10R1
OUT
12
R2
OUT
9
T1OUT 14
T2OUT 7
R1IN13
R2
IN8
V+
2
C1+ 1
C1- 3
C2+ 4
C2- 5
V-
6
VCC
16
GND
15
C51
100nF
C51
100nF
R104 0RR104 0R
C49
100nF
C49
100nF
R1
050R
R1
050R
R3
4
100K
R3
4
100K
C53
100nF
C53
100nF
R3
5
100K
R3
5
100K
J4
MALE R IG HT ANG LE D
J4
MALE R IG HT ANG LE D
5
4
3
2
1
9
8
7
6
10
11
TP19
SMD
TP19
SMD
PB1
PB2
PB0
PB5
PB4
DGND
+3V 3
PB[31:0]
USR_LED1#
USR_LED2#
POWER_LED#
D2 green-led
0603
D2 green-led
0603
R89 100K
R89 100K
D4 red-led
0603
D4 red-led
0603
R8
7
220R
R8
7
220R
Q3
IR LML2502
Q3
IR LML2502
1
32
R92
220R
R92
220R
R8
5
220R
R8
5
220R
D3 green-led
0603
D3 green-led
0603
Evaluation Kit Hardware
SAM3U-EK Evaluation Kit User Guide 4-9
6478F–ATARM–25-Jul-11
The LCD module gets its reset from NRST. As explained previously, this NRST is shared with the JTAG
port and the push button BP1. The LCD chip select signal is connected to NCS2 (a dedicated jumper can
disable it, making NCS2 available for other custom usage).
The SAM3U4E communicates with the LCD through PIOB where a 16-bit parallel “8080-like” protocol
data bus has to be implemented by software.
Table 4-1. LCD Module Pin Out
Pin Symbol Function
1 GND Ground
2CS Chip Select
3 RS Register select signal
4 WR Write operation signal
5 RD Read operation signal
6~21 DB0~DB15 Data bus
22~23 NC No connection
24 RESET Reset signal
25 GND Ground
26 X+ Touch panel X_RIGHT
27 Y+ Touch panel Y_UP
28 X- Touch panel X_LEFT
29 Y- Touch panel Y_DOWN
30 GND Ground
31 VDD1 Power supply for digital IO Pad
32 VDD2 Power supply for analog circuit
33~36 A1~A4 Power supply for backlight
37~38 NC No connection
39 K Backlight ground
Evaluation Kit Hardware
4-10 SAM3U-EK Evaluation Kit User Guide
6478F–ATARM–25-Jul-11
Figure 4-11. LCD Block
LCD backlight is made of 4 white chip LEDs in parallel, driven by an AAT3194 charge pump, MN4. The
AAT3194 is controlled by the SAM3U4E through a single line Simple Serial Control (S2Cwire) interface,
which permits to enable, disable, and set the LED drive current (LED brightness control) from a 32-level
logarithmic scale. Four 0-Ohm resistors R93/R94/R95/R96 are implemented for optional current limita-
tion (replace 0 Ohm with the required resistor value).
The LCD module integrates a 4-wire touch screen panel controlled by MN5, ADS7843, which is a slave
device on the SAM3U4E SPI bus.
The ADS7843 touch ADC auxiliary inputs IN3/IN4 are connected to test points for optional function
extension.
PB10
PB28
PB31
PB6
X_LEFT
PB13
PB19
PB15
Y_DOWN
PB26
PB11
PB23
PB16
PB29
PB30
PB9
PB8
PB14
CS#
PB27
PB25
X_RIGHT
Y_UP
PB12
PC16
LED_A2
PC19
LED_A1
LED_A4
LED_A3
LED_A1
LED_A2
LED_A3
LED_A4
LED_A1
LED_A2
LED_A3
LED_A4
X_RIGHT
X_LEFT
Y_UP
Y_DOWN
DGND
DGND
+3V3
DGND
VLED
+3V 3
DGND
+3V 3
DGND
PB[31:0]
NR ST
NOT P OPUL AT E D
C34
1uF
C34
1uF
TP14
SMD
TP14
SMD
TP13
SMD
TP13
SMD
TP16
SMD
TP16
SMD
R94 0RR 94 0R
B7
BN03K 314S 300R
B7
BN03K 314S 300R
D5
PAC DN044Y5R
TVS, SOT23-5
D5
PAC DN044Y5R
TVS, SOT23-5
1
2
3
4
5
MN4
AAT3194ITP
MN4
AAT3194ITP
C1+
4
C1-
3
EN/SET
9
C2+ 1
C2- 12
OUT 2
IN
10
GND
11
D1 8
D2 7
D3 6
D4 5
R95 0RR95 0R
R19
47K
R19
47K
R20
0R
R20
0R
C35
1uF
C35
1uF
C39
100nF
C39
100nF
J2
FH26-39S -0.3S HW
J2
FH26-39S -0.3S HW
GND1
1
CS
2
RS
3
WR
4
RD
5
DB0
6
DB1
7
DB2
8
DB3
9
DB4
10
DB5
11
DB6
12
DB7
13
DB8
14
DB9
15
DB10
16
DB11
17
DB12
18
DB13
19
DB14
20
DB15
21
NC1
22
NC2
23
RESET
24
GND2
25
X+
26
Y+
27
X-
28
Y-
29
GND3
30
VDD1
31
VDD2
32
A1
33
A2
34
A3
35
A4
36
NC3
37
NC4
38
K
39
shelled1
40
shelled2
41
JP14
JP
JP14
JP
R93 0RR93 0R
R96 0RR96 0R
TP15
SMD
TP15
SMD
+
C38
10uF
+
C38
10uF
C37
1uF
C37
1uF
C36
4.7uF
C36
4.7uF
Evaluation Kit Hardware
SAM3U-EK Evaluation Kit User Guide 4-11
6478F–ATARM–25-Jul-11
Figure 4-12. Touch Screen Controller
4.3.10 JTAG
A standard 20-pin JTAG connector is implemented on the SAM3U-EK for any ARM JTAG emulator con-
nection, such as SAM-ICE.
Note that the NRST net is connected to the system button BP1, and is also used to reset the LCD mod-
ule. 0-Ohm resistor R75 may be removed in order to isolate the JTAG port from the system reset signal.
Figure 4-13. JTAG Connector
4.3.11 Audio Codec
The SAM3U-EK includes a WOLFSON codec WM8731 for digital sound input and output. This interface
includes audio jacks for:
microphone input,
line audio input, and
headphone output.
X_RI
GHT
X_RI
GHT
Y_UP
X_LEFT
Y_DOWN
PA13
PA14
PA15
PA2
PA24
PC14
PC14
DGND
+3V3
+3V 3 +3V 3
AGND1
PA[31:0]
PC[31:0]
SPCK
MOS I
M
IS
O
NP CS 2
BUY_TSC
IRQ_
TSC
C43
4.7uF
C43
4.7uF
C40
100nF
C40
100nF
R28
100K
R28
100K
TP2
SMD
TP2
SMD
TP1
SMD
TP1
SMD
R2
70
RR2
70
R
R2
60
RR2
60
R
C41
100nF
C41
100nF
R25 0RR25 0R
R2
9
100K
R2
9
100K
R2
40
RR2
40
R
R22
100K
R22
100K
R3
0
0R
R3
0
0R
C42
100nF
C42
100nF
R21
100K
R21
100K
MN5
ADS 7843E
MN5
ADS 7843E
XP
2
YP
3
XM
4
YM
5
DCLK16
DIN 14
DOUT 12
CS15
BUSY13
PENI
RQ11
VREF 9
VCC11
VCC210
GND 6
IN3
7
IN4
8
L1
10uH/100mA
L1
10uH/100mA
R91
1R
R91
1R
X_LEFT
Y_DOWN
Y_UP
J2
FH26-39S -0.3S HW
J2
FH26-39S -0.3S HW
X+
26
Y+
27
X-
28
Y-
29
DGND
DGND
+3V3
NR S T
TDI
TCK
TDO
TMS
R72
100K
R72
100K
R73
100K
R73
100K J10
IDC20-2.54mm
J10
IDC20-2.54mm
VTref
1Vsupply 2
nT R S T
3GND1 4
TDI
5GND2 6
TMS
7GND3 8
TCK
9GND4 10
RTCK
11 GND5 12
TDO
13 GND6 14
nS RST
15 GND7 16
DBGR Q
17 GND8 18
DBGACK
19 GND920
+
C91
10uF
+
C91
10uF
C90
100nF
C90
100nF
R7
1
100K
R7
1
100K
R75 0R
R75 0R
R74
100K
R74
100K
R70
100K
R70
100K
Evaluation Kit Hardware
4-12 SAM3U-EK Evaluation Kit User Guide
6478F–ATARM–25-Jul-11
The SAM3U4E programmable clock output is used to generate the WM8731 master clock (MCLK). The
SAM3U4E ODT (On-Die Termination) feature guarantees a signal integrity on this clock line without the
need for external discrete components.
WM8731 pin 21 MODE is pulled down by default; this configures the device as a TWI device for internal
register access.
Pin15 CSB is pulled up, which sets its TWI address as 33 [0x0011011].
The WM8731 digital interface works in slave mode on the SAM3U4E Synchronous Serial Controller
(SSC) interface, which means that Codec digital audio bit clock and ADC/DAC left/right control clock are
to be generated by the SAM3U4E.
Figure 4-14. Codec Slave Mode
The WM8731 ADC and DAC have separated left/right control clocks to run at different rates.
The bit clock is shared; it can be the SSC transmitter clock (TK) or the receiver clock (RK). The default
setting on SAM3U-EK is TK and RK shorted together through R97/R99. Please note that trying different
ADC/DAC rates would mean different RK/TK rates; this default setting can be modified.
The 0-Ohm resistors R46/R47/R97/R99 have been implemented to offer a disconnection possibility
(freeing these dedicated PIO lines for other custom usage).
BCLK
ADCLRC
DACLRC
ADCDAT
DACDAT
WM8731
CODEC
SAM3U4E
Note: The ADC and DAC can run at different rates
BCLK
PA 31
PA 30
PA27
PA26
Evaluation Kit Hardware
SAM3U-EK Evaluation Kit User Guide 4-13
6478F–ATARM–25-Jul-11
Figure 4-15. Codec Block
4.3.12 USB
The SAM3U4E UDPHS port is compliant with the Universal Serial Bus (USB) rev 2.0 High Speed device
specification. J9 is a B-type receptacle for USB device.
Both R2 and R3 39-Ohm resistors build up a 90-Ohm differential impedance together with the 5-Ohm
output impedance of the Hi-speed channel drivers.
R68 and R69 build up a divider bridge from VBUS +5V to implement plug-in detection (5V level gets low-
ered to a PIO compatible 3.3V level) through PA0. Note that PA0 is also shared with ZigBee signal IRQ0.
Figure 4-16. USB Slave Block
PA30
PA10
PA9
PA21
PA26
PA27
PA28
PA29
PA30
PA27
PA31
PA10
PA9
PA26
PA21
PA31
BCLK
BCLK
DGND
+3V 3
DGND
+3V3 +3 V 3+3V3
AVDD
AVDD+3V 3
DGND
AGND
AGND
AGND
AGND
AGND
AGND
AGNDFGND
FGND
FGND
A[31:0]
TWD
0
TW
CK0
PCK0
T
D
TF
HEADPHONE
LI N
E-OU
T
LI NE- I N
MON O / S T E R E O
MI C R O I N P U T
RD
RF
+
C60 220uF
+
C60 220uF
C66 1uFC66 1uF
R36
47K
R36
47K
C71
470pF
C71
470pF
R43
5.6K
R43
5.6K
+
C54
10uF
+
C54
10uF
+
C61
10uF
+
C61
10uF
C64
470pF
C64
470pF
+
C76
10uF
+
C76
10uF
C62
100nF
C62
100nF
+
C59
10uF
+
C59
10uF
B4
B N03K314S 600R
B4
B N03K314S 600R
R990RR990R
R38
100K
R38
100K
R4910K
R4910K
R42 5.6KR42 5.6K
C57
100nF
C57
100nF
R5
1
0R
R5
1
0R
R5
5
0R
R5
5
0R
C68
220pF
C68
220pF
R4
0
4.7K
R4
0
4.7K
C73
220pF
C73
220pF
R37
47K
R37
47K
MN8
XWM8731E DS
MN8
XWM8731E DS
DBVDD
1
CLKOUT
2
BCLK
3
DACDAT
4
DACLRC
5
ADCDAT
6
ADC LR C
7
HPVDD 8
LHPOUT 9
RHPOUT 10
HPGND 11
LOUT
12
ROUT
13
AVDD14
AGND15
VMID
16
MIC B IAS 17
MICIN 18
RLIN
EIN19
LLINEIN 20
MODE
21
CSB
22
SDIN
23
SCLK
24
XTI/MCLK
25
XTO
26
DCVDD
27
DGND
28
R44
5.6K
R44
5.6K
R46 0RR46 0R
R50 330R
R50 330R
C75
DNP
C75
DNP
J7
EARJACK
J7
EARJACK
1
2
3
4
5
R39
4.7K
R39
4.7K R41 5.6KR41 5.6K
C65
470pF
C65
470pF
C55
100nF
C55
100nF
C70
470pF
C70
470pF
R47 0RR47 0R
+
C63 220uF
+
C63 220uF
J5
EARJACK
J5
EARJACK
1
2
3
4
5
B2
B N03K314S 600R
B2
B N03K314S 600R
B3
B N03K314S 600R
B3
B N03K314S 600R
R54
0R
R54
0R
B5
B N03K314S 600R
B5
B N03K314S 600R
R4
8680RR4
8680R
C77
100nF
C77
100nF
R53
0R
R53
0R
C67 1uFC67 1uF
C72 1uFC72 1uF
C69
220pF
C69
220pF
L2
10uH/100mA
L2
10uH/100mA
C74
470pF
C74
470pF
R52
47K
R52
47K
C56
100nF
C56
100nF
+
C78
47uF
+
C78
47uF
J6
EARJACK
J6
EARJACK
1
2
3
4
5
R9
70
RR9
70
R
B1
BN03K314S600R
B1
BN03K314S600R
C58
100nF
C58
100nF
PA0
DGND
DGNDDGND
DGND
DHSDM
DHSDP
PA[31:0]
VBUS_USB
NOT POPULATED
R69
68K
R69
68K
C89
100nF
C89
100nF
J9
USB TYPE B PORT
J9
USB TYPE B PORT
VBUS
1
D-
2D+
3
GND
4
E_GND0
5E_GND1
6
B6
BN03K 314S 300R
B6
BN03K 314S 300R
MN11
TPD3E 001DR LR
MN11
TPD3E 001DR LR
IO1
1
IO2
2
GND
3IO3 4
VCC 5
C88
10pF
C88
10pF
R68 47
K
R68 47
K
Evaluation Kit Hardware
4-14 SAM3U-EK Evaluation Kit User Guide
6478F–ATARM–25-Jul-11
4.3.13 ADC Input
There are 8 multiplexed analog channel inputs on the 12-bit ADC, and 8 multiplexed analog channel
inputs on the 10-bit ADC. SAM3U-EK optionally connects the two ADC channels to BNC header (check
for your actual components implementation, schematics and BOM, on http://www.atmel.com/products/).
One is 12-bit ADC channel 3, shared with PIO pin PB4. The other one is 10-bit ADC channel 0, shared
with PIO PB5.
A potentiometer is also connected to these two channels to implement an easy access to ADC program-
ming and debugging (or implement an analog user control such as display brightness, volume, etc.).
Please note that SAM3U-EK default setting connects both AD12BAD3 and AD0 to the potentiometer so
that AD12BAD3 and AD0 are actually shorted. If these two ports need to work separately, R82 and/or
R84 should be removed.
There is another ADC application capability on SAM3U-EK (See “G-Sensor” on page 4-15.)
Figure 4-17. ADC Input
4.3.14 User Buttons
2 user buttons on the SAM3U-EK are connected to PIO lines, and are defined as left and right buttons by
default.
ADC
PB5
ADC
PB4
DGND
DGND
DGND
+3V 3
AD12BAD3
AD0
Potent iomet er
CN2
BNC
CN2
BNC
1
2
3
4
5
R82
0R
R82
0R
CN1
BNC
CN1
BNC
1
2
3
4
5
R81
DNP
R81
DNP
VR1
10K
VR1
10K
13
2
4
5
R88
49.9R
R88
49.9R
C97
10nF
C97
10nF
R84
0R
R84
0R
C99
10nF
C99
10nF
JP18
JP
JP18
JP
R83
49.9R
R83
49.9R
C98
10nF
C98
10nF
JP19
JP
JP19
JP
R86
DNP
R86
DNP
Evaluation Kit Hardware
SAM3U-EK Evaluation Kit User Guide 4-15
6478F–ATARM–25-Jul-11
Figure 4-18. User Buttons
4.3.15 G-Sensor
The SAM3U-EK board is equipped with a three axis accelerometer MMA7341. Basically, it is an acceler-
ation to analog voltage converter. Converted data on corresponding directions are read by 3 SAM3U4E
12-bit ADC channels.
PC13 controls the device sleep mode. A low level on PC13 will place the MMA7341 into sleep mode to
reduce the current; conversely, a high PC13 level will wake it up from sleep mode.
Jumper JP15 controls the device g-select function, which allows the selection between two sensitivity
levels. Depending on the logic input placed on pin 10, the device internal gain will be changed, operating
within a 3g or 11g range with different sensitivities.
Jumper JP16 provides control of the device self-test function. When the self-test function is initiated, an
electrostatic force is applied to each axis to cause it to deflect. The x- and y-axis are deflected slightly
while the z-axis is trimmed to deflect 1g. This procedure assures that both mechanical (g-cell) and elec-
tronic sections of the accelerometer are functioning.
Note that the 0-Ohm resistors R61/R62/R63 have been implemented to offer a disconnection possibility
(freeing these dedicated PIO lines for other custom usage).
PA19
PA18
DGND
BP_RI GHT #
BP_LEFT#
R6
7
100R
R6
7
100R
BP4BP4
1
4
2
3
BP5BP5
1
4
2
3
C86 10nFC86 10nF
C87 10nFC 87 10nF
R66
100R
R66
100R
Table 4-2. Direction
Direction PIO usage ADC channel
XOUT PB3 AD2
YOUT PC17 AD6
ZOUT PC18 AD7
Table 4-3. g-Select
g-select g-range Sensitivity
0 3g 440mV/g
1 11g 117.5mV/g
Evaluation Kit Hardware
4-16 SAM3U-EK Evaluation Kit User Guide
6478F–ATARM–25-Jul-11
Figure 4-19. G-Sensor
4.3.16 Temperature Sensor
A temperature sensor MCP9800 is connected to the SAM3U4E TWI bus. This device also features an
open-drain output ALERT pin. The device outputs an alert signal when the ambient temperature goes
beyond the user-programmed temperature limit.
Note that the 0-Ohm resistors R15 and R16 have been implemented to offer a disconnection possibility
(freeing these dedicated PIO lines for other custom usage).
Figure 4-20. Temperature Sensor
4.3.17 SD Card
The SAM3U-EK has an MMC/MMCPlus high-speed 8-bit multimedia interface. This interface is used as
a 4/8-bit interface, connected to an 8-bit SD/MMC card slot with card detection.
PC13
PB3
PC17
PC18
+3V 3
DGND
+3V 3
DGND
+3V 3
DGNDDGND DGND
PC[31:0]
PB[31:0]
3AXS _ SLEEP#
ADC0 _ AD2
ADC0_AD6
ADC0_AD7
JP15 JPJP15 JP
R6
30R
R6
30R
C82
3.3nF
C82
3.3nF
R62 0RR 62 0R
C84
3.3nF
C84
3.3nF
MN9
MMA7341L
MN9
MMA7341L
g-S elect
10
Self Test
13
Sleep
7
XOUT
2
YOUT
3
ZOUT
4NC2 8
NC39
NC4 11
NC5 12
VDD 6
VSS 5
NC1
1
NC6
14
R60
10K
R60
10K
R61 0RR 61 0R
C81
100nF
C81
100nF
R59
10K
R59
10K
C83
3.3nF
C83
3.3nF
JP16 JPJP16 JP
PA10
PA18
PA19
PA9
PA17
DGND
+3V 3
+3V 3
PA[31:0]
TW
D0
TWCK0
TEM
P_ALA
RM
R16
0R
R16
0R
R64
47K
R64
47K MN10
MC P 9800
MN10
MC P 9800
VDD 1
GND 2
ALE R T 3
SCLK
4
SDA
5
R15
0R
R15
0R
C85
100nF
C85
100nF
Evaluation Kit Hardware
SAM3U-EK Evaluation Kit User Guide 4-17
6478F–ATARM–25-Jul-11
Figure 4-21. SD Card Socket
4.3.18 ZigBee
SAM3U4E has a 10-pin male connector for the RZ600 ZigBee module.
Figure 4-22. ZigBee
PC31
PA25
PA6
PA3
PA7
PA4
PC30
PC28
PA5
PA8
PC29
DGND
DGND
+3V 3 DGND
+3V 3
PA[31:0]
PC[
31:0]
CK
CDA
DA2
DA3
DA0
DA1
W
KUP12
DA4
DA5
DA6
DA7
RA1
47KX4
RA1
47KX4
1
2
3
45
6
7
8
C80
100nF
C80
100nF
J8
7SDMM-B0B2211
J8
7SDMM-B0B2211
DAT2
1
RSV/DAT3
2
DAT4
3
CMD
4
DAT5
5
GND
6
VCC
7
CLK
8
DAT6
9
CD
10
DAT7
11
DAT0
12
DAT1
13
SD_WP
14
GROUND1 15
GROUND 16
SHELLED1 17
SHELLED218
RA2
47KX4
RA2
47KX4
1
2
3
45
6
7
8
R57
10K
R57
10K
R5
6
10K
R5
6
10K
+
C79
10uF
+
C79
10uF
R5
8
10K
R5
8
10K
Table 4-4. Pin Card Detection Scheme
Status Detection
WITHOUT CARD SD_WP: OPEN
CD: OPEN
SD Card inserted with write protection lock SD_WP: OPEN
CD: GND
SD Card inserted with write protection unlock, or other card inserted SD_WP: GND
CD: GND
PA13
PA16
PA15
PA1
PC27
PA14
PC26
PA0
DGND
+3V 3
IRQ0_ZBEE
IRQ
1_ZBEE
SPI O_NPCS0#
MI S O
MOS I
SPCK
SLP_TR
ZB_RSTN
R100 0RR 100 0R
C100
18pF
C100
18pF
C102
2.2uF
C102
2.2uF
J16J 16
1 2
3 4
56
78
910
JP21
JP
JP21
JP
C101
2.2nF
C101
2.2nF
Evaluation Kit Hardware
4-18 SAM3U-EK Evaluation Kit User Guide
6478F–ATARM–25-Jul-11
4.3.19 PIO Expansion
Figure 4-23. PIO Expansion Ports
The SAM3U4E product features 3 PIO controllers, PIOA, PIOB and PIOC, which multiplex the I/O lines
of the peripheral set. Each PIO controller controls up to 32 lines. Expansion ports J13, J14, J15 provide
a way for customers to define any PIO channels.
All the expansion port pins are directly connected to the SAM3U4E chip, except PB4 and PB5, which are
assigned as AD12BAD3 and AD0 by default on the board. Solder drops have been implemented on the
board to avoid signal conflicts from traces routing to expansion ports. If PB4 and PB5 need to be con-
nected to the J14 connector, solder drops SD3 and SD4 should be shorted.
Figure 4-24. SD3 Location
Figure 4-25. SD4 Location
PB6
PB1
PB3
PB7
PB13
PB11
PB14
PB9
BB4
PB0
PB8
BB5
PB15
PB10
PB2
PB12
PB22
PB17
PB19
PB23
PB29
PB27
PB30
PB25
PB20
PB16
PB24
PB21
PB31
PB26
PB18
PB28
PC29
PC25
PC12
PC9
PC31
PC14
PC8
PC23
PC3
PC0
PC11
PC21
PC30
PC19
PC2
PC7
PC16
PC24
PC22
PC5
PC17PC1
PC27
PC6
PC20
PC28
PC15
PC13
PC10 PC26
PC4
PC18
PB4
PB5
BB4
BB5
PA21
PA9
PA27
PA23
PA28
PA5
PA22
PA17
PA11
PA24
PA29
PA1
PA14
PA8
PA18
PA12
PA13
PA2
PA7
PA6
PA30
PA0
PA10
PA16
PA26
PA3
PA25
PA31
PA20PA4
PA15
PA19
DGNDDGNDDGND DGND DGND DGND
+3V3 +3V3
+3V3+3V3+3V3
+3V 3
+5V+5V +5V +5V +5V +5V
PC[31:0]
PB[31:0]
SOLDER DROP 2 pi ns open. Nor mal
SOLDER DROP 2 pi ns open. Nor mal
J15
048
J15
048
12
3 4
5 6
7 8
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
J14
048
J14
048
1 2
34
5 6
78
910
1112
1314
15 16
1718
19 20
2122
2324
25 26
2728
29 30
3132
3334
35 36
3738
39 40
SD4SD4
J13
048
J13
048
12
34
5 6
78
910
1112
13 14
15 16
1718
1920
2122
23 24
25 26
2728
2930
3132
3334
3536
3738
3940
SD3SD3
Evaluation Kit Hardware
SAM3U-EK Evaluation Kit User Guide 4-19
6478F–ATARM–25-Jul-11
4.4 Configuration
This section describes the PIO usage, the jumpers, the test points and the solder drops of a SAM3U-EK
board.
4.4.1 PIO Usage
Table 4-5. PIO Port A Assignment
I/O Line Peripheral A Peripheral B Extra Function EK Usage Device
PA0 TIOB0 NPCS1 WKUP0 IRQ0_ZBEE/
VBUS_USB ZigBee, USB
PA1 TIOA0 NPCS2 WKUP1 IRQ0_ZBEE ZigBee
PA2 TCLK0 AD12BTRG WKUP2 BUSY_TSC Touch Screen
PA3 MCCK PCK1 MCCK SD/MMC
PA4 MCCDA PWMH0 MCCDA SD/MMC
PA5 MCDA0 PWMH1 MCDA0 SD/MMC
PA6 MCDA1 PWMH2 MCDA1 SD/MMC
PA7 MCDA2 PWML0 MCDA2 SD/MMC
PA8 MCDA3 PWML1 MCDA3 SD/MMC
PA9 TWD0 PWML2 WKUP3 TWD0 Codec, Temp sensor
PA10 TWCK0 PWML3 WKUP4 TWCK0 Codec, Temp sensor
PA11 URXD PWMFI0 URXD UART
PA12 UTXD PWMFI1 URXD UART
PA13 MISO MISO Touch panel, ZigBee
PA14 MOSI MOSI Touch panel, ZigBee
PA15 SPCK PWMH2 SPCK Touch panel, ZigBee
PA16 NPCS0 NCS1 WKUP5 SPIO_NPCS0# ZigBee
PA17 SCK0 ADTRG WKUP6 TEMP_ALARM Temp sensor
PA18 TXD0 PWMFI2 WKUP7 BP_LEFT# User Button
PA19 RXD0 NPCS3 WKUP8 BP_RIGHT# User Button
PA20 TXD1 PWMH3 WKUP9 TXD1 USART
PA21 RXD1 PCK0 WKUP10 RXD1 USART
PA22 TXD2 RTS1 AD12B0 RTS1 USART
PA23 RXD2 CTS1 CTS1 USART
PA24 TWD1 SCK1 WKUP11 IRQ_TSC Touch Screen
PA25 TWCK1 SCK2 WKUP12 MCI_CD SD/MMC
PA26 TD TCLK2 TD Audio codec
PA27 RD PCK0 RD Audio codec
PA28 TK PWMH0 TK Audio codec
Evaluation Kit Hardware
4-20 SAM3U-EK Evaluation Kit User Guide
6478F–ATARM–25-Jul-11
PA29 RK PWMH1 RK Audio codec
PA30 TF TIOA2 AD12B1 TF Audio codec
PA31 RF TIOB2 RF Audio codec
Table 4-5. PIO Port A Assignment
I/O Line Peripheral A Peripheral B Extra Function EK Usage Device
Table 4-6. PIO Port B Assignment
I/O Line Peripheral A Peripheral B Extra Function EK Usage Device
PB0 PWMH0 A2 WKUP13 USR_LED1# USER_LED
PB1 PWMH1 A3 WKUP14 USR_LED2# USER_LED
PB2 PWMH2 A4 WKUP15 POWER_LED POWER_LED
PB3 PWMH3 A5 AD12BAD2 3AXS_XOUT Accelerometer
PB4 TCLK1 A6 AD12BAD3 BNC1 Analog input
PB5 TIOA1 A7 AD0 BNC2 Analog input
PB6 TIOB1 D15 AD1 D15 PSRAM, NAND Flash, LCD
PB7 RTS0 A0/NBS0 AD2 NBS0 PSRAM,
PB8 CTS0 A1 AD3 A1/RS PSRAM, LCD
PB9 D0 DTR0 D0 PSRAM, NAND Flash, LCD
PB10 D1 DSR0 D1 PSRAM, NAND Flash, LCD
PB11 D2 DCD0 D2 PSRAM, NAND Flash, LCD
PB12 D3 RI0 D3 PSRAM, NAND Flash, LCD
PB13 D4 PWMH0 D4 PSRAM, NAND Flash, LCD
PB14 D5 PWMH1 D5 PSRAM, NAND Flash, LCD
PB15 D6 PWMH2 D6 PSRAM, NAND Flash, LCD
PB16 D7 PWMH3 D7 PSRAM, NAND Flash, LCD
PB17 NANDOE PWML0 NANDOE NAND Flash
PB18 NANDWE PWML1 NANDWE NAND Flash
PB19 NRD PWML2 NRD PSRAM, LCD
PB20 NCS0 PWML3 NCS0 PSRAM
PB21 A21/NANDALE RTS2 NANDALE NAND Flash
PB22 A22/NANDCLE CTS2 NANDCLE NAND Flash
PB23 NWR0/NEW PCK2 NWE PSRAM, LCD
PB24 NANDRDY PCK1 NANDRDY NAND Flash
PB25 D8 PWML0 D8 PSRAM, NAND Flash, LCD
PB26 D9 PWML1 D9 PSRAM, NAND Flash, LCD
PB27 D10 PWML2 D10 PSRAM, NAND Flash, LCD
PB28 D11 PWML3 D11 PSRAM, NAND Flash, LCD
Evaluation Kit Hardware
SAM3U-EK Evaluation Kit User Guide 4-21
6478F–ATARM–25-Jul-11
PB29 D12 D12 PSRAM, NAND Flash, LCD
PB30 D13 D13 PSRAM, NAND Flash, LCD
PB31 D14 D14 PSRAM, NAND Flash, LCD
Table 4-6. PIO Port B Assignment
I/O Line Peripheral A Peripheral B Extra Function EK Usage Device
Table 4-7. PIO Port C Assignment
I/O Line Peripheral A Peripheral B Extra Function EK Usage Device
PC0 A2 A2 PSRAM
PC1 A3 A3 PSRAM
PC2 A4 A4 PSRAM
PC3 A5 NPCS1 A5 PSRAM
PC4 A6 NPCS2 A6 PSRAM
PC5 A7 NPCS3 A7 PSRAM
PC6 A8 PWML0 A8 PSRAM
PC7 A8 PWML1 A8 PSRAM
PC8 A10 PWML2 A10 PSRAM
PC9 A11 PWML3 A11 PSRAM
PC10 A12 CTS3 A12 PSRAM
PC11 A13 RTS3 A13 PSRAM
PC12 NCS1 TXD3 NCS1 NAND Flash
PC13 A2 RSD3 3AXS_SLEEP# Accelerometer
PC14 A3 NPCS2 NPCS2 Touch Screen
PC15 NWR1/NBS1 AD12BAD4 NBS1 NAND Flash
PC16 NCS2 PWML3 AD12BAD5 NCS2 LCD
PC17 NCS3 AD12BAD6 3AXS_YOUT Accelerometer
PC18 NWAIT AD12BAD7 3AXS_ZOUT Accelerometer
PC19 SCK3 NPCS1 BL_EN Back Light
PC20 A14 A14 PSRAM
PC21 A15 A15 PSRAM
PC22 A16 A16 PSRAM
PC23 A17 A17 PSRAM
PC24 A18 A18 PSRAM
PC25 A19 PWMH1 A19 PSRAM
PC26 A20 PWMH2 SLP_TR ZigBee
PC27 A23 PWMH3 ZB_RSTN ZigBee
PC28 MCDA4 AD4 MCDA4 SD/MMC
Evaluation Kit Hardware
4-22 SAM3U-EK Evaluation Kit User Guide
6478F–ATARM–25-Jul-11
4.4.2 Jumpers
The SAM3U-EK board jumpers are used for many purposes such as internal Flash Memory reinitializa-
tion, power current measurement and other configurations.
PC29 PWML0 MCDA5 AD5 MCDA5 SD/MMC
PC30 PWML1 MCDA6 AD6 MCDA6 SD/MMC
PC31 PWML2 MCDA7 AD7 MCDA7 SD/MMC
Table 4-7. PIO Port C Assignment
I/O Line Peripheral A Peripheral B Extra Function EK Usage Device
Table 4-8. Jumpers Setting
Designation Label Default Setting Feature
JP1 ERASE Open
Close it to reinitialize the Flash content and
some of its NVM bits.
This jumper must be closed for more than
220 ms at power-up to perform the re-
initialization.
JP2 (DNP) TEST Not populated (open) reserved
JP3 VIN Close Measure current feed into VDDIN pin
JP5 AD12BVREF Pin1 Pin2 close,
Switch to +3V3
Select the reference voltage of the 12-bit
ADC to be either 3.3V (close 1-2) or 2.5V
(close 2-3)
JP6 VIO Close Measure current feed into VDDIO pins
JP7 VUTMI Close Measure current feed into VDDUTMI pin
JP8 VANA Close Measure current feed into VDDANA pin
JP9 VCORE Close Measure current feed into VDDCORE pins
JP10 VPLL Close Measure current feed into VDDPLL pin
JP11 VOUT Close Measure current out of VDDOUT pin
JP12 NCS0 Close Disconnection possibility on NCS0
JP13 NCS1 Close Disconnection possibility on NCS1
JP14 NCS2 Close Disconnection possibility on NCS2
JP15 3AXS Close G-select feature, sensitivity level switch.
Close as 440mv/g, open as 117.5mV/g
JP16 3AXS Close Open to cause a slight deflect on each axis
output, which is device self test
JP17 FORCE POWER ON Close Force +3V3 LDO output valid
JP18 (DNP) - Not populated (open) Close to enable 50-Ohm terminal resistor for
AD12BAD3 BNC port
JP19 (DNP) - Not populated (open) Close to enable 50-Ohm terminal resistor for
AD0 BNC port
JP20 ADVREF Pin1 Pin2 close,
Switch to +3V3
Select the reference voltage of the 10-bit
ADC to be either 3.3V (close 1-2) or 2.5V
(close 2-3)
JP21 - Open Measure current feed into ZigBee module
Evaluation Kit Hardware
SAM3U-EK Evaluation Kit User Guide 4-23
6478F–ATARM–25-Jul-11
4.4.3 Test Points
Some test points have been placed on the SAM3U-EK board for the verification of important signals.
4.4.4 Solder Drops
Two solder drops have been designed on the SAM3U-EK for isolation puposes.
4.4.5 Assigned PIO Lines, Disconnection Possibility
As pointed out in previous interface descriptions, 0-Ohm resistors have been inserted on the PIO lines
receiver path of the SAM3U-EK. Some PIO lines are connected to an external driver on the board. The
0-Ohm resistors allow disconnecting each of these for custom usage (through PIO expansion connec-
Table 4-9. Test Points
Designation Part Description
TP1 Pad Aux ADC input IN3 for touch screen control
TP2 Pad Aux ADC input IN4 for touch screen control
TP3 Ring Hook +3V3
TP4 Ring Hook +5V
TP5 Ring Hook GND
TP6 Ring Hook GND
TP7 Ring Hook GND
TP8 Ring Hook GND
TP9 Pad FWUP
TP10 Pad SHDN
TP11 Pad ADVREF
TP12 Pad AD12BVREF
TP13 Pad LED_A1
TP14 Pad LED_A2
TP15 Pad LED_A3
TP16 Pad LED_A4
TP17 Pad UTXD
TP18 Pad URXD
TP19 Pad TXD1
TP20 Pad RXD1
Table 4-10. Solder Drops
Designation Default Setting Feature
SD3 Open Isolation of AD12BAD3 input from PIO expansion socket
SD4 Open Isolation of AD0 input from PIO expansion socket
Evaluation Kit Hardware
4-24 SAM3U-EK Evaluation Kit User Guide
6478F–ATARM–25-Jul-11
tors, for example). This feature gives the user an added level of versatility for prototyping a system of his
own. See the table below.
Table 4-11. Disconnecting Possibility
Designation Default Assignment PIO
R14 NANDRDY PB24
R15 NANDOE PB17
R16 NANDWE PB18
R20 BL_EN PC19
R24 NPCS2 PC14
R25 BUY_TSC PA2
R26 IRQ_TSC PA24
R46 RD PA27
R47 RF PA31
R61 AD12BAD2 PB3
R62 AD12BAD6 PC17
R63 AD12BAD7 PC18
R97 TK PA28
R99 RK PA29
R100 IRQ0_ZBEE PA0
R103 URXD PA11
R104 RXD1 PA21
R105 CTS1 PA23
SAM3U-EK Evaluation Kit User Guide 5-1
6478F–ATARM–25-Jul-11
Section 5
Schematics
5.1 Schematics
This section contains the following schematics:
Block Diagram
Design Notes
SAM3U PIO
SAM3U CPU
EBI Memory 1MB PSRAM
EBI Memory II 2GB NAND Flash
TFT LCD and TSC
UART and COM1 RS232
Audio DAC
SD/MMC Interface
Accelerometer, Temp, Buttons
USB and JTAG
Power Supply, ADC and LED
SAM3U Socket
User Interface and ZigBee
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Power Manage
USB & UART
ATMEL Cortex M3 Processor SAM3U (LQFP144)
SAM3U-EK RevB Block Diagram
Temperature sense
2.8 Inch TFT-LCD
User Interface (PIO PortA,B,C)
PSRAM
SD/MMC Card
Nand Flash
Accelerometer
Audio DAC
Reset,Debug Logic
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Block Diagram
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Block Diagram
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SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1. SAM3U-EK Revision HISTORY
Rev: A
SCH: SAM3U-EK RevA Data: 2008/12
Note: Original Released
2. Explain of Schematics
(1) Resistance Unit: "K" is
"K¦¸"
"R" is "¦¸"
(2) "DNP" means the component is not populated by default
Rev: B
SCH: SAM3U-EK RevB Data: 2009/04
Note: Final Released
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Design notes
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SAM3U-EK RevB
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SAM3U-EK RevB
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SAM3U-EK RevB
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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PB0
PB1
PB3
PB2
PB7
PB5
PB4
PB6
PB11
PB9
PB8
PB15
PB14
PB13
PB12
PB10
PB19
PB17
PB16
PB29
PB24
PB23
PB22
PB21
PB31
PB20
PB27
PB28
PB25
PB18
PB26
PB30
PC19
PC23
PC17
PC16
PC20
PC21
PC18
PC22
PC27
PC31
PC26
PC30
PC24
PC25
PC29
PC28
PA21
PC12
PA27
PC11
PA31
PA25
PA1
PA0
PC3
PA23
PA13
PC7
PA24
PA17
PA8
PA7
PC14
PA6
PA5
PC13
PA15
PA22
PA28
PA20
PA29
PA4
PC15
PA11
PA18
PA26
PC2
PC6
PA30
PA12
PC0
PA9
PC9
PC1
PC5
PA19
PA2
PC4
PA10
PA16
PC10
PA14
PC8
PA3
PA[31:0]{7,8,9,10,11,12,14,15}
PC[31:0]{5,6,7,10,11,14,15}
PB[31:0] {5,6,7,11,13,14,15}
PC[31:0] {5,6,7,10,11,14,15}
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SAM3U PIO
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SAM3U PIO
03-FEB-09
SAM3U-EK RevB
B 07-jul-11ZXL PP 20-JAN-10
MN1A
SAM3U
MN1A
SAM3U
PA0/WKUP0
109
PA1/WKUP1
111
PA2/WKUP2
113
PA3/CK
115
PA4/CDA
117
PA5/DA0
119
PA6/DA1
121
PA7/DA2
123
PA8/DA3
128
PA9/TWD0
130
PA10/TWCK0
132
PA11/URXD
133
PA12/UTXD
134
PA13/MISO
87
PA14/MOSI
88
PA15/SPCK
91
PA16/NPCS0
93
PA17/WKUP7
95
PA18/WKUP8
99
PA19/WKUP9
100
PA20/TXD1
101
PA21/RXD1
102
PA22/RTS1
77
PA23/CTS2
103
PA24/WKUP11
105
PA25/WKUP12
106
PA26/TD
107
PA27/PCK0
64
PA28/TK
45
PA29/PWMH1
46
PA30/TF
78
PA31/RF
48
PB0/PWMH0 53
PB1/PWMH1 55
PB2/PWMH2 57
PB3/AD12BAD2 79
PB4/AD12BAD3 80
PB5/AD0 65
PB6/D15 66
PB7/A0/NBS0 67
PB8/A1 68
PB9/D0 31
PB10/D1 30
PB11/D2 59
PB12/D3 61
PB13/D4 62
PB14/D5 29
PB15/D6 97
PB16/D7 96
PB17/NANDOE 26
PB18/NANDWE 25
PB19/NRD 24
PB20/NCS0 23
PB21/A21/NANDALE 21
PB22/A22/NANDCLE 20
PB23/NWR0/NWE 19
PB24/NANDRDY 15
PB25/D8 14
PB26/D9 13
PB27/D10 12
PB28/D11 10
PB29/D12 8
PB30/D13 6
PB31/D14 5
PC0/A2
110
PC1/A3
112
PC2/A4
114
PC3/A5
116
PC4/A6
118
PC5/A7
120
PC6/A8
122
PC7/A9
124
PC8/A10
129
PC9/A11
131
PC10/A12
89
PC11/A13
92
PC12/NCS1
94
PC13/RXD3
98
PC14/NPCS2
28
PC15/NWR1/NBS1
81
PC16/NCS2 82
PC17/AD12BAD6 83
PC18/AD12BAD7 84
PC19/NPCS1 32
PC20/A14 108
PC21/A15 22
PC22/A16 47
PC23/A17 49
PC24/A18 54
PC25/A19 56
PC26/PWMH2 58
PC27/A23 63
PC28/DA4 69
PC29/DA5 70
PC30/DA6 71
PC31/DA7 72
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NOT POPULATED
XIN32XIN1
XOUT32XOUT1
XOUT1
XIN1
VBG
XOUT32
XIN32
DFSDM
DFSDP
VBG
DFSDP
DFSDM
DGND
+3V3
DGNDDGND
DGND
+3V3
DGND
VOUT
DGND
VCORE
DGND
VPLL
DGND
VIO
VUTMI
DGND VANA
DGND
+3V3
DGND
VBU
DGND
VOUT
+3V3
VCORE
VPLL
VIO
VUTMI
VANA
DGND
VIN
DGND
DGND
VIO
+3V3
DGND
DGND
FWUP{11,14}
NRST{7,11,12,14}
NRSTB{11,14}
TDI{12,14}
SHDN{13,14}
TDO{12,14}
TMS{12,14}
TCK{12,14}
DHSDM{12,14}
DHSDP{12,14}
VBG{14}
ADVREF {13,14}
AD12BVREF{13,14}
XIN{14}
XOUT{14}
JTAGSEL{14}
TEST{14}
ERASE{14}
XIN32{14}
XOUT32{14}
DFSDM {14}
DFSDP {14}
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B
XX-XXX-XXZXL XXX
SAM3U CPU
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
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B
XX-XXX-XXZXL XXX
SAM3U CPU
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
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B
XX-XXX-XXZXL XXX
SAM3U CPU
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
D6
BAT54C
D6
BAT54C
3
2
1
JP6
JP
JP6
JP
C4
4.7uF
C4
4.7uF
+
C10
10uF
+
C10
10uF
C17
4.7uF
C17
4.7uF
CR1225
3V
BT1
KY001
CR1225
3V
BT1
KY001
+
1-2
3
344
C14
100nF
C14
100nF
C105
100nF
C105
100nF
JP2 DNPJP2 DNP MN1B
SAM3U
MN1B
SAM3U
NRST
11
TDI
1
TDO/TRACESWO
4
TMS/SWDIO
7
TCK/SWCLK
9
VBG
39
DHSDP
37
DHSDM
38
DFSDM
41
DFSDP
42
FWUP
135
SHDN
136
ERASE
137
TEST
138
NRSTB
141
XIN32
144
XOUT32
143
XIN
36
XOUT
35
ADVREF 74
AD12BVREF 76
VDDCORE1 16
VDDCORE2 27
VDDCORE3 44
VDDCORE4 50
VDDCORE5 86
VDDCORE6 125
VDDOUT 2
VDDIN 3
VDDIO1 17
GND1
18
GNDPLL
33
VDDUTMI 40
GNDUTMI
43
VDDIO2 51
GND2
52
GND3
60
VDDANA 73
GNDANA
75
VDDIO3 85
GND4
90
VDDIO4 104
GND5
126
VDDIO5 127
VDDBU 139
GNDBU
140
VDDPLL 34
JTAGSEL
142
JP10
JP
JP10
JP
+
C2
10uF
+
C2
10uF
R101
1R
R101
1R
J1J1
1
2 3
54
JP7
JP
JP7
JP
+
C23
10uF
+
C23
10uF
C16
100nF
C16
100nF
R2 39RR2 39R
JP4
JP
JP4
JP
R102
1R
R102
1R
C19
10pF
C19
10pF
R8 DNPR8 DNP
C13
100nF
C13
100nF
C24
20pF
C24
20pF
C5
100nF
C5
100nF
L3
10uH/100mA
L3
10uH/100mA
R3 39RR3 39R
C27
20pF
C27
20pF
C21
1uF
C21
1uF
C11
100nF
C11
100nF
C20
100nF
C20
100nF
C25
20pF
C25
20pF
C1
100nF
C1
100nF
C110
4.7uF
C110
4.7uF
C9
100nF
C9
100nF
C18
100nF
C18
100nF
R9
6.8K 1%
R9
6.8K 1%
JP1 JPJP1 JP
C7
100nF
C7
100nF
JP8
JP
JP8
JP
JP3
JP
JP3
JP
L4
10uH/100mA
L4
10uH/100mA
C15
100nF
C15
100nF
R7 0RR7 0R
C108
4.7uF
C108
4.7uF
Y2
32.768KHz
Y2
32.768KHz
1 2
3
C12
100nF
C12
100nF
C109
100nF
C109
100nF
R1 DNPR1 DNP
C6
100nF
C6
100nF
Y1
12.000MHz
Y1
12.000MHz
C107
100nF
C107
100nF
JP11
JP
JP11
JP
C106
10nF
C106
10nF
R6 0RR6 0R
C8
100nF
C8
100nF
JP9
JP
JP9
JP
C3
100nF
C3
100nF
C26
20pF
C26
20pF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
NBS0
NBS1
NCS0
NRD
NWE
PB9
PB10
PB11
PB12
PB16
PB13
PB15
PB14
PB28
PB25
PB27
PB6
PB29
PB26
PB30
PB31
PC2
PC20
PC1
PC6
PC3
PC0
PC21
PC4
PC8
PC10
PC22
PC5
PC11
PC7
PC9
PC25
PC24
PC23
PB19
PB23
PC15
PB8
PB7
PB19
PB20
PB23
PB7
PB20
+3V3 +3V3
+3V3
DGND
PB[31:0]{3,6,7,11,13,14,15}
PC[31:0]{3,6,7,10,11,14,15}
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B
XX-XXX-XXZXL XXX
EBI Memory I 1MB PSRAM
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
REV
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DES.
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B
XX-XXX-XXZXL XXX
EBI Memory I 1MB PSRAM
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
REV
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DES.
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515
B
XX-XXX-XXZXL XXX
EBI Memory I 1MB PSRAM
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
R11
47K
R11
47K
JP12
JP
JP12
JP
C28
100nF
C28
100nF
C29
1uF
C29
1uF
R10
47K
R10
47K
MN2
PSRAM 512K x16
MN2
PSRAM 512K x16
A0
3
A1
4
A2
5
A3
9
A4
10
A5
15
A6
16
A7
22
A8
44
A9
45
A10
46
A11
47
A12
39
A13
40
A14
33
A15
34
A16
28
A17
21
A18
43
DQ0 12
DQ1 17
DQ2 18
DQ3 23
DQ4 29
DQ5 35
DQ6 36
DQ7 42
DQ8 7
DQ9 13
DQ10 14
DQ11 20
DQ12 26
DQ13 32
DQ14 31
DQ15 37
LB#
1
UB#
8
CE#
11
OE#
2
WE#
41
NC1 27
NC2 38
NC3 48
VCC 24
VCCQ 25
VSS 30
VSSQ 19
ZZ#
6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
D8
D7
D6
D5
D4
D3
D2
D15
D1
D14
D13
D0
D12
D11
D10
D9
NANDRDY
NANDOE
NANDCLE
NANDALE
NANDWE
NCS1
PB21
PB22
PB18
PB17
PB24
PB6
PB31
PB30
PB16
PB15
PB14
PB13
PB29
PB28
PB12
PB11
PB10
PB9
PB27
PB26
PB25
PC12
+3V3 +3V3
+3V3
DGND
+3V3
DGND
+3V3
PB[31:0]{3,5,7,11,13,14,15}
PC[31:0]{3,5,7,10,11,14,15}
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B
XX-XXX-XXZXL XXX
EBI Memory II NAND FLASH
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
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615
B
XX-XXX-XXZXL XXX
EBI Memory II NAND FLASH
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
REV
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615
B
XX-XXX-XXZXL XXX
EBI Memory II NAND FLASH
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
R14 0RR14 0R
R18
DNP
R18
DNP
R12
47K
R12
47K
C33
100nF
C33
100nF
C32
100nF
C32
100nF
R13
47K
R13
47K
R17 47KR17 47K
MN3
MT29F2G16AADWP
MN3
MT29F2G16AADWP
NC1
1
NC2
2
NC3
3
NC4
4
NC5
5
NC6
6
R/B#
7
RE#
8
CE#
9
NC7
10
NC8
11
VCC1
12
VSS1
13
NC9
14
NC10
15
CLE
16
ALE
17
WE#
18
WP#
19
NC11
20
NC12
21
NC13
22
NC14
23
NC15
24 VSS2 25
IO8 26
IO9 27
IO10 28
IO0 29
IO1 30
IO2 31
IO3 32
IO11 33
VCC2 34
NC16 35
VSS3 36
VCC3 37
NC17 38
VCC4 39
IO12 40
IO4 41
IO5 42
IO6 43
IO7 44
IO13 45
IO14 46
IO15 47
VSS4 48
C31
100nF
C31
100nF
C30
100nF
C30
100nF
JP13
JP
JP13
JP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SPCK
MOSI
MISO
NPCS2
BUY_TSC
IRQ_TSC
The part is placed as
close as possible to J2
NOT POPULATED
X_RIGHT
Y_UP
X_LEFT
Y_DOWN
PA13
PA14
PA15
PA2
PA24
PC14
PB10
PB28
PB31
PB6
X_LEFT
PB13
PB19
PB15
Y_DOWN
PB26
PB11
PB23
PB16
PB29
PB30
PB9
PB8
PB14
CS#
PB27
PB25
X_RIGHT
Y_UP
PB12
PC16
PC14
PC16
LED_A2
PC19
LED_A1
LED_A4
LED_A3
LED_A1
LED_A2
LED_A3
LED_A4
LED_A1
LED_A2
LED_A3
LED_A4
X_RIGHT
X_LEFT
Y_UP
Y_DOWN
PC19
DGND
+3V3
+3V3 +3V3
DGND
DGND
+3V3
DGND
VLED
+3V3
DGND
+3V3
DGND
AGND1
PA[31:0] {3,8,9,10,11,12,14,15}
PB[31:0]{3,5,6,11,13,14,15}
PC[31:0]{3,5,6,10,11,14,15}
NRST{4,11,12,14}
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715
B
XX-XXX-XXZXL XXX
TFT-LCD & TSC
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL 20-JAN-10PP
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B
XX-XXX-XXZXL XXX
TFT-LCD & TSC
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL 20-JAN-10PP
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B
XX-XXX-XXZXL XXX
TFT-LCD & TSC
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL 20-JAN-10PP
C34
1uF
C34
1uF
JP14
JP
JP14
JP
C36
4.7uF
C36
4.7uF
R24 0RR24 0R
B7
BN03K314S300R
B7
BN03K314S300R
R91
1R
R91
1R
L1
10uH/100mA
L1
10uH/100mA
R21
100K
R21
100K
R26 0RR26 0R
D5
PACDN044Y5R
TVS, SOT23-5
D5
PACDN044Y5R
TVS, SOT23-5
1
2
3
4
5
C41
100nF
C41
100nF
+
C38
10uF
+
C38
10uF
C43
4.7uF
C43
4.7uF
R96 0RR96 0R
R93 0RR93 0R
R95 0RR95 0R
R94 0RR94 0R
TP16
SMD
TP16
SMD
TP2
SMD
TP2
SMD
TP13
SMD
TP13
SMD
R22
100K
R22
100K
C35
1uF
C35
1uF
C40
100nF
C40
100nF
TP14
SMD
TP14
SMD
MN5
ADS7843E
MN5
ADS7843E
XP
2
YP
3
XM
4
YM
5
DCLK 16
DIN 14
DOUT 12
CS 15
BUSY 13
PENIRQ 11
VREF 9
VCC1 1
VCC2 10
GND 6
IN3
7
IN4
8
J2
FH26-39S-0.3SHW
J2
FH26-39S-0.3SHW
GND1
1
CS
2
RS
3
WR
4
RD
5
DB0
6
DB1
7
DB2
8
DB3
9
DB4
10
DB5
11
DB6
12
DB7
13
DB8
14
DB9
15
DB10
16
DB11
17
DB12
18
DB13
19
DB14
20
DB15
21
NC1
22
NC2
23
RESET
24
GND2
25
X+
26
Y+
27
X-
28
Y-
29
GND3
30
VDD1
31
VDD2
32
A1
33
A2
34
A3
35
A4
36
NC3
37
NC4
38
K
39
shelled1
40
shelled2
41
R20
0R
R20
0R
C42
100nF
C42
100nF
R30
0R
R30
0R
R25 0RR25 0R
C39
100nF
C39
100nF
R19
47K
R19
47K
R29
100K
R29
100K
TP1
SMD
TP1
SMD
C37
1uF
C37
1uF
MN4
AAT3194ITP
MN4
AAT3194ITP
C1+
4
C1-
3
EN/SET
9
C2+ 1
C2- 12
OUT 2
IN
10
GND
11
D1 8
D2 7
D3 6
D4 5
R27 0RR27 0R
R28
100K
R28
100K
TP15
SMD
TP15
SMD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
UTXD
URXD
TXD1
RXD1
RTS1
CTS1
PA22
PA21
PA12
PA20
PA11
PA23
+3V3
DGND
+3V3
DGND
DGND
DGND
+3V3 +3V3
+3V3 +3V3
PA[31:0]{3,7,9,10,11,12,14,15}
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B
XX-XXX-XXZXL XXX
UART & COM1 RS232
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
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B
XX-XXX-XXZXL XXX
UART & COM1 RS232
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
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B
XX-XXX-XXZXL XXX
UART & COM1 RS232
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
J3
MALE RIGHT ANGLED
J3
MALE RIGHT ANGLED
5
4
3
2
1
9
8
7
6
10
11
R32
100K
R32
100K
R31
100K
R31
100K
C48
100nF
C48
100nF
C44
100nF
C44
100nF
C45
100nF
C45
100nF
R103 0RR103 0R
C52
100nF
C52
100nF
TP18
SMD
TP18
SMD
MN7
MAX3232CSE
MN7
MAX3232CSE
T1IN
11
T2IN
10 R1OUT
12
R2OUT
9
T1OUT 14
T2OUT 7
R1IN 13
R2IN 8
V+
2
C1+ 1
C1- 3
C2+ 4
C2- 5
V-
6
VCC
16
GND
15
C50
100nF
C50
100nF
TP19
SMD
TP19
SMD
R34
100K
R34
100K
C46
100nF
C46
100nF
C47
100nF
C47
100nF
R105 0RR105 0R
TP20
SMD
TP20
SMD
C51
100nF
C51
100nF
C53
100nF
C53
100nF
R33 0RR33 0R
R35
100K
R35
100K
J4
MALE RIGHT ANGLED
J4
MALE RIGHT ANGLED
5
4
3
2
1
9
8
7
6
10
11
C49
100nF
C49
100nF
R104 0RR104 0R
MN6
MAX3232CSE
MN6
MAX3232CSE
T1IN
11
T2IN
10 R1OUT
12
R2OUT
9
T1OUT 14
T2OUT 7
R1IN 13
R2IN 8
V+
2
C1+ 1
C1- 3
C2+ 4
C2- 5
V-
6
VCC
16
GND
15
TP17
SMD
TP17
SMD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TWD0
TWCK0
PCK0
TD
TF
HEADPHONE
LINE-OUT
LINE-IN
MONO/STEREO
MICRO INPUT
RD
RF
PA30
PA10
PA9
PA21
PA26
PA27
PA28
PA29
PA30
PA27
PA31
PA10
PA9
PA26
PA21
PA31
BCLK
BCLK
DGND
+3V3
DGND
+3V3 +3V3 +3V3
AVDD
AVDD+3V3
DGND
AGND
AGND
AGND
AGND
AGND
AGND
AGNDFGND
FGND
FGND
PA[31:0]{3,7,8,10,11,12,14,15}
REV
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915
B
XX-XXX-XXZXL XXX
Audio DAC
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
REV
DATEMODIF.
DES.
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A
915
B
XX-XXX-XXZXL XXX
Audio DAC
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
REV
DATEMODIF.
DES.
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915
B
XX-XXX-XXZXL XXX
Audio DAC
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
R97 0RR97 0R
R50 330RR50 330R
C68
220pF
C68
220pF
R49 10KR49 10K
MN8
XWM8731EDS
MN8
XWM8731EDS
DBVDD
1
CLKOUT
2
BCLK
3
DACDAT
4
DACLRC
5
ADCDAT
6
ADCLRC
7
HPVDD 8
LHPOUT 9
RHPOUT 10
HPGND 11
LOUT
12
ROUT
13
AVDD 14
AGND 15
VMID
16
MICBIAS 17
MICIN 18
RLINEIN 19
LLINEIN 20
MODE
21
CSB
22
SDIN
23
SCLK
24
XTI/MCLK
25
XTO
26
DCVDD
27
DGND
28
+
C78
47uF
+
C78
47uF
R53
0R
R53
0R
C65
470pF
C65
470pF
C73
220pF
C73
220pF
R46 0RR46 0R
C56
100nF
C56
100nF
L2
10uH/100mA
L2
10uH/100mA
C67 1uFC67 1uF
R47 0RR47 0R
R41 5.6KR41 5.6K
R44
5.6K
R44
5.6K C70
470pF
C70
470pF
C57
100nF
C57
100nF
C74
470pF
C74
470pF
R36
47K
R36
47K
C72 1uFC72 1uF
B2
BN03K314S600R
B2
BN03K314S600R
R40
4.7K
R40
4.7K
R55
0R
R55
0R
R42 5.6KR42 5.6K
B4
BN03K314S600R
B4
BN03K314S600R C71
470pF
C71
470pF
C62
100nF
C62
100nF
B1
BN03K314S600R
B1
BN03K314S600R
J6
EARJACK
J6
EARJACK
1
2
3
4
5
C69
220pF
C69
220pF
C64
470pF
C64
470pF
J5
EARJACK
J5
EARJACK
1
2
3
4
5
C66 1uFC66 1uF
R52
47K
R52
47K
R48 680RR48 680R
R99 0RR99 0R
+
C54
10uF
+
C54
10uF
R54
0R
R54
0R
C75
DNP
C75
DNP
R38
100K
R38
100K
+
C61
10uF
+
C61
10uF
+
C63 220uF
+
C63 220uF
C55
100nF
C55
100nF
R39
4.7K
R39
4.7K
+
C76
10uF
+
C76
10uF
R43
5.6K
R43
5.6K
C58
100nF
C58
100nF
C77
100nF
C77
100nF
B3
BN03K314S600R
B3
BN03K314S600R
R37
47K
R37
47K
+
C59
10uF
+
C59
10uF
B5
BN03K314S600R
B5
BN03K314S600R
J7
EARJACK
J7
EARJACK
1
2
3
4
5
R51
0R
R51
0R
+
C60 220uF
+
C60 220uF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CK
CDA
DA2
DA3
DA0
DA1
WKUP12
DA4
DA5
DA6
DA7
PC31
PA25
PA6
PA3
PA7
PA4
PC30
PC28
PA5
PA8
PC29
DGND
DGND
+3V3 DGND
+3V3
PA[31:0]{3,7,8,9,11,12,14,15}
PC[31:0]{3,5,6,7,11,14,15}
REV
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INIT EDIT
A
10
15
B
XX-XXX-XXZXL XXX
SD/MMC interface
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
REV
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DES.
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A
10
15
B
XX-XXX-XXZXL XXX
SD/MMC interface
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
REV
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DES.
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A
10
15
B
XX-XXX-XXZXL XXX
SD/MMC interface
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
R58
10K
R58
10K RA2
47KX4
RA2
47KX4
1
2
3
45
6
7
8
J8
7SDMM-B0-2211-A
J8
7SDMM-B0-2211-A
DAT2
1
RSV/DAT3
2
DAT4
3
CMD
4
DAT5
5
GND
6
VCC
7
CLK
8
DAT6
9
CD
10
DAT7
11
DAT0
12
DAT1
13
SD_WP
14
GROUND1 15
GROUND 16
SHELLED1 17
SHELLED2 18
RA1
47KX4
RA1
47KX4
1
2
3
45
6
7
8
R56
10K
R56
10K
C80
100nF
C80
100nF
+
C79
10uF
+
C79
10uF
R57
10K
R57
10K
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
3AXS_SLEEP#
ADC0_AD2
ADC0_AD6
ADC0_AD7
TWD0
TWCK0
TEMP_ALARM
BP_RIGHT#
BP_LEFT#
WAKE_UP#
PC13
PB3
PC17
PC18
PA10
PA19
PA18
PA18
PA19
PA9
PA17
+3V3
DGND
+3V3
DGND
+3V3
DGND DGND DGND
DGND
+3V3
+3V3
DGND
DGND
VBU
PC[31:0]{3,5,6,7,10,14,15}
PB[31:0]{3,5,6,7,13,14,15}
PA[31:0]{3,7,8,9,10,12,14,15}
NRST{4,7,12,14}
NRSTB{4,14}
FWUP{4,14}
REV
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A
11
15
B
XX-XXX-XXZXL XXX
Accelerometer,Temp,Buttons
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
REV
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DES.
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A
11
15
B
XX-XXX-XXZXL XXX
Accelerometer,Temp,Buttons
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
REV
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DES.
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11
15
B
XX-XXX-XXZXL XXX
Accelerometer,Temp,Buttons
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL PP 20-JAN-10
R64
47K
R64
47K
R62 0RR62 0R
BP2BP2
1
42
3
C81
100nF
C81
100nF
R61 0RR61 0R
BP5BP5
1
42
3
C87 10nFC87 10nF
BP4BP4
1
42
3
BP3BP3
1
42
3
R63 0RR63 0R
R15
0R
R15
0R
R60
10K
R60
10K
C82
3.3nF
C82
3.3nF
R16
0R
R16
0R
R66
100R
R66
100R
R59
10K
R59
10K
C85
100nF
C85
100nF
MN9
MMA7341L
MN9
MMA7341L
g-Select
10
Self Test
13
Sleep
7
XOUT
2
YOUT
3
ZOUT
4NC2 8
NC3 9
NC4 11
NC5 12
VDD 6
VSS 5
NC1
1
NC6
14
BP1BP1
1
42
3
R65
100K
R65
100K
JP16 JPJP16 JP
C83
3.3nF
C83
3.3nF
MN10
MCP9800
MN10
MCP9800
VDD 1
GND 2
ALERT 3
SCLK
4
SDA
5
C84
3.3nF
C84
3.3nF
JP15 JPJP15 JP
C86 10nFC86 10nF
R67
100R
R67
100R
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VBUS_USB
NOT POPULATED
PA0
DGND
DGNDDGND
DGND
DGND
DGND
+3V3
DHSDM{4,14}
DHSDP{4,14}
NRST{4,7,11,14}
TDI{4,14}
TCK{4,14}
TDO{4,14}
TMS{4,14}
PA[31:0]{3,7,8,9,10,11,14,15}
REV
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A
12
15
B
XX-XXX-XXZXL XXX
USB & JTAG
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL 20-JAN-10PP
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12
15
B
XX-XXX-XXZXL XXX
USB & JTAG
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL 20-JAN-10PP
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A
12
15
B
XX-XXX-XXZXL XXX
USB & JTAG
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL 20-JAN-10PP
MN11
TPD3E001DRLR
MN11
TPD3E001DRLR
IO1
1
IO2
2
GND
3IO3 4
VCC 5
C89
100nF
C89
100nF
R69
68K
R69
68K
R75 0RR75 0R
+
C91
10uF
+
C91
10uF
R71
100K
R71
100K
B6
BN03K314S300R
B6
BN03K314S300R
R74
100K
R74
100K
R73
100K
R73
100K
R72
100K
R72
100K
R68 47KR68 47K
C90
100nF
C90
100nF
J10
IDC20-2.54mm
J10
IDC20-2.54mm
VTref
1Vsupply 2
nTRST
3GND1 4
TDI
5GND2 6
TMS
7GND3 8
TCK
9GND4 10
RTCK
11 GND5 12
TDO
13 GND6 14
nSRST
15 GND7 16
DBGRQ
17 GND8 18
DBGACK
19 GND9 20
C88
10pF
C88
10pF
J9
USB TYPE B PORT
J9
USB TYPE B PORT
VBUS
1
D-
2D+
3
GND
4
E_GND0
5E_GND1
6
R70
100K
R70
100K
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AD12BAD3
AD0
USR_LED1#
USR_LED2#
POWER_LED#
Potentiometer
+3V3
+3V3
+2V5
+2V5
ADC
PB5
PB1
PB2
PB0
ADC
PB4
PB5
PB4
PWR_CN
PWR_CN
DGND
+5V
DGND
DGND
+3V3
DGND
DGND
+3V3
+5V
DGND
+3V3
DGND
+5V
DGND
DGND
DGND
+3V3 +5V
DGND
DGND
PB[31:0]{3,5,6,7,11,14,15}
SHDN{4,14}
AD12BVREF{4,14}
ADVREF{4,14}
REV
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A
13
15
B
XX-XXX-XXZXL XXX
Power Supply, ADC & Led
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL 20-JAN-10PP
REV
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DES.
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A
13
15
B
XX-XXX-XXZXL XXX
Power Supply, ADC & Led
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL 20-JAN-10PP
REV
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13
15
B
XX-XXX-XXZXL XXX
Power Supply, ADC & Led
03-FEB-09
SAM3U-EK RevB
B 19-MAY-09ZXL 20-JAN-10PP
Q1
IRLML6401
Q1
IRLML6401
1
32
R87
220R
R87
220R
JP17
JP
JP17
JP R81
DNP
R81
DNP
D2 green-led
0603
D2 green-led
0603
C96
100nF
C96
100nF
R86
DNP
R86
DNP
R92
220R
R92
220R
+
C93
22uF
+
C93
22uF
TP8
GND
TP8
GND
R84
0R
R84
0R
VR1
10K
VR1
10K
13
2
4
5
J11
MP179P 2.1mm
J11
MP179P 2.1mm
1
2
3
R85
220R
R85
220R
CN1
BNC
CN1
BNC
1
2
3
4
5
D3 green-led
0603
D3 green-led
0603
JP19
JP
JP19
JP
R89 100KR89 100K
R83
49.9R 1%
R83
49.9R 1%
MN15
LM4040-2.5
MN15
LM4040-2.5
MN14
BNX002-01
MN14
BNX002-01
SV
1
SG
2
CV 3
CG1 4
CG2 5
CG3 6
CN2
BNC
CN2
BNC
1
2
3
4
5
R76
330R 1%
R76
330R 1%
MN12
MIC29152WU
Micrel's 1.5A LDO, TO263-5
MN12
MIC29152WU
Micrel's 1.5A LDO, TO263-5
VIN
2VOUT 4
SD
1
GND1
3
ADJ 5
GND2
6
TP6
GND
TP6
GND
D4 red-led
0603
D4 red-led
0603
C97
10nF
C97
10nF
Q3
IRLML2502
Q3
IRLML2502
1
32
JP20
JUMP_3
JP20
JUMP_3
1
2
3
C99
10nF
C99
10nF
R90
4.7K
R90
4.7K
R88
49.9R 1%
R88
49.9R 1%
R78
100K
R78
100K R79
100K
R79
100K
R80
10K
R80
10K
+
C95
100uF
+
C95
100uF
C92
100nF
C92
100nF
C94
15pF
C94
15pF
Q2
IRLML2502
Q2
IRLML2502
1
3
2
C103
100nF
C103
100nF
TP7
GND
TP7
GND
JP18
JP
JP18
JP
JP5
JUMP_3
JP5
JUMP_3
1
2
3
C98
10nF
C98
10nF
R77
200R 1%
R77
200R 1%
TP3
+3V3
TP3
+3V3
C104
100nF
C104
100nF
TP5
GND
TP5
GND
TP4
+5V
TP4
+5V
MN13
ZEN056V130A24LS
MN13
ZEN056V130A24LS
1
2
3
R82
0R
R82
0R
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
7020-144-608 ANTARES
NOT POPULATED
PC20
PA26
PA24
PA25
PA23
PA21
PA20
PC12
PA18
PC13
PA17
PB15
PB16
PA19
PA16
PC18
PC15
PA15
PB3
PC17
PA30
PB4
PA13
PC10
PC16
PA14
PC11
PA22
AD12BVREF
ADVREF
PB21
PC21
TCK
PB14
PC19
PB23
PB27
TMS
PB19
PB22
PB18
PB25
PB28
PC14
PB24
PB26
PB30
TDO
PB20
PB9
NRST
XOUT
PB31
TDI
XIN
PB17
PB10
PB29
PA0
PC0
PA1
PC1
PA2
PC2
PA3
PC3
PA4
PC4
PA5
PC5
PA6
PC6
PA7
XIN32
XOUT32
JTAGSEL
NRSTB
TEST
ERASE
SHDN
FWUP
PA12
PA11
PA10
PC9
PA9
PC8
PA8
PB13
PC28
PC23
PC31
PA29
VBG
PB11
PC29
PA31
PC30
DHSDP
PB0
DHSDM
PC24
PB6
PB7
PB12
PA27
PC26
PA28
PB5
PC22
PC27
PB8
DFSDP
DFSDM
PB1
PC25
PB2
PC0
PC1
PC2
PC3
PC5
PC7
PC6
PC4
PC15
PC9
PC11
PC13
PC12
PC10
PC14
PC8
PC31
PC27
PC23
PC30
PC17
PC19
PC21
PC29
PC20
PC18
PC22
PC24
PC16
PC28
PC26
PC25
PB31
PB17
PB16
PB15
PB11
PB26
PB7
PB14
PB1
PB20
PB28
PB18
PB3
PB5
PB13
PB24
PB4
PB2
PB27
PB6
PB25
PB8
PB29
PB0
PB21
PB12
PB22
PB10
PB30
PB23
PB19
PB9
PA20
PA6
PA25
PA22
PA31
PA12
PA2
PA4
PA18
PA19
PA26
PA17
PA28
PA23
PA3
PA30
PA13
PA5
PA0
PA15
PA21
PA24
PA27
PA7
PA10
PA16
PA14
PA29
PA9
PA1
PA8
PA11
ERASE
TEST
JTAGSEL
VBG
NRST
NRSTB
TDO
TDI
TMS
TCK
DHSDP
DFSDM
DHSDM
DFSDP
XIN32
XOUT32
XOUT
XIN
AD12BVREF
PC7
FW UP
SHDN
ADVREF
DGND
VCORE
VANA
VUTMI
VOUT
VIN
VCORE
VIO
VCORE
VPLL
VCORE VIO
VIO
VCORE
VIO
VIOVBU
VCORE
PC[31:0]{3,5,6,7,10,11,15}
PB[31:0]{3,5,6,7,11,13,15}
PA[31:0]{3,7,8,9,10,11,12,15}
ERASE{4}
TEST{4}
JTAGSEL{4}
FW UP{4,11}
VBG{4}
NRST{4,7,11,12}
NRSTB{4,11}
TDI{4,12}
TMS{4,12}
TCK{4,12}
XIN32{4}
XOUT32{4}
XIN{4}
XOUT{4}
SHDN{4,13}
TDO{4,12}
DFSDP{4}
DFSDM{4}
ADVREF{4,13}
AD12BVREF{4,13}
DHSDM{4,12}
DHSDP{4,12}
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SAM3U socket
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J12
SAM3U Socket
J12
SAM3U Socket
1
1
2
2
3
3
4
4
5
5
6
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7
8
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102 102
103 103
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106 106
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109 109
110 110
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113 113
114 114
115 115
116 116
117 117
118 118
119 119
120 120
121 121
122 122
123 123
124 124
125 125
126 126
127 127
128 128
129 129
130 130
131 131
132 132
133 133
134 134
135 135
136 136
137 137
138 138
139 139
140 140
141 141
142 142
143 143
144 144
145
145
146 146
TP12
SMD
TP12
SMD
TP9
SMD
TP9
SMD
TP11
SMD
TP11
SMD
TP10
SMD
TP10
SMD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
IRQ0_ZBEE
IRQ1_ZBEE
SPIO_NPCS0#
MISO
MOSI
SPCK
SLP_TR
ZB_RSTN
SOLDER DROP 2 pins open.Normal
SOLDER DROP 2 pins open.Normal
PA13
PA16
PA15
PA1
PC27
PA14
PC26
PB6
PB1
PB3
PB7
PB13
PB11
PB14
PB9
BB4
PB0
PB8
BB5
PB15
PB10
PB2
PB12
PB22
PB17
PB19
PB23
PB29
PB27
PB30
PB25
PB20
PB16
PB24
PB21
PB31
PB26
PB18
PB28
PC29
PC25
PC12
PC9
PC31
PC14
PC8
PC23
PC3
PC0
PC11
PC21
PC30
PC19
PC2
PC7
PC16
PC24
PC22
PC5
PC17PC1
PC27
PC6
PC20
PC28
PC15
PC13
PC10 PC26
PC4
PC18
PB4
PB5
BB4
BB5
PA0
PA21
PA9
PA27
PA23
PA28
PA5
PA22
PA17
PA11
PA24
PA29
PA1
PA14
PA8
PA18
PA12
PA13
PA2
PA7
PA6
PA30
PA0
PA10
PA16
PA26
PA3
PA25
PA31
PA20PA4
PA15
PA19
DGND DGND DGND DGND DGND DGND
+3V3 +3V3+3V3 +3V3 +3V3+3V3
DGND
+3V3
+5V +5V +5V +5V +5V +5V
PC[31:0]{3,5,6,7,10,11,14}
PB[31:0]{3,5,6,7,11,13,14}
PA[31:0]{3,7,8,9,10,11,12,14}
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R100 0RR100 0R
J15
048
J15
048
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
C100
18pF
C100
18pF
J14
048
J14
048
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
SD4SD4
C102
2.2uF
C102
2.2uF
J13
048
J13
048
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
J16J16
1 2
3 4
5 6
7 8
9 10
C101
2.2nF
C101
2.2nF
SD3SD3
JP21
JP
JP21
JP
SAM3U-EK Evaluation Kit User Guide 6-1
6478F–ATARM–25-Jul-11
Section 6
Troubleshooting
6.1 Self-Test
A test package software is available to implement a functional test for each section of the board. Refer to
the SAM3U-EK page on www.atmel.com.
6.2 Board Recovery
The SAM3U-EK is delivered with an on-board recovery procedure allowing to reprogram the board as it
was when shipped. This procedure is accessible from the Flash disk mounted on a PC when the board is
connected to this PC through the USB as described in Section 3.
SAM3U-EK Evaluation Kit User Guide 7-1
6478F–ATARM–25-Jul-11
Section 7
Errata
7.1 JTAG/ICE: Missing Pull-up Resistor on TDO Pin
The TDO pin is in input mode with the pull-up resistor disabled when the Cortex M3 is not in debug
mode.
Problem Fix/Workaround
To avoid current consumption on VDDIO and/or VDDCORE due to floating input, an external pull-up
resistor (100 kΩ) corresponding to this PIO line must be added.
Errata
7-2 SAM3U-EK Evaluation Kit User Guide
6478F–ATARM–25-Jul-11
SAM3U-EK Evaluation Kit User Guide 8-1
6478F–ATARM–25-Jul-11
Section 8
Revision History
8.1 Revision History
Table 8-1.
Document Comments
Change Request
Ref.
6478F Section 5.1, ” Schematics”, PB5/AD1 changed to PB5/AD0 on Sheet 3/15. 7949
6478E Erratum added as a Section 7.1 in a newly created Section 7 “Errata” .7638
6478D Table 4-5, “PIO Port A Assignment” , first row edited. 7387
6478C Vendor name and reference removed from PSRAM in Section 4.3.2, ” Memory” and
Figure 4-2, ” PSRAM” 6975
6478B
Table 4-8, JP15 and JP16 Default Settings changed from ‘Open’ to ‘Close’; JP16 Feature
edited. 6445
Table 4-8, JP17 Default Setting changed from ‘Open’ to ‘Close’; JP17 Feature edited. 6727
6478A First issue.
6478F–ATARM–25-Jul-11
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