HCPL-3760-300 - Avago Technologies

Description

The HCPL-0370/3700 and HCPL-3760 are voltage/

current threshold detection optocouplers. The HCPL-

3760 is a low-current version of the HCPL-0370/

3700. To obtain lower current operation, the HCPL-

3760 uses a high-efficiency AlGaAs LED which

provides higher light output at lower drive currents.

The devices utilize threshold sensing input buffer ICs

which permit control of threshold levels over a wide

range of input voltages with a single external resistor.

The input buffer incorporates several features:

hysteresis for extra noise immunity and switching

immunity, a diode bridge for easy use with ac input

signals, and internal clamping diodes to protect the

buffer and LED from a wide range of over-voltage and

over-current transients. Because threshold sensing is

done prior to driving the LED, variations in optical

coupling from the LED to the detector will have no

effect on the threshold levels.

CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to

prevent damage and/or degradation which may be induced by ESD.

Functional Diagram

DC+

DC-

VCC

GND

TRUTH TABLE

(POSITIVE LOGIC)

INPUT

OUTPUT

HCPL-0370

HCPL-3700

HCPL-3760

AC/DC to Logic Int erface Optocouplers

Data Sheet

Features

•Standard (HCPL-0370/3700) and low input current

(HCPL-3760) versions

•AC or DC input

•Programmable sense voltage

•Hysteresis

•Logic compatible output

•Thresholds guaranteed over temperature

•Thresholds independent of LED optical parameters

•Recognized under UL 1577 and CSA approved for

dielectric withstand proof test voltage of 3750 Vac,

1 minute

Applications

•Limit switch sensing

•Low voltage detector

•5 V-240 V AC/DC voltage sensing

•Relay contact monitor

•Relay coil voltage monitor

•Current sensing

•Microprocessorinterfacing

HCPL-0370/3700/3760

The HCPL-0370/3700's input

buffer IC has a nominal turn on

threshold of 2.5 mA (ITH +) and 3.7

volts (VTH +).

The buffer IC for the HCPL-3760

was redesigned to permit a lower

input current. The nominal turn

on threshold for the HCPL-3760 is

1.2 mA (ITH +) and 3.7 volts (VTH +).

The high gain output stage

features an open collector output

providing both TTL compatible

saturation voltages and CMOS

compatible breakdown voltages.

By combining several unique

functions in a single package, the

user is provided with an ideal

component for industrial control

computer input boards and other

applications where a predeter-

mined input threshold level is

desirable.

Schematic

Ordering Information

Specify Part Number followed by Option Number (if desired)

Example

HCPL-0370#XXXX

No option = SO8 Package.

500 = Tape/Reel Package Option (1 K min.).

XXXE = Lead Free Option.

HCPL-37x0#XXXX

020 = 5000 V rms/1 minute UL Rating Option.

300 = Gull Wing Surface Mount Option.

500 = Tape/Reel Package Option (1 K min.).

XXXE = Lead Free Option.

Option data sheets available. Contact your Avago sales representative or authorized distributor for information.

Remarks: The notation “#” is used for existing products, while (new) products launched since 15th July 2001 and lead free option will use “–”

Package Outline Drawings

Standard DIP Package (HCPL-3700/3760)

Gull Wing Surface Mount Option 300 (HCPL-3700/3760)

9.40 (0.370)

9.90 (0.390)

1.78 (0.070) MAX.

1.19 (0.047) MAX.

A XXXX

YYWW

DATE CODE

0.76 (0.030)

1.40 (0.056) 2.28 (0.090)

2.80 (0.110)

0.51 (0.020) MIN.

0.65 (0.025) MAX.

4.70 (0.185) MAX.

2.92 (0.115) MIN.

DIMENSIONS IN MILLIMETERS AND (INCHES).

NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.

5678

4321

0.20 (0.008)

0.33 (0.013)

6.10 (0.240)

6.60 (0.260)

5° TYP.

7.36 (0.290)

7.88 (0.310)

DC+

DC-

GND

PIN ONE

TYPE NUMBER

RECOGNITION

3.56 ± 0.13

(0.140 ± 0.005)

0.635 ± 0.25

(0.025 ± 0.010) 12° NOM.

0.20 (0.008)

0.33 (0.013)

9.65 ± 0.25

(0.380 ± 0.010)

0.635 ± 0.130

(0.025 ± 0.005)

7.62 ± 0.25

(0.300 ± 0.010)

9.65 ± 0.25

(0.380 ± 0.010)

6.350 ± 0.25

(0.250 ± 0.010)

1.080 ± 0.320

(0.043 ± 0.013)

1.780

(0.070)

MAX.

1.19

(0.047)

MAX.

2.540

(0.100)

BSC

DIMENSIONS IN MILLIMETERS (INCHES).

TOLERANCES (UNLESS OTHERWISE SPECIFIED):

LEAD COPLANARITY

MAXIMUM: 0.102 (0.004)

NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.

xx.xx = 0.01

xx.xxx = 0.005

A XXXX

YYWW

DATE CODE

TYPE NUMBER

RECOGNITION

MOLDED

1.016 (0.040)

1.27 (0.050)

10.9 (0.430)

2.0 (0.080)

LAND PATTERN RECOMMENDATION

3.56 ± 0.13

(0.140 ± 0.005)

Package Outline Drawings, continued

Small Outline SO-8 Package (HCPL-0370)

XXX

YWW

8765

4321

5.994 ± 0.203

(0.236 ± 0.008)

3.937 ± 0.127

(0.155 ± 0.005)

0.406 ± 0.076

(0.016 ± 0.003) 1.270

(0.050)BSC

5.080 ± 0.127

(0.200 ± 0.005)

3.175 ± 0.127

(0.125 ± 0.005) 1.524

(0.060)

45° X 0.432

(0.017)

0.228 ± 0.025

(0.009 ± 0.001)

TYPE NUMBER

(LAST 3 DIGITS)

DATE CODE

0.305

(0.012)MIN.

TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH)

5.207 ± 0.254 (0.205 ± 0.010)

DIMENSIONS IN MILLIMETERS (INCHES).

LEAD COPLANARITY = 0.10 mm (0.004 INCHES) MAX.

NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX.

0.203 ± 0.102

(0.008 ± 0.004)

7°

PIN ONE

0 ~ 7°

7.49 (0.295)

1.9 (0.075)

0.64 (0.025)

LAND PATTERN RECOMMENDATION

Regulatory Information

The HCPL-0370/3700/3760 has

been approved by the following

organizations:

Recognized under UL 1577,

component recognition program,

File E55361 (HCPL-0370

pending).

CSA

Approved under CSA Component

Acceptance Notice #5, File CA

88324.

Solder Reflow Thermal Profile

Recommended Pb-Free IR Profile

TIME (SECONDS)

TEMPERATURE (°C)

200

100

50 150100 200 250

300

SEC.

50 SEC.

SEC.

160°C

140°C

150°C

PEAK

TEMP.

245°C

PEAK

TEMP.

240°C PEAK

TEMP.

230°C

SOLDERING

TIME

200°C

PREHEATING TIME

150°C, 90 + 30 SEC.

2.5°C ± 0.5°C/SEC.

3°C + 1°C/–0.5°C

TIGHT

TYPICAL

LOOSE

ROOM

TEMPERATURE

PREHEATING RATE 3°C + 1°C/–0.5°C/SEC.

REFLOW HEATING RATE 2.5°C ± 0.5°C/SEC.

217 °C

RAMP-DOWN

6 °C/SEC. MAX.

RAMP-UP

3 °C/SEC. MAX.

150 - 200 °C

260 +0/-5 °C

t 25 °C to PEAK

60 to 150 SEC.

20-40 SEC.

TIME WITHIN 5 °C of ACTU AL

PEAK TEMPERA TURE

PREHEAT

60 to 180 SEC.

Tsmax

Tsmin

TIME

TEMPERATURE

NOTES:

THE TIME FROM 25 °C to PEAK TEMPERATURE = 8 MINUTES MAX.

Tsmax = 200 °C, Tsmin = 150 °C

Insulation and Safety Related Specifications

8-Pin DIP

(300 mil) SO-8

Parameter Symbol Value Value Units Conditions

Min.. External Air Gap L(IO1) 7.1 4.9 mm Measured from input terminals to output

(External Clearance) sterminals, hortest distance through air

Min.. External Tracking L(IO2) 7.4 4.8 mm Measured from input terminals to output

Path (External Creepage) terminals, shortest distance path along body

Min.. Internal Plastic 0.08 0.08 mm Through insulation distance, conductor to

Gap (Internal Clearance) conductor, usually the direct distance between

the photoemitter and photodetector inside the

optocoupler cavity

Tracking Resistance CTI 200 200 V DIN IEC 1 12/VDE 0303 PART 1

(Comparative

Tracking Index)

Isolation Group IIIa Material Group (DIN VDE 0 110, 1/89, Table 1)

Recommended Operating Conditions

Parameter Symbol Min. Max. Units Note

Supply Voltage VCC 218 V

Operating Temperature TA070°C

Operating Frequency f 0 4 kHz 8

Absolute Maximum Ratings (No derating required up to 70°C)

Parameter Symbol Min. Max. Units Note

Storage Temperature TS-55 125 °C

Operating Temperature TA-40 85 °C

Lead Soldering Cycle Temperature 260 °C1

Time 10 s

Input Current Average 50 2

Surge IIN 140 mA 2, 3

Transient 500

Input Voltage (Pins 2-3) VIN -0.5 V

Input Power Dissipation HCPL-3700/3760 PIN 230 mW 4

HCPL-0370 172

Total Package Power Dissipation HCPL-3700/3760 PT305 mW 5

HCPL-0370 275

Output Power Dissipation HCPL-3700/3760 PO210 mW 6

HCPL-0370 103

Output Current Average IO30 mA 7

Supply Voltage (Pins 8-5) VCC -0.5 20 V

Output Voltage (Pins 6-5) VO-0.5 20 V

Solder Reflow Temperature Profile See Package Outline Drawings section

Parameter Sym. Device Min. Typ.[9] Max. Units Conditions Fig. Note

Input Threshold ITH+ HCPL-0370/3700 1.96 2.5 3.11 mA VIN = VTH+; VCC = 4.5 V; 2, 3 14

HCPL-3760 0.87 1.2 1.56

ITH- HCPL-0370/3700 1.00 1.3 1.62 VIN = VTH-; VCC = 4.5 V;

HCPL-3760 0.43 0.6 0.80

Input DC VTH+ 3.35 3.7 4.05 V VIN = V2 - V3; Pins 1 & 4 Open

Threshold (Pins 2, 3) VCC = 4.5 V; VO = 0.4 V;

Voltage IO ≥ 4.2 mA

VTH- 2.01 2.6 2.86 V VIN = V2 - V3; Pins 1 & 4 Open

VCC = 4.5 V; VO = 2.4 V;

IO ≤ 100 µA

AC VTH+ 4.23 4.9 5.50 V VIN = |V1 - V4|; 14, 15

(Pins 1, 4) Pins 2 & 3 Open

VCC = 4.5 V; VO = 0.4 V;

IO ≥ 4.2 mA

VTH- 2.87 3.7 4.20 V VIN = |V1 - V4|;

Pins 2 & 3 Open

VCC = 4.5 V; VO = 2.4 V;

IO ≤ 100 µA

Hysteresis IHYS HCPL-0370/3700 1.2 mA IHYS = ITH+ – ITH- 2

HCPL-3760 0.6

VHYS 1.2 V VHYS = VTH+ – VTH-

Input Clamp Voltage VIHC1 5.4 6.0 6.6 V VIHC1 = V2 - V3; V3 = GND; 1

IIN = 10 mA; Pins 1 & 4

Connected to Pin 3

VIHC2 6.1 6.7 7.3 V VIHC2 = |V1 - V4|;

|IIN| = 10 mA;

Pins 2 & 3 Open

VIHC3 12.0 13.4 V VIHC3 = V2 - V3; V3 = GND;

IIN = 15 mA; Pins 1 & 4 Open

VILC -0.76 V VILC = V2 - V3; V3 = GND;

IIN = -10 mA

Input Current IIN HCPL-0370/3700 3.0 3.7 4.4 mA VIN = V2 – V3 = 5.0 V 5

HCPL-3760 1.5 1.8 2.2

Bridge Diode VD1,2 HCPL-0370/3700 0.59 V IIN = 3 mA

HCPL-3760 0.51 IIN = 1.5 mA

VD3,4 HCPL-0370/3700 0.74 IIN = 3 mA

HCPL-3760 0.71 IIN = 1.5 mA

Logic Low Output VOL 0.1 0.4 V VCC = 4.5 V; IOL = 4.2 mA 5 14

Voltage

Logic High IOH 100 µAV

OH = VCC = 18 V 14

Output Current

Logic Low Supply ICCL HCPL-0370/3700 1.2 4 mA V2 – V3 = 5.0 V; VO = Open; 6

HCPL-3760 0.7 3 VCC = 5.0 V

Logic High Supply ICCH 0.002 4 µAV

CC = 18 V; VO = Open 4 14

Current

Input Capacitance CIN 50 pF f = 1 MHz; VIN = 0 V,

Pins 2 & 3, Pins 1 & 4 Open

Forward Voltage

Electrical Specifications

Over Recommended Temperature TA = 0°C to 70°C, Unless Otherwise Specified.

Current

Pins 1 & 4 Open

VO = 0.4 V; IO ≥ 4.2 mA

VO = 2.4 V; IOH ≤ 100 µA

Parameter Sym. Device Min. Typ. Max. Units Test Conditions Fig. Note

Propagation Delay HCPL-0370/3700 4.0

Time to Logic Low tPHL 15.0 µsR

L = 4.7 kΩ, CL = 30 pF 10

at Output HCPL-3760 4.5 7, 10

Propagation Delay HCPL-0370/3700 10.0

Time to Logic High tPLH 40.0 µsR

L = 4.7 kΩ, CL = 30 pF 11

at Output HCPL-3760 8.0

HCPL-0370/3700 20

Output Rise Time trµsR

L = 4.7 kΩ, CL = 30 pF

(10-90%) HCPL-3760 14 8

HCPL-0370/3700 0.3

Output Fall Time tfµsR

L = 4.7 kΩ, CL = 30 pF

(90-10%) HCPL-3760 0.4

Common Mode IIN = 0 mA, RL = 4.7 kΩ,

Transient Immunity |CMH|4000 V/µsV

O min = 2.0 V, VCM = 1400 V

at Logic High Output 9, 11 12, 13

Common Mode HCPL-0370/3700 IIN = 3.11 mA RL = 4.7 kΩ,

Transient Immunity |CML|600 V/µsV

O max = 0.8 V,

at Logic Low Output HCPL-3760 IIN = 1.56 mA VCM = 140 V

Switching Specifications

TA = 25°C, VCC = 5.0 V, Unless Otherwise Specified.

Package Characteristics

Over Recommended Temperature TA = 0°C to 70°C, Unless Otherwise Specified.

Parameter Sym. Min. Typ.[9] Max. Units Conditions Fig. Note

Input-Output Momentary VISO 3750 V rms RH ≤ 50%, t = 1 min; 16,

Withstand Voltage* TA = 25°C17

Option 020 5000 18

Input-Output Resistance RI-O 1012 ΩVI-O = 500 Vdc 16

Input-Output Capacitance CI-O 0.6 pF f = 1 MHz; VI-O = 0 Vdc

*The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage

rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Table (if applicable), your equipment level

safety specification, or Avago Application Note 1074, “Optocoupler Input-Output Endurance Voltage.”

Notes:

1. Measured at a point 1.6 mm below seating plane.

2. Current into/out of any single lead.

3. Surge input current duration is 3 ms at 120 Hz pulse repetition rate. Transient input current duration is 10 µs at 120 Hz pulse repetition rate. Note that

maximum input power, PIN, must be observed.

4. Derate linearly above 70°C free-air temperature at a rate of 4.1 mW/°C (HCPL-3700/3760) and 3.1 mW/°C (HCPL-0370). Maximum input power

dissipation of 230 mW (HCPL-3700/3760) and 172 mW (HCPL-0370) allows an input IC junction temperature of 125°C at an ambient temperature of

TA = 70°C. Excessive PIN and TJ may result in IC chip degradation.

5. Derate linearly above 70°C free-air temperature at a rate of 5.4 mW/°C (HCPL-3700/3760) and 5 mW/°C (HCPL-0370).

6. Derate linearly above 70°C free-air temperature at a rate of 3.9 mW/°C (HCPL-3700/3760) and 1.9 mW/°C (HCPL-0370). Maximum output power

dissipation of 210 mW (HCPL-3700/3760) and 103 mW (HCPL-0370) allows an output IC junction temperature of 125°C at an ambient temperature of

TA = 70°C.

7. Derate linearly above 70°C free-air temperature at a rate of 0.6 mA/°C.

8. Maximum operating frequency is defined when output waveform Pin 6 obtains only 90% of VCC with RL = 4.7 kΩ, CL = 30 pF using a 5 V square wave

input signal.

9. All typical values are at TA = 25°C, VCC = 5.0 V unless otherwise stated.

10. The tPHL propagation delay is measured from the 2.5 V level of the leading edge of a 5.0 V input pulse (1 µs rise time) to the 1.5 V level on the leading

edge of the output pulse (see Figure 10).

11. The tPLH propagation delay is measured from the 2.5 V level of the trailing edge of a 5.0 V input pulse (1 µs fall time) to the 1.5 V level on the trailing

edge of the output pulse (see Figure 10).

12. Common mode transient immunity in Logic High level is the maximum tolerable (positive) dVCM/dt on the leading edge of the common mode pulse,

VCM, to insure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode transient immunity in Logic Low level is the maximum

tolerable (negative) dVCM/dt on the trailing edge of the common mode pulse signal, VCM, to insure that the output will remain in a Logic Low state

(i.e., VO < 0.8 V). See Figure 11.

13. In applications where dVCM/dt may exceed 50,000 V/µs (such as static discharge), a series resistor, RCC, should be included to protect the detector IC

from destructively high surge currents. The recommended value for RCC is 240 Ω per volt of allowable drop in VCC (between Pin 8 and VCC) with a

minimum value of 240 Ω.

14. Logic low output level at Pin 6 occurs under the conditions of VIN ≥ VTH+ as well as the range of VIN > VTH– once VIN has exceeded VTH+. Logic high

output level at Pin 6 occurs under the conditions of VIN ≤ VTH- as well as the range of VIN < VTH+ once VIN has decreased below VTH-.

15. AC voltage is instantaneous voltage.

16. Device considered a two terminal device: Pins 1, 2, 3, 4 connected together, and Pins 5, 6, 7, 8 connected together.

17. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 V rms for 1 second (leakage detection

current limit, Ii-o ≤ 5 µA).

18. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 second (leakage detection current

limit, Ii-o ≤ 5 µA). This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN 60747-5-2

Insulation Characteristics Table.

Figure 1. Typical input characteristics, IIN vs.

VIN (AC voltage is instantaneous value). Figure 2. Typical transfer characteristics.

INPUT

DEVICE TH+TH–CONNNECTION

ITH HCPL-0370/3700 2.5 mA 1.3 mA PINS 2, 3

HCPL-3760 1.2 mA 0.6 mA OR 1, 4

VTH(dc) ALL 3.7 V 2.6 V PINS 2, 3

VTH(ac) ALL 4.9 V 3.7 V PINS 1, 4

Figure 5. Typical input current, IIN, and low level output voltage, VOL, vs. temperature.

Figure 6. Typical logic low supply current vs. supply voltage.

Figure 4. Typical high level supply current,

ICCH vs. temperature.

– INPUT CURRENT – mA

– TEMPERATURE – °C

1.2

-25

2.1

05075

0.9

1.7

1.9

-40 85

1.1

1.0

HCPL-3760

1.3

1.4

1.5

1.6

1.8

2.0

240

160

200

100

120

140

180

220

– LOW LEVEL OUTPUT VOLTAGE – mV

= 5.0 V

(PINS 2, 3)

= 5.0 V

= 4.2 mA

ICCL – LOGIC LOW SUPPLY CURRENT – mA

VCC – SUPPLY VOLTAGE – V

1.50

6.0

3.00

8.0 12.0 14.0

2.00

2.50

4.0 20.018.0

1.00

0.50

10.0 16.0

HCPL-3760

CCH

– HIGH LEVEL SUPPLY CURRENT – µA

– TEMPERATURE – °C

-25

05075

-5

-1

-40 85

-4

-3

-2

= 18 V

= OPEN

= 0 mA

CCH

Figure 3. Typical DC threshold levels vs. temperature.

– VOLTAGE THRESHOLD – V

– TEMPERATURE – °C

2.4

-25

4.2

05075

1.8

3.4

3.8

-40 85

2.2

2.0

HCPL-3760

2.6

2.8

3.0

3.2

3.6

4.0

0.7

1.6

0.4

1.2

1.4

0.6

0.5

0.8

0.9

1.0

1.1

1.3

1.5

– CURRENT THRESHOLD – mA

TH+

TH-

– VOLTAGE THRESHOLD – V

– TEMPERATURE – °C

2.4

-20

4.2

04060

1.8

3.4

3.8

-40 80

2.2

2.0

HCPL-0370/3700

2.6

2.8

3.0

3.2

3.6

4.0

1.4

3.2

0.8

2.4

2.8

1.2

1.0

1.6

1.8

2.0

2.2

2.6

3.0

– CURRENT THRESHOLD – mA

TH+

TH-

TH+

– INPUT CURRENT – mA

– TEMPERATURE – °C

2.4

-20

4.2

04060

1.8

3.4

3.8

-40 80

2.2

2.0

HCPL-0370/3700

2.6

2.8

3.0

3.2

3.6

4.0

240

160

200

100

120

140

180

220

– LOW LEVEL OUTPUT VOLTAGE – mV

= 5.0 V

(PINS 2, 3)

= 5.0 V

= 4.2 mA

CCL

– LOGIC LOW SUPPLY CURRENT – mA

– SUPPLY VOLTAGE – V

2.50

2.00

6.0

4.00

8.0 12.0 14.0

3.00

3.50

4.0 20.018.0

1.50

1.00

0.50

10.0 16.0

HCPL-0370/3700

Figure 7. Typical propagation delay vs. temperature.

– PROPAGATION DELAY – µs

– TEMPERATURE – °C

-25

05075

-40 85

HCPL-3760

22 R

= 4.7 kΩ

= 30 pF

= 5.0 V

PLH

5.0 V

1 ms PULSE WIDTH

f = 100 Hz

, t

= 1 µs (10-90%)

PHL

tr – RISE TIME – µs

TA – TEMPERATURE – °C

-25

05075

-40 85

HCPL-3760

15 RL = 4.7 kΩ

CL = 30 pF

VCC = 5.0 V

VIN =

5.0 V

1 ms PULSE WIDTH

f = 100 Hz

tr, tf = 1 µs (10-90%)

tf – FALL TIME – ns

700

100

500

600

200

300

400

Figure 8. Typical rise, fall times vs. temperature.

Figure 9. Common mode transient immunity

vs. common mode transient amplitude.

tp – PROPAGATION DELAY – µs

TA – TEMPERATURE – °C

-20

04060

-40 80

HCPL-0370/3700

22 RL = 4.7 kΩ

CL = 30 pF

VCC = 5.0 V

VIN =

tPLH

5.0 V

1 ms PULSE WIDTH

f = 100 Hz

tr, tf = 1 µs (10-90%)

tPHL

tr – RISE TIME – µs

TA – TEMPERATURE – °C

-20

04060

-40 80

HCPL-0370/3700

RL = 4.7 kΩ

CL = 30 pF

VCC = 5.0 V

VIN =

5.0 V

1 ms PULSE WIDTH

f = 100 Hz

tr, tf = 1 µs (10-90%)

600

400

500

100

200

300

tf – FALL TIME – ns

CM – COMMON MODE TRANSIENT IMMUNITY – V/ µs

– COMMON MODE TRANSIENT AMPLITUDE – V

400

5000

800 1600

3000

4000

0 2000

500

1200

1000

2000 V

= 5.0 V

= 0 mA

= 2.0 V

= 4.7 kΩ

= 25 °C

= 5.0 V

= 3.11 mA (0370/3700)

= 1.53 mA (3760)

= 0.8 V

= 4.7 kΩ

= 25 °C

Figure 12. Typical external threshold characteristics, V± vs. RX.

Figure 10. Switching test circuit.

Figure 11. Test circuit for common mode transient immunity and typical waveforms.

(0370/3700)

HCPL-0370/3700/3760

VTH+ = 3.7 V



VTH– = 2.6 V



VTH+ = 4.9 V



VTH– = 3.7 V

TH+

= 2.5 mA



TH–

= 1.3 mA



= 25 °C

HCPL-0370/3700

Electrical Considerations

The HCPL-0370/3700/3760

optocouplers have internal

temperature compensated,

predictable voltage and current

threshold points which allow

selection of an external resistor,

RX, to determine larger external

threshold voltage levels. For a

desired external threshold

voltage, V±, a corresponding

typical value of RX can be ob-

tained from Figure 12. Specific

calculation of RX can be obtained

from Equation (1). Specification

of both V+ and V- voltage threshold

levels simultaneously can be

obtained by the use of RX and RP

as shown in Figure 13 and

determined by Equations (2)

and (3).

RX can provide over-current

transient protection by limiting

input current during a transient

condition. For monitoring con-

tacts of a relay or switch, the

HCPL-0370/3700/3760 in

combination with RX and RP can

be used to allow a specific current

to be conducted through the

contacts for cleaning purposes

(wetting current).

The choice of which input voltage

clamp level to choose depends

upon the application of this

device (see Figure 1). It is recom-

mended that the low clamp

condition be used when possible.

The low clamp condition in

conjunction with the low input

current feature will ensure

extremely low input power

dissipation.

In applications where dVCM/dt

may be extremely large (such as

static discharge), a series resistor,

RCC, should be connected in series

with VCC and Pin 8 to protect the

detector IC from destructively

high surge currents. See Note 13

for determination of RCC. In addi-

tion, it is recommended that a

ceramic disc bypass capacitor of

0.01 µF be placed between Pins 8

and 5 to reduce the effect of

power supply noise.

For interfacing ac signals to TTL

systems, output low pass filtering

can be performed with a pullup

resistor of 1.5 kΩ and 20 µF

capacitor. This application

requires a Schmitt trigger gate to

avoid slow rise time chatter

problems. For ac input applica-

tions, a filter capacitor can be

placed across the dc input

terminals for either signal or

transient filtering.

Either ac (Pins 1, 4) or dc (Pins 2,

3) input can be used to determine

external threshold levels.

V+ - VTH+

(-) (-)

RX = (1)

ITH+

(-)

For two specifically selected

external threshold voltage levels,

V+ and V-, the use of RX and RP

will permit this selection via

equations (2), (3) provided the

following conditions are met. If

the denominator of equation (2) is

positive, then

V+VTH+ V+ - VTH+ ITH+

≥and <

V-VTH- V- - VTH- ITH-

Conversely, if the denominator of

equation (2) is negative, then

V+VTH+ V+ - VTH+ ITH+

≤and >

V-VTH- V- - VTH- ITH-

VTH- (V+) - VTH+ (V-)

RX = (2)

ITH+ (VTH-) - ITH- (VTH+)

VTH- (V+) - VTH+ (V-)

RP = (3)

ITH+(V--VTH-)+ITH-(VTH+-V+)

Figure 13. External threshold voltage level selection.

For one specifically selected

external threshold voltage level V+

or V-, RX can be determined

without use of RP via

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5989-2101EN February 28, 2006