DATA SH EET
Product specification
File under Integrated Circuits, IC04 January 1995
INTEGRATED CIRCUITS
HEF40106B
gates
Hex inverting Schmitt trigger
For a complete data sheet, please also download:
•The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
•The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
January 1995 2
Philips Semiconductors Product specification
Hex inverting Schmitt trigger HEF40106B
gates
DESCRIPTION
Each circuit of the HEF40106B functions as an inverter
with Schmitt-trigger action. The Schmitt-trigger switches at
different points for the positive and negative-going input
signals. The difference between the positive-going voltage
(VP) and the negative-going voltage (VN) is defined as
hysteresis voltage (VH).
This device may be used for enhanced noise immunity or
to “square up” slowly changing waveforms.
Fig.1 Functional diagram.
FAMILY DATA, IDD LIMITS category GATES
See Family Specifications
HEF40106BP(N): 14-lead DIL; plastic
(SOT27-1)
HEF40106BD(F): 14-lead DIL; ceramic (cerdip)
(SOT73)
HEF40106BT(D): 14-lead SO; plastic
(SOT108-1)
( ): Package Designator North America
Fig.2 Pinning diagram.
Fig.3 Logic diagram (one inverter).
January 1995 3
Philips Semiconductors Product specification
Hex inverting Schmitt trigger HEF40106B
gates
DC CHARACTERISTICS
VSS = 0 V; Tamb =25°C
V
DD
VSYMBOL MIN. TYP. MAX.
Hysteresis 5 0,5 0,8 V
voltage 10 VH0,7 1,3 V
15 0,9 1,8 V
Switching levels 5 2 3,0 3,5 V
positive-going 10 VP3,7 5,8 7 V
input voltage 15 4,9 8,3 11 V
negative-going 5 1,5 2,2 3 V
input voltage 10 VN3 4,5 6,3 V
15 4 6,5 10,1 V
Fig.4 Transfer characteristic.
Fig.5 Waveforms showing definition of
VP,V
Nand VH, where VNand VPare
between limits of 30% and 70%.
January 1995 4
Philips Semiconductors Product specification
Hex inverting Schmitt trigger HEF40106B
gates
AC CHARACTERISTICS
VSS = 0 V; Tamb =25°C; CL= 50 pF; input transition times ≤20 ns
VDD
VSYMBOL TYP. MAX. TYPICAL EXTRAPOLATION
FORMULA
Propagation delays
In→On5 90 180 ns 63 ns +(0,55 ns/pF) CL
HIGH to LOW 10 tPHL 35 70 ns 24 ns +(0,23 ns/pF)
15 30 60 ns 22 ns +(0,16 ns/pF) CL
5 75 150 ns 48 ns +(0,55 ns/pF) CL
LOW to HIGH 10 tPLH 35 70 ns 24 ns +(0,23 ns/pF) CL
15 30 60 ns 22 ns +(0,16 ns/pF) CL
Output transition times 5 60 120 ns 10 ns +(1,0 ns/pF) CL
HIGH to LOW 10 tTHL 30 60 ns 9 ns +(0,42 ns/pF) CL
15 20 40 ns 6 ns +(0,28 ns/pF) CL
5 60 120 ns 10 ns +(1,0 ns/pF) CL
LOW to HIGH 10 tTLH 30 60 ns 9 ns +(0,42 ns/pF) CL
15 20 40 ns 6 ns +(0,28 ns/pF) CL
VDD
VTYPICAL FORMULA FOR P (µW)
Dynamic power 5 2 300 fi+∑(foCL)×VDD2where
dissipation per 10 9 000 fi+∑(foCL)×VDD2fi= input freq. (MHz)
package (P) 15 20 000 fi+∑(foCL)×VDD2fo= output freq. (MHz)
CL= load capacitance (pF)
∑(foCL) = sum of outputs
VDD = supply voltage (V)
January 1995 5
Philips Semiconductors Product specification
Hex inverting Schmitt trigger HEF40106B
gates
Fig.6 Typical drain current as a function of input
voltage; VDD = 5 V; Tamb =25°C. Fig.7 Typical drain current as a function of input
voltage; VDD =10 V; Tamb =25°C.
Fig.8 Typical drain current as a function of input
voltage; VDD = 15 V; Tamb =25°C.
January 1995 6
Philips Semiconductors Product specification
Hex inverting Schmitt trigger HEF40106B
gates
If a Schmitt trigger is driven via a high impedance (R >1 kΩ) then it is necessary to incorporate a capacitor C of such
value that: , otherwise oscillation can occur on the edges of a pulse.
Cpis the external parasitic capacitance between input and output; the value depends on the circuit board layout.
Fig.9 Typical switching levels as a function of supply voltage VDD;T
amb =25°C.
Fig.10 Schmitt trigger driven via a high impedance (R >1 kΩ).
C
Cp
------- VDD VSS
–
VH
---------------------------
>
January 1995 7
Philips Semiconductors Product specification
Hex inverting Schmitt trigger HEF40106B
gates
APPLICATION INFORMATION
Some examples of applications for the HEF40106B are:
•Wave and pulse shapers
•Astable multivibrators
•Monostable multivibrators.
Fig.11 The HEF40106B used as an astable multivibrator.
