1. General description
XC7SH125 is a high-speed Si-gate CMOS device. It provides one non-inverting buffer/line
driver with 3-state output. The 3-state output is controlled by the output enable input (OE).
A HIGH at OE causes the output to assume a high-impedance OFF-state.
2. Features
nSymmetrical output impedance
nHigh noise immunity
nLow power dissipation
nBalanced propagation delays
nSOT353-1, SOT753, SOT886, and SOT891 package options
nESD protection:
uHBM JESD22-A114E: exceeds 2000 V
uMM JESD22-A115-A: exceeds 200 V
uCDM JESD22-C101C: exceeds 1000 V
nSpecified from 40 °C to +125 °C
3. Ordering information
XC7SH125
Bus buffer/line driver; 3-state
Rev. 01 — 4 September 2009 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
XC7SH125GW 40 °C to +125 °C TSSOP5 plastic thin shrink small outline package;
5 leads; body width 1.25 mm SOT353-1
XC7SH125GV 40 °C to +125 °C SC-74A plastic surface-mounted package; 5 leads SOT753
XC7SH125GM 40 °C to +125 °C XSON6 plastic extremely thin small outline package; no
leads; 6 terminals; body 1 × 1.45 × 0.5 mm SOT886
XC7SH125GF 40 °C to +125 °C XSON6 plastic extremely thin small outline package;
no leads; 6 terminals; body 1 ×1×0.5 mm SOT891
XC7SH125_1 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 01 — 4 September 2009 2 of 14
NXP Semiconductors XC7SH125
Bus buffer/line driver; 3-state
4. Marking
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
6. Pinning information
6.1 Pinning
Table 2. Marking codes
Type number Marking[1]
XC7SH125GW fM
XC7SH125GV f25
XC7SH125GM fM
XC7SH125GF fM
Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram
mna118
AY
2
1
4
OE
mna119
14
2
EN
mna120
AY
OE
Fig 4. Pin configuration
SOT353-1 and SOT753 Fig 5. Pin configuration SOT886 Fig 6. Pin configuration SOT891
XC7SH125
OE VCC
A
GND Y
001aak123
1
2
3
5
4
XC7SH125
A
001aak124
OE
GND
n.c.
VCC
Y
Transparent top view
2
3
1
5
4
6XC7SH125
A
001aak125
OE
GND
n.c.
VCC
Y
Transparent top view
2
3
1
5
4
6
XC7SH125_1 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 01 — 4 September 2009 3 of 14
NXP Semiconductors XC7SH125
Bus buffer/line driver; 3-state
6.2 Pin description
7. Functional description
8. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For TSSOP5 and SC-74A packages: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 packages: above 118 °C the value of Ptot derates linearly with 7.8 mW/K.
Table 3. Pin description
Symbol Pin Description
SOT353-1/SOT753 SOT886/SOT891
OE 1 1 output enable input
A 2 2 data input
GND 3 3 ground (0 V)
Y 4 4 data output
n.c. - 5 not connected
VCC 5 6 supply voltage
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state
Inputs Output
OE A Y
LLL
LHH
HXZ
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7.0 V
VIinput voltage 0.5 +7.0 V
IIK input clamping current VI < 0.5 V [1] 20 - mA
IOK output clamping current VO < 0.5 V or VO>V
CC + 0.5 V [1] -±20 mA
IOoutput current 0.5 V < VO <V
CC + 0.5 V - ±25 mA
ICC supply current - 75 mA
IGND ground current 75 - mA
Tstg storage temperature 65 +150 °C
Ptot total power dissipation Tamb = 40 °C to +125 °C[2] - 250 mW
XC7SH125_1 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 01 — 4 September 2009 4 of 14
NXP Semiconductors XC7SH125
Bus buffer/line driver; 3-state
9. Recommended operating conditions
10. Static characteristics
Table 6. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage 2.0 5.0 5.5 V
VIinput voltage 0 - 5.5 V
VOoutput voltage 0 - VCC V
Tamb ambient temperature 40 +25 +125 °C
t/V input transition rise and fall rate VCC = 3.3 V ± 0.3 V - - 100 ns/V
VCC = 5.0 V ± 0.5 V - - 20 ns/V
Table 7. Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 °C40 °C to +85 °C40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
VIH HIGH-level
input voltage VCC = 2.0 V 1.5 - - 1.5 - 1.5 - V
VCC = 3.0 V 2.1 - - 2.1 - 2.1 - V
VCC = 5.5 V 3.85 - - 3.85 - 3.85 - V
VIL LOW-level
input voltage VCC = 2.0 V - - 0.5 - 0.5 - 0.5 V
VCC = 3.0 V - - 0.9 - 0.9 - 0.9 V
VCC = 5.5 V - - 1.65 - 1.65 - 1.65 V
VOH HIGH-level
output voltage VI= VIH or VIL
IO=50 µA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V
IO=50 µA; VCC = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V
IO=50 µA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V
IO=4.0 mA; VCC = 3.0 V 2.58 - - 2.48 - 2.40 - V
IO=8.0 mA; VCC = 4.5 V 3.94 - - 3.8 - 3.70 - V
VOL LOW-level
output voltage VI= VIH or VIL
IO= 50 µA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V
IO= 50 µA; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V
IO= 50 µA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V
IO= 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V
IO= 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V
IOZ OFF-state
output current VI=V
CC or GND;
VCC = 5.5 V - - 0.25 - 2.5 - 10 µA
IIinput leakage
current VI= 5.5 Vor GND;
VCC = 0 V to 5.5 V - - 0.1 - 1.0 - 2.0 µA
ICC supply current VI=V
CC or GND; IO = 0 A;
VCC = 5.5 V - - 1.0 - 10 - 40 µA
CIinput
capacitance - 1.5 10 - 10 - 10 pF
XC7SH125_1 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 01 — 4 September 2009 5 of 14
NXP Semiconductors XC7SH125
Bus buffer/line driver; 3-state
11. Dynamic characteristics
[1] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[2] Typical values are measured at VCC = 3.3 V.
[3] Typical values are measured at VCC = 5.0 V.
[4] CPD is used to determine the dynamic power dissipation PD(µW).
PD=C
PD ×VCC2×fi+Σ(CL×VCC2×fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in Volts.
Table 8. Dynamic characteristics
GND = 0 V; For test circuit see Figure 9.
Symbol Parameter Conditions 25 °C40 °C to +85 °C40 °C to +125 °C Unit
Min Typ Max Min Max Min Max
tpd propagation
delay A to Y; see Figure 7 [1]
VCC = 3.0 V to 3.6 V [2]
CL= 15 pF - 4.7 8.0 1.0 9.5 1.0 11.5 ns
CL= 50 pF - 6.6 11.5 1.0 13.0 1.0 14.5 ns
VCC = 4.5 V to 5.5 V [3]
CL= 15 pF - 3.4 5.5 1.0 6.5 1.0 7.0 ns
CL= 50 pF - 4.8 7.5 1.0 8.5 1.0 9.5 ns
ten enable time OE to Y; see Figure 8 [1]
VCC = 3.0 V to 3.6 V [2]
CL= 15 pF - 5.0 8.0 1.0 9.5 1.0 11.5 ns
CL= 50 pF - 6.9 11.5 1.0 13.0 1.0 14.5 ns
VCC = 4.5 V to 5.5 V [3]
CL= 15 pF - 3.6 5.1 1.0 6.0 1.0 6.5 ns
CL= 50 pF - 4.9 7.5 1.0 8.5 1.0 9.5 ns
tdis disable time OE to Y; see Figure 8 [1]
VCC = 3.0 V to 3.6 V [2]
CL= 15 pF - 6.0 9.7 1.0 11.5 1.0 12.5 ns
CL= 50 pF - 8.3 13.2 1.0 15.0 1.0 16.5 ns
VCC = 4.5 V to 5.5 V [3]
CL= 15 pF - 4.1 6.8 1.0 8.0 1.0 8.5 ns
CL= 50 pF - 5.7 8.8 1.0 10.0 1.0 11.0 ns
CPD power
dissipation
capacitance
per buffer;
CL=50pF;f=1 MHz;
VI= GND to VCC
[4] -9- - - - -pF
XC7SH125_1 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 01 — 4 September 2009 6 of 14
NXP Semiconductors XC7SH125
Bus buffer/line driver; 3-state
12. Waveforms
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 7. Input (A) to output (Y) propagation delays
mnb153
tPHL tPLH
VM
VM
A input
Y output
GND
VI
VOH
VOL
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 8. Enable and disable times
mna644
tPLZ
tPHZ
outputs
disabled outputs
enabled
VY
VX
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
OE input
VI
VOL
VOH
VCC
VM
GND
GND
tPZL
tPZH
VM
VM
Table 9. Measurement points
Type Input Output
VMVMVXVY
XC7SH125 0.5VCC 0.5VCC VOL + 0.3 V VOH 0.3 V
XC7SH125_1 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 01 — 4 September 2009 7 of 14
NXP Semiconductors XC7SH125
Bus buffer/line driver; 3-state
Test data is given in Table 10.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Fig 9. Test circuit for measuring switching times
VMVM
tW
tW
10 %
90 %
0 V
VI
VI
negative
pulse
positive
pulse
0 V
VMVM
90 %
10 %
tf
tr
tr
tf
001aad983
DUT
VCC VCC
VIVO
RT
RLS1
CL
open
G
Table 10. Test data
Type Input Load S1 position
VItr, tfCLRLtPHL, tPLH tPZH, tPHZ tPZL, tPLZ
XC7SH125 VCC 3 ns 15 pF, 50 pF 1 kopen GND VCC
XC7SH125_1 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 01 — 4 September 2009 8 of 14
NXP Semiconductors XC7SH125
Bus buffer/line driver; 3-state
13. Package outline
Fig 10. Package outline SOT353-1 (TSSOP5)
UNIT A1
A
max. A2A3bpLHELpwyv
ceD(1) E(1) Z(1) θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.1
01.0
0.8 0.30
0.15 0.25
0.08 2.25
1.85 1.35
1.15 0.65
e1
1.3 2.25
2.0 0.60
0.15 7°
0°
0.1 0.10.30.425
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
0.46
0.21
SOT353-1 MO-203 SC-88A 00-09-01
03-02-19
wM
bp
D
Z
e
e1
0.15
13
54
θ
A
A2
A1
Lp
(A3)
detail X
L
HE
E
c
vMA
X
A
y
1.5 3 mm0
scale
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1
1.1
XC7SH125_1 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 01 — 4 September 2009 9 of 14
NXP Semiconductors XC7SH125
Bus buffer/line driver; 3-state
Fig 11. Package outline SOT753 (SC-74A)
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT753 SC-74A
wBM
bp
D
e
A
A1
Lp
Q
detail X
HE
E
vMA
AB
y
0 1 2 mm
scale
c
X
132
45
Plastic surface-mounted package; 5 leads SOT753
UNIT A1bpcDEHELpQywv
mm 0.100
0.013 0.40
0.25 3.1
2.7
0.26
0.10 1.7
1.3
e
0.95 3.0
2.5 0.2 0.10.2
DIMENSIONS (mm are the original dimensions)
0.6
0.2 0.33
0.23
A
1.1
0.9
02-04-16
06-03-16
XC7SH125_1 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 01 — 4 September 2009 10 of 14
NXP Semiconductors XC7SH125
Bus buffer/line driver; 3-state
Fig 12. Package outline SOT886 (XSON6)
terminal 1
index area
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT886 MO-252
SOT886
04-07-15
04-07-22
DIMENSIONS (mm are the original dimensions)
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
D
E
e1
e
A1
b
L
L1
e1
0 1 2 mm
scale
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
UNIT
mm 0.25
0.17 1.5
1.4 0.35
0.27
A1
max b E
1.05
0.95
Dee
1L
0.40
0.32
L1
0.50.6
A(1)
max
0.5 0.04
1
6
2
5
3
4
6×
(2)
4×
(2)
A
XC7SH125_1 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 01 — 4 September 2009 11 of 14
NXP Semiconductors XC7SH125
Bus buffer/line driver; 3-state
Fig 13. Package outline SOT891 (XSON6)
terminal 1
index area
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT891
SOT891
05-04-06
07-05-15
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm
D
E
e1
e
A1
b
L
L1
e1
0 1 2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
mm 0.20
0.12 1.05
0.95 0.35
0.27
A1
max b E
1.05
0.95
Dee
1L
0.40
0.32
L1
0.350.55
A
max
0.5 0.04
1
6
2
5
3
4
A
6×
(1)
4×
(1)
Note
1. Can be visible in some manufacturing processes.
XC7SH125_1 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 01 — 4 September 2009 12 of 14
NXP Semiconductors XC7SH125
Bus buffer/line driver; 3-state
14. Abbreviations
15. Revision history
Table 11. Abbreviations
Acronym Description
CMOS Complementary Metal Oxide Semiconductor
CDM Charged Device Model
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
Table 12. Revision history
Document ID Release date Data sheet status Change
notice Supersedes
XC7SH125_1 20090904 Product data sheet - -
XC7SH125_1 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 01 — 4 September 2009 13 of 14
NXP Semiconductors XC7SH125
Bus buffer/line driver; 3-state
16. Legal information
16.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
16.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors XC7SH125
Bus buffer/line driver; 3-state
© NXP B.V. 2009. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 4 September 2009
Document identifier: XC7SH125_1
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
18. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
7 Functional description . . . . . . . . . . . . . . . . . . . 3
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
9 Recommended operating conditions. . . . . . . . 4
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 12
15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12
16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13
16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13
16.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
16.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
17 Contact information. . . . . . . . . . . . . . . . . . . . . 13
18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14