MOTOROLA SC (XSTRS/R F) MOTOROLA TECHNICAL DATA Designers Data Sheet TMOS IV Power Field Effect Transistor N-Channel Enhancement-Mode Silicon Gate This advanced E-FET is a TMOS power MOSFET designed to withstand high energy in the avalanche and commutation modes. This device is also designed with a low thresh- old voltage so it is fully enhanced with 5 Volts. This new energy efficient device also offers a drain-to-source diode with a fast recovery time. Designed for low valtage, high speed switching applications in power supplies, converters and PWM motor controls, these devices are particularly well suited for bridge circuits where diode speed and com- mutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients. | | : Energy in the Avalanche Mode Unclamped TMOS Inductive Switching (UIS) Energy Capability Specified at 100C D @ Commutating Safe Operating Area (CSOA) Specified for Use in Half and Full Bridge Circuits @ Source-to-Drain Diode Recovery Time Comparabie to a Discrete Fast Recovery Diode Diode is Characterized for Use in Bridge Circuits G # IDSs. VGSith) 4nd VpS(on} Specified at 150C @ Available With Long Leads, Add 1 Suffix Low Drive Requirement to Interface Power Loads to Logic Level ICs or Microprocessors Vgsith) = 2 Volts Max @ Internal Source-to-Drain Diode Designed to Replace External Zener Transient Suppressor Absorbs High BBE D MM 6367254 0098541 B34 MMOTL = SEMICONDUO? MTD3055EL Motorola Preferred Device TMOS POWER MOSFET LOGIC LEVEL 10 AMPERES RpSion) = 0.18 OHM 60 VOLTS CASE 369A-10 MTD3055EL CASE 369-06 MTD3055EL1 S MAXIMUM RATINGS (Ty = 25C unless otherwise noted) Rating Symbol Value Unit Drain-Source Voltage Vpss 60 Vde Drain-Gate Voltage (Rqs = 1 MQ) VpGR 60 Vde Gate-Source Voltage Continuous Ves +15 Vde Non-repetitive (ty = 50 us) +20 Vpk Drain Current Continuous Ip 10 Adc Pulsed lom 26 Total Power Dissipation @ Tc = 25C Pp 40 Watts Derate above 25C 0 32 were Operating and Storage Temperature Range Ty. Tstg ~ 66 to 150 C THERMAL CHARACTERISTICS Thermal Resistance Junction to Case Resc 3.12 CW Junction to Ambient RaJA 62.5 Maximum Lead Temperature for Soldering Th 260 C Purposes, 1/8 from case for 5 seconds Designer's Data for Worst Case Conditions The Designer's Data Sheet permits the design of most circuits entirely from the information presented SOA Limit curves representing boundaries on device characteristics are given to facilitate worst case design Preferred device is a Motorola recommended choice for future use and best overall value. MOTOROLA TMOS POWER MOSFET DATA 3-147MTD3055EL MOTOROLA SC CXSTRS/R F) bBE D MM 6367254 0098542 570 MENOTE ELECTRICAL CHARACTERISTICS (Tc = 25C unless otherwise noted) Characteristic | Symbot | Min | Max | unit | OFF CHARACTERISTICS Drain-Source Breakdown Voltage ViBRIDSS 60 _ Vde (Vgg = 0, Ip = 0.25 mA) Zero Gate Voltage Drain Current loss pA {Vps = 60 V, Vgs = 9) _ 10 {Vps = 60 V, Vag = 9, Ty = 150C) 50 Gate-Body Leakage Current, Forward (VqsF = 15 Vdc, Vps = 0) IGSSF _ 100 nAdc Gate-Body Leakage Current, Reverse (Vqsp = 15 Vdc, Vpg = 0} IGSSR _ 100 nAdc ON CHARACTERISTICS* Gate Threshold Voltage VGSith) Vde (Vps = Ves. lp = 1 mA) 1 2 Ty = 150C 0.6 1.6 Static Drain-Source On-Resistance (Vgs = 5 Vdc, Ip = 6 Adc) Roston) _ 018 Ohm Drain-Source On-Voltage (Vgg = 5 V) VDSion) Vde (lp = 10 Adc) 2.4 (lp = 6 Ade, Ty = 150C} 1,95 Forward Transconductance {Vpg = 15 V, Ip = 6 A) OFS 5 _ mhos ORAIN-TO-SOURCE AVALANCHE CHARACTERISTICS Unclamped Drain-to-Source Avalanche Energy See Figures 13 and 14 WbsrR mJ (Ip = 264, Vpp = 6 V, Te = 25C, Single Putse, Non-repetitive) _ 18 (lp = 12 A, Vpp = 6Y. Tc = 25C, PW < 100 ps, Duty Cycle = 1%) _ 35 (Ip = 4.84, Vpp = 6 V, Tc = 100C, P.W. < 100 us, Duty Cycle < 1%) _ 16 DYNAMIC CHARACTERISTICS Vos = 25 V.Vgs = 0. f = 1 MHz 400 (Typ} Input Capacitance Vgg = 15 V.Vpg = 0,f = 1 MHz Ciss 1000 (Typ) _ pF See Figure 15 Vos = 25 V, V6g = 0, f = 1 MHz 30 (Typ) _ Reverse Transfer Capacitance Vos = 15 , Vpg = 0,f = 1 MHz Crss 660 (Typ) _ pF See Figure 15 . Vos = 25 V, Ves = 0, f = 1 MHz _ Output Capacitance See Figure 15 Coss 178 (Typ} pF SWITCHING CHARACTERISTICS (Ty = 100C) Turn-On Delay Time tdion) 20 (Typ) _ ns Rise Time (Vpp = 25V, Ip = 6A, ty 95 (Typ) Vgs = V. Rgen = 50 ohms, Turn-Off Delay Time Res = 50 ohms) td(off} 38 (Typ) Fail Time tf 50 (Typ) _ Total Gate Charge (Vpg = 48V, Ip = 124, Qg 7.2 (Typ) 7 nc Gate-Source Charge Vas = 5 Vdc} Ogs 2 (Typ) - Gate-Drain Charge See Figures 16 and 17 Oga 4 (Typ} - SOURCE DRAIN DIODE CHARACTERISTICS Forward On-Voltage (lg = 12 A, Veg = 0) Vsp 1.04 (Typ) 1.18 | Vde Forward Turn-On Time {lg = 26 A, Vgg = 0, ton Limited by stray inductance Reverse Recovery Time dis/dt = 400 A/us, VR = 30 V) ter 65 (Typ) L - | ns MOTOROLA TMOS POWER MOSFET DAFA 3-148MTD3055EL. MOTOROLA SC (XSTRS/R F) BBE D MM 6367254 0098543 407 MMOTL TYPICAL ELECTRICAL CHARACTERISTICS Figure 1. On-Region Characteristics Ty = 25C 75 Ip. ORAIN CURRENT [AMPS) 0 1 2 3 4 5 Vps. DRAIN-TO SOURCE VOLTAGE (VOLTS) Figure 3. Transfer Characteristics he oS Ty = 85C co R a Ip. DRAIN CURRENT tAMPS} = 0 2 3 4 5 6 Vgg, GATE TO-SOURCE VOLTAGE (VOLTS) Figure 5. On-Resistance versus Gate-to-Source Voltage 028 Ty = 25C 02 Ip - 6A O1 0.06 Ros(on)- ORAIN-TO-SOURCE RESISTANCE (GHMS) 0 3 6 q 12 5 Vgg. GATE TO-SOURCE VOLTAGE (VOLTS) Figure 2. Gate-Threshold Voltage Variation With Temperature rm Vog = Veg Ip = 1mA a [re] o co oc ~ Vgsith} GATE THRESHOLD VOLTAGE (NORMALIZED) 50) 25 a a 30 H 100 125 180 Ty, JUNCTION TEMPERATURE (C) Figure 4. On-Resistance versus Drain Current 025 T) = 100C a o = a ~ a nm a a an RDSion}. ON-RESISTANCE (OHMS) 0 3 6 3 12 15 Ip, DRAIN CURRENT (AMPS) Figure 6. On-Resistance Variation With Temperature 04 032 016 908 Rosion), DRAIN-TO-SOURCE RESISTANCE (OHMS) -30 -25 Q 25 50 15 100 126 150 Ty, JUNCTION TEMPERATURE (C) MOTOROLA TMOS POWER MOSFET DATA 3-149MTD3055EL MOTOROLA bE D SC CXSTRS/R F) 6367254 00948544 343 MENOTE Figure 7. Breakdown Voltage Variation With Temperature Ip = 250 pA Veg = 0 VeR(bSs}. ORAIN-TO-SOURCE VOLTAGE (NORMALIZED) 0 -25 0 H 50 75 100 125-150 Ty, SUNCTION TEMPERATURE (C} FORWARD BIASED SAFE OPERATING AREA The FBSOA curves define the maximum drain-to- source voltage and drain current that a device can safely handle when it is forward biased, or when it is on, or being turned on. Because these curves include the limi- tations of simultaneous high voltage and high current, up to the rating of the device, they are especially useful to designers of linear systems. The curves are based on acase temperature of 25C and a maximum junction tem- perature of 150C, Limitations for repetitive pulss at var- ious case temperatures can be determined by using the thermal response curves. Motorola Application Note, ANS5639, Transient Thermal Resistance-General Data and Its Use provides detailed instructions. Figure 8. Maximum Rated Forward Biased Safe Operating Area s dc 10 = Veg = 15V SINGLE PULSE Te = 2 ~~~ 7 RDSian) mm PACKAGE LIMIT THERMAL LIMIT ~~ Ip, DRAIN CURRENT (AMPS) 2 01 j 10 Vpg, DRAIN-TO SOURCE VOLTAGE (VOLTS) The switching safe operating area fundamental limits are the peak current, Ippy and the breakdown voltage, ViBR)DSS. This is applicable for both turn-on and turn- off of the devices for switching times less than one microsecond. The power averaged over a complete switching cycie must be less than: TJumax) Te Rac Figure 9. Thermal Response 10 07 05 03 ne), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) 00 0.05 003 001 0.02 SINGLE PULSE 00 0.01 002003 006 Oo 02 03 O05 10 20 30 650 10 0 30 50 100 t, TIME (ms) Rayctt) = r0 Rage Rajcit) = 312C Max D Curves Apply for Power Pulse Train Shown Read Time at ty Tytok) Te = Pip) Reycltt j Pipk) t +| 4 _ t9a DUTY CYCLE, 0 =1t 200 300 6500 3861000 MOTOROLA TMOS POWER MOSFET DATA 3-150MTD3055EL MOTOROLA SC (XSTRS/R F) b6E D MM 6367254 0098545 28T MENOTL COMMUTATING SAFE OPERATING AREA (CSOA) The Commutating Safe Operating Area (CSOA) of Figure 11 defines the limits of safe operatin for com- mutated source-drain current versus re-applied drain voltage when the source-drain diode has undergone for- ward bias. The curve shows the limitations of IFpy and peak Vps for a given rate of change of source current. It is applicable when waveforms similar to those of Figure 10 are present. Full or half-bridge PWM DC motor con- trollers are common applications requiring CSOA data. Device stresses increase with increasing rate of change of source current so dls/dt is specified with a maximum value. Higher values of di,/dt require an appropriate der- ating of lf, peak Vps or both. Ultimately dl./dt is limited primarily by device, package, and circuit impedances. Maximum device stress occurs during t-, as the diode goes from conduction to reverse blocking. VDS(pk) is the peak drain-to-source voltage that the device must sustain during commutation; IFfy is the max- imum forward source-dratn diode current just prior to the onset of commutation. VR is specified at 80% of Vigaypss to ensure that the CSOA stress is maximized as ig decays from IR to zero. Res should be minimized during commutation. Ty has only a second order effect on CSOA, Stray inductances in Motorolas test circuit are assumed to be practical minimums. dVps/dt in excess of 10 V/ns was attained with dlg/dt of 400 A/us. Figure 11. Commutating Safe Operating Area (CSOA) 30 dig/dt < 400 Ajus 24 Ig, DRAIN CURRENT (AMPS) 0 10 20 30 40 50 60 Vpg, SOURCE-TO-ORAIN VOLTAGE {VOLTS} Figure 13. Unclamped Inductive Switching Test Circuit Figure 10. Commutating Waveforms 16 Vos Vpsipkt VR aVpsidt v os VE Vas t Fs h A >| MAX CSOA STRESS AREA Figure 12. Commutating Safe Cperating Area Test Circuit = VR = 80% OF RATED Vos VdsL = Vp + L: dlg/dt Figure 14. Unclamped Inductive Switching Waveforms ViBRIDSS \ t (TIME) * Vpp _ {~_ ple pw, m| 1 Vj won (00) (te) DSR (; 0} \Wiarioss - Yoo MOTOROLA TMOS POWER MOSFET DATA 3-151MTD3055EL MOTOROLA SC CXSTRS/R F) BSE D MM 6367254 GO98S4b L1b HEMOTL Figure 15. Capacitance Variation Figure 16. Gate Charge versus Gate-to-Source Voltage ~a-Yos-- 0 53 __- 1200 8 Vop = 24 Css Yps = 0 720 Crss , CAPACITANCE (pF) Vs, GATE TO-SOURCE VOLTAGE 240 Crgg 1510 5 i) 5 40 6 0 % WwW % 0 2 4 6 8 10 Vg + Vps Qg, TOTAL GATE CHARGE (nC) GATE TO SOURCE OR ORAIN-TO SOURCE VOLTAGE (VOLTS| Figure 17. Gate Charge Test Circuit +18V Yoo J SAME OV | rook l-y DEVICE TYPE t--# AS DUT e041 wr li|1 FERRITE }-~ 100 sBEAD ae Vin = 15 Vpk. PULSE WIDTH << 100 yes, DUTY CYCLE = 10% a MOTOROLA TMOS POWER MOSFET DATA 3-152