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Copyright 1998, Texas Instruments Incorporated 1 of 3 Products Development Tools Applications Search >> Semiconductor Home > Products > Digital Logic > Flip-Flops > D-Type Flip-Flops > SN74LS175, QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR Device Status: Active > Description > Features > Datasheets > Pricing/Samples/Availability > Application Notes > Related Documents Parameter Name SN74LS175 Voltage Nodes (V) 5 Vcc range (V) 4.75 to 5.25 Input Level TTL Output Level TTL Output Drive (mA) -0.4/8 Output 2S No. of Bits 4 Static Current 18 th (ns) 5 tpd(max) (ns) 25 tsu (ns) 20 Description These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement Dtype flip-flop logic. All have a direct clear input, and the '175, 'LS175, and 'S175 feature complementary outputs from each flip-flop. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. These circuits are fully compatible for use with most TTL circuits. Features 2 of 3 '174, 'LS174, 'S174 ... HEX D-TYPE FLIP-FLOPS '175, 'LS175, 'S175 ... QUADRUPLE D-TYPE FLIP-FLOPS l l l l l l '174, 'LS174, 'S174 Contain Six Flip-Flops with Single-Rail Outputs '175, 'LS175, 'S175 Contain Four Flip-Flops with Double-Rail Outputs Three Performance Ranges Offered: See Table Lower Right Buffered Clock and Direct Clear Inputs Individual Data Input to Each Flip-Flop Applications include: Buffer/Storage Registers Shift Registers Pattern Generators To view the following documents, Acrobat Reader 3.x is required. To download a document to your hard drive, right-click on the link and choose 'Save'. Datasheets Full datasheet in Acrobat PDF: sdls068.pdf (352 KB) Full datasheet in Zipped PostScript: sdls068.psz (394 KB) Pricing/Samples/Availability Orderable Device Package Pins Temp (C) Status Price/unit Pack Qty Availability / Samples USD (100-999) SN74LS175D D 16 0 TO 70 ACTIVE 0.48 40 Check stock or order SN74LS175DR D 16 0 TO 70 ACTIVE 0.43 2500 Check stock or order SN74LS175J J 16 0 TO 70 OBSOLETE SN74LS175N N 16 0 TO 70 ACTIVE 0.38 25 Check stock or order SN74LS175N3 N 16 0 TO 70 OBSOLETE SN74LS175NSR NS 16 0 TO 70 ACTIVE 0.48 2000 Check stock or order Application Reports View Application Reports for Digital Logic l l l l DESIGNING WITH LOGIC (SDYA009C - Updated: 06/01/1997) DESIGNING WITH THE SN54/74LS123 (SDLA006A - Updated: 03/01/1997) INPUT AND OUTPUT CHARACTERISTICS OF DIGITAL INTEGRATED CIRCUITS (SDYA010 - Updated: 02/05/1999) LIVE INSERTION (SDYA012 - Updated: 02/05/1999) 3 of 3 Related Documents l l l DOCUMENTATION RULES (SAP) AND ORDERING INFORMATION (SZZU001B, 4 KB - Updated: 05/06/1999) LOGIC SELECTION GUIDE FEBRUARY 2000 (SDYU001M, 13837 KB - Updated: 02/01/2000) MORE POWER IN LESS SPACE - TECHNICAL ARTICLE (SCAU001A, 850 KB - Updated: 03/01/1996) Table Data Updated on: 8/1/2000 (c) Copyright 2000 Texas Instruments Incorporated. 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