SY55859L
3.3V, 3.2Gbps Dual 2X2 Crosspoint Switch
SuperLite is a trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.c om
Januar y 2010
M9999-012110-A
hbwhelp@micrel.com or (408) 955-1690
General Description
The SY55859L is a dual CML 2x2 crosspoint switch
optimized for high-speed data and/or clock applications
(up to 3.2Gbps or 2.7GHz) where low jitter and skew are
critic a l. This devic e is pi n -for-pin, p lug-in c ompatible t o th e
MAX3840. Each 2x2 of th e SY55859L rout es any input to
any output, and thus can distribute or multiplex a clock or
data stream. The I/O architecture is fully differential and
CML com patib le. Bot h i npu ts and o utp uts ar e o ptimized for
50 transmission lines. The inputs (DA 0-1 and DB 0-1)
are internally terminated with 50, thus eliminating
external termination, and the outputs (QA0-1 and QB0-1)
include 50 source termination. Furthermore, a power-
saving output enable feature is provided which powers-
down unused outputs.
The SY5859L operates from a +3.3V ±10% sup ply, and is
guaranteed over the industrial (–40°C to +85°C)
temperature range. It is available in a 32-pin (5mm x
5mm) QFN package.
For applicat ions that requir e either lower vo ltage operatio n
or a more flexible input interface (for applications such as
AC–coupled LVPECL inputs), consider the SY55858U.
Data sheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
SuperLiteTM
Features
• Pin-for-pin, plug-in compatible to the MAX3840
• Supply voltage operation: +3.3V±10%
• Low Jitter:
-2psRMS random jitter
-5psPP deterministic jitter
• Power saving output disable feature
• 15ps channel-to-channel skew
• Fast CML outputs: <100ps tr/tf
• Available in a small (5mm x 5mm) 32-pin EPAD-QFN
package
Applications
• SONET/SDH opt ical tr ansp or t
• High-speed backplane redundancy
• Add-drop multiplexers
___________________________________________________________________________________________________________
Typical Appli cations Typical Performance
Micrel, Inc.
SY55859L
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Ordering Information(1)
Part Number Package Type Operating Range Package Marking Lead Finish
SY55859LMI H32-1 Industrial SY55859LMI Sn-Pb
SY55859LMITR(2) H32-1 Industrial SY55859LMI Sn-Pb
SY55859LMG(3)
H32-1
Industrial
SY55859LMG with Pb-Free
bar-line indicator Pb-Free
NiPdAu
SY55859LMGTR(2,3) H32-1 Industrial SY55859LMG with Pb-Free
bar-line indicator Pb-Free
NiPdAu
Notes:
1. Contact f act ory for die availabi lity. Dice are guaranteed at TA = 25°C, DC Electricals only.
2. Tape and Reel.
3. Pb-Free package recommended for new designs.
Cross Reference Table
Micrel Se m icon d u ctor
Maxim
SY55859LMI MAX3840EGJ
Pin Configuration
32-Pin EPAD-QFN
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SY55859L
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Pin Description
Pin Number Pin Name Pin Function
1 ENB1 TTL Input. Channel B1 Output Enable. Setting this pin inactive low powers down
QB1 and /QB1. Do not leave floating.
2 DB1 CML Input. Channel B1 true input.
3 /DB1 CML Input. Channel B1 complement input.
4 ENB0 TTL Input. Channel B0 Output Enable. Setting this pin inactive low powers down
QB0 and /QB. Do not leave floating.
5 SELB0 TTL Input. Channel B0 output select. Please refer to Table 2. Do not leave
floating.
6 DB0 CML Input. Channel B0 true input.
7 /DB0 CML Input. Channel B0 complement input.
8 SELB1 TTL Input. Channel B1 output select. Please refer to Table 2. Do not leave
floating.
9, 24 GND Supply ground. Most negative supply voltage.
10, 13, 16, 17,
20, 23 VCC Positive Supply.
11 /QB0 CML Output. Channel B0 complement output.
12 QB0 CML Output. Channel B0 true output.
14 /QB1 CML Output. Channel B1 complement output.
15 QB1 CML Output. Channel B1 true output.
18 /QA1 CML Output. Channel A1 complement output.
19 QA1 CML Output. Channel A1 true output.
21 /QA0 CML Output. Channel A0 complement output.
22 QA0 CML Output. Channel A0 true output.
25 SELA1 TTL Input. Channel A1 output select. Please refer to Table 1. Do not leave
floating.
26 DA0 CML Input. Channel A0 true input.
27 /DA0 CML Input. Channel A0 complement input.
28 SELA0 TTL Input. Channel A0 output select. Please refer to Table 1. Do not leave
floating.
29 ENA0 TTL Input. Channel A0 output enable. Setting this pin inactive low powers down
QA0 and /QA0. Do not leave floating.
30 DA1 CML Input. Channel A1 true input.
31 /DA1 CML Input. Channel A1 complement input.
32 ENA1 TTL Input. Channel A1 output enable. Setting this pin inactive low powers down
QA1 and / QA1. Do not leave floating.
EP Exposed Pad Ground. This must be soldered to circuit board ground for proper electrical and
thermal operation.
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SY55859L
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Absolute Maximum Ratings(1)
Supply Voltage (VCC) ..................................... -0.5V to +6.0V
CML Input Voltage (VIN). ............................... -0.5V to +6. 0V
TTL Control Input Voltage (VIN). ............. -0.5V to VCC +0.5V
CML Output Voltage (VOUT) ............. VCC -1.0V to VCC +0.5V
CML Output Current (IOUT) .......................................... 22mA
Lead Temperature (soldering, 20sec.) ..................... +260°C
Storage Temperature (TS) ......................... –65°C to +150°C
Operating Ratings(2)
Supply Voltage (VCC).................................. +3.0 to +3.6V
Ambient Temperature (TA) ..................... –40°C to +85°C
Junction Temperature (TJ) .................................... 160°C
Package Thermal Resistance
QFN (θJA)
Still-air……………………………………....28°C/W
500lfpm……………………………………..20°C/W
QFN (θJC)………………………………………4°C/W
DC Electrical Characteristic s
TA = –40°C to +85°C.
Symbol Parameter Condition Min Typ Max Units
VCC Power Supply Voltage 3.0 3.3 3.6 V
ICC Power Supply Current No Load, Over Supply Voltage; All
Outputs Enabled 160 190 mA
CML DC Electrical Characteristics
VCC = 3.0V to 3.6V; GND = 0V; TA = –40°C to +85°C (Note 3)
Symbol Parameter Condition Min Typ Max Units
VOUT CML Differential Output Swing RL = 50Ω to VCC, Figure 3 640 800 1000 mVPP
ROUT Differential Output Impedance Figure 2 85 100 115 Ω
VOCM CML Output Common Mode
Voltage RL = 50Ω to VCC, Figure 3 VCC-0.2 V
VIS CML Input Voltage Range Figure 4 VCC-0.8 VCC+0.4 V
VDIFF CML Differential Input Voltage
Swing Figure 5 300 1600 mVPP
CML Single-ended Input
Impedance Figure 1 42.5 50 57.5 Ω
TTL Control Electrical Characteristics
VCC = 3.0V to 3.6V; GND = 0V; TA = –40°C to +85°C (Note 3)
Symbol Parameter Condition Min Typ Max Units
VIH TTL Input HIGH Voltage 2.0 V
VIL TTL Input LOW Voltage 0.8 V
IIH TTL Input HIGH Current -10 +10 µA
IIL TTL Input LOW Current -10 +10 µA
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than thos e detailed in the operati onal sections of this data sheet. E xposure to absolute maximum rating c onditions for extended
periods may affect reliabi l ity.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. The device is guaranteed to meet the DC specifications, shown in the table above, after thermal equilibrium has been established. The device is
tested in a socket such that transverse airfl ow of ≥500lfpm is maintained.
Micrel, Inc.
SY55859L
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AC Electrical Characteristics
VCC = 3.0V to 3.6V; GND = 0V; TA = –40°C to +85°C (Note 1)
Symbol Parameter Condition Min Typ Max Units
fMAX Maximum NRZ Data Rate 3.2 Gbps
fMAX Maximum Clock Rate 2.7 GHz
tPD Propagation Delay from
Input-to-Output 275 ps
RJ Random Jitter Note 2 2 psRMS
DJ Deterministic Jitter Note 3 5 20 psPP
tSKDIFF CML Output Differential Skew Any Differential Pair- Duty C ycle
Distortion 7 25 ps
tSKEW CML Output Channel-to-Channel Note 4, Any Two Outputs 15 40 ps
tr, tf CML Output Rise/Fall Times (20% to 80%) 80 135 ps
Notes:
1. AC characteristics are guaranteed by design and characterizati on. Test ed using environm ent of Figure 6, 50Ω equivalent load.
2. Measured with 100mVp-p noise (f ≤ 2MHz) on the power supply.
3. Deterministic jitter (DJ) is the arithmetic s um of pattern-dependent j i tt er pulse width distortion.
4. This represents the skew on a QA and QB output with t hei r inputs receiving t he same signal.
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SY55859L
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Typical Characteris tics
Figure 1. Input Structure
Figure 4. Input Range
Figure 2. Output Structure
Figure 5a. Input Levels
Figure 3a. Output Levels
Figure 5b. Input Levels
Figure 3b. Output Levels
Figure 6. Output Interface
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SY55859L
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Functional Characteristics
SY55859L is a dual cross point with excellent pin-to-pin
and part-to-part skew matching. As shown in table 1,
based on the logic value at TTL input SELA0, output
QA0 replicates either input DA0 or DA1. TTL input
SELA1 selec ts whether output Q A1 replicates in put DA0
or DA1. As shown in table 2, TTL inputs SELB0 and
SELB1 perform similarly for outputs QB0 and QB1
respectively, choosing between inputs DB0 or DB1.
If the two control inputs are tied together, SY55859L
behaves as a redundant distribution device. Depending
on the state of the combined control inputs, QA0 and
QA1 will both replicate either DA0 or DA1. If the two
control inputs are made the logical complement of each
other, the SY55859L functions as a crosspoint, either
sending DA0 to QA0 and DA1 to QA1, or sending DA0
to QA1 and DA1 to QA0. The same applies to channel
B.
SY85859L’s CML outputs are source terminated to 50
individually, 100 differentially. The CML inputs are
parallel terminated, also to 50. This improves signal
integrity. With all terminations on chip, high-speed
interfacing is greatly simplified, eliminating the need for
external termination passive components. Figures 1 and
2 show the input and output structures.
SELA0 SELA1 QA0 QA1 Function
0 0 DA0 DA0 Fanout Buffer
0 1 DA0 DA1 Dual Buffer
1 0 DA1 DA0 Dual Buffer
1 1 DA1 DA1 Fanout Buffer
CTL CTL Same Same Redundant Distribution
CTL /CTL Opposite Opposite Crosspoint
Table 1. Input to Output Connectivity, Crosspoint A
SELA0 SELA1 QA0 QA1 Function
0 0 DA0 DA0 Fanout Buffer
0 1 DA0 DA1 Dual Buffer
1 0 DA1 DA0 Dual Buffer
1 1 DA1 DA1 Fanout Buffer
CTL CTL Same Same Redundant Distribution
CTL /CTL Opposite Opposite Crosspoint
Table 2. Input to Output Connectivity, Crosspoint B
Micrel, Inc.
SY55859L
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Application Information
The eight TTL compliant inputs to SY55859L are ENA0,
ENA1, ENB0 ENB1, SELA0, SELA1, SELB0 and
SELB1. T hese hig h im pedance inp uts do n ot defau lt to a
stable logic state when left unconnected. Therefore,
these TTL compliant inputs cannot be left floating.
Connect these inputs to a valid control signal, or
hardwire to VCC or GND.
The f our enable TTL inputs , when driven low, disab le t he
corresponding output stage. This reduces power
consumption. Disabled output stages do not go into a
high impedance state. Rather, each pin of a disabled
output stage pair goes high through its respective 50Ω
source termination.
The delay from a logic transition on an enable input to
the corresponding effect on the CML output is not
defined in th e tables of this data she et. This del ay is 3ns
typical, and 10ns maximum. Please note that, for cases
where highly capacitive lines are being driven, the RC
effects of the line may make this delay longer.
The dela y from a logic transition on a select input to the
corresponding CML output is also not defined in the
tables. It is 300psec typical, 500psec maximum.
For best performance, use good high frequency layout
techniques, filter VCC supplies, and keep ground
connections short. Use multiple vias where possible.
Also, use controlled impedance transmission lines to
interface with the SY55859L data inputs and outputs.
Micrel, Inc.
SY55859L
Januar y 2010 11 M9999-012110-A
hbwhelp@micrel.com or (408) 955-1690
Related Product and Support Documentation
Part Number Function Data Sheet Link
SY55854U 2x2 CML Crosspoint www.micrel.com/product-info/products/sy55854u.shtml
SY55858U Dual 2x2 CML Crosspoint www.micrel.com/product-info/products/sy55858u.shtml
Micrel, Inc.
SY55859L
Januar y 2010 12 M9999-012110-A
hbwhelp@micrel.com or (408) 955-1690
Package Information
32-Pin EPAD-QFN
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-10 00 WEB http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its
use. Micrel reserves the right to change circuit ry and specific ations at any time without notification to the customer.
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can reasonably be expected to result in personal injury. Life support devices or systems are devices or syst ems that (a) are int ended for surgic al im
plant
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s a Purchaser’s own risk and Purchaser agrees to fully
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© 2005 Micrel, Incorporated.
