TC78H670FTG
1 2019-11-28
© 2019
Toshiba Electronic Devices & Storage Corporation
TOSHIBA CD process Integrat ed Circuit Sil ic on M onolithic
TC78H670FTG
Clock-in and Serial controlled Bipolar Stepping Motor Driver
1. Outline
The T C78H 670FT G is a two-phase bipolar stepping motor driver using a PWM
chopper which incorporate DMOS with low on-resistance in output
transistors. The clock-in decoder is built in.
2. Features
• Built-in Dual H Bridges, Capab le of control lin g 1 bipolar step p ing motor
• PWM controlled constant-current drive
• Power supply operating voltage: 2.5 V to 16.0 V
• Output current ratings: 2.0 A (max)
• Low on-resistance (High + Low side = 0.48 Ω (typ.)) MOSFET output stage
• Allows full, ha lf, quar t er, 1/8, 1/16, 1/32, 1/64, 1/128 step operation
• Built-in Sense resistor less current control architecture (Advanced Current Detection System)
• Multi error detect functions (Thermal shutdown (TSD), Over current (ISD), motor load open (OPD)
and Under voltage lockout(UVLO))
• Error detection (TSD/ISD/OPD) flag output function
• Built-in VCC regulator for internal circuit
• Chopping frequency of a motor can be adjusted by external resistor
• Small QFN package with thermal pad (16pin)
Note: Please be car eful abo ut ther m al condit i ons duri ng usi n g.
Note: It is possible to detect OPD only when Serial mode is selected.
Start of commercial production
2020-01
Weight: 22.9 mg (typ.)
P-VQFN16-0303-0.50-001
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3. Pin Assignment
Note: Please solder the corner pads and the rear thermal pad of the QFN package, to the GND pattern of the PCB.
(Top View)
VM
PGND_A
AGND
OUT_A+
OUT_A-
OUT_B-
OUT_B+
PGND_B
TC78H670FTG
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
VREF
OSCM
STBY
MODE3 / CW-CCW
MODE0 /
UP-DW /
S_DATA
EN / ERR
MODE1 /
SET_EN /
LATCH
MODE2 /
CLK /
S_CLK
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4. Pin Descr iption
Pin No. STBY = Low STBY = High Pin description
CLK-IN mode Serial mode
1 MODE3 CW-CCW NC MODE3: Step mode select pin
CW-CCW: Current direction setup pin
2 AGND ← ← GND pin
3 VM ← ← Motor power supply input pin
4 PGND_A ← ← Ach Power GND pin
5 OUT_A+ ← ← A channel motor output(+) pin
6 OUT_A- ← ← A channel motor output(-) pin
7 OUT_B- ← ← B channel motor output(-) pin
8 OUT_B+ ← ← B channel motor output(+) pin
9 PGND_B ← ← Bch Power GND pin
10 VREF ← ← Current threshold reference pin
11 OSCM ← ← Internal oscillator frequency setting pin
12 STBY ← ← Standby pin
13 EN/ERR ← ← Enable(Motor output ON/OFF) pin /
Error detection flag output pin
14 MODE0 UP-DW S_DATA MODE0: Step mode select pin
UP-DW: Step mode setting pin
S_DATA: Serial data input pin
15 MODE1 SET_EN LATCH MODE1: Step mode select pin
SET_EN: Step mode setting enable pin
LATCH: Latch enable pin
16 MODE2 CLK S_CLK MODE2: Step mode select pin
CLK: Step Clock input pin
S_CLK: Seri al clo ck inp ut pin
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5. Block Diagram
Note: Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for
explanatory purpose.
Note: All the grounding wires should be solid patterns and be externally terminated at only one point. Also, a
grounding method should be considered for efficient heat dissipation. Careful attention should be paid to the
layout of the output, VM and GND traces, to avoid short circuits across output pins or to the power supply or
ground. If su ch a shor t ci rcu it occurs, t he dev ic e m ay be perm anently da mage d. Al so, t he ut most c are shoul d
be taken for pattern designing and implementation of the device since it has power supply pins (VM, AGND,
PGND_x, OUT_x+ and OUT_x- (x = A or B)) through which a particularly large current may run. If these pins
are wired incorre ctly , a n operation er ror may oc cur or the device may be destroy ed. The logi c i nput pi ns m ust
also be w ired correctly. O therwise, t he device may be damaged ow ing to a current running t hrough the IC th at
is larger than the specified current. Careful attention should be paid to design patterns and mountings.
Control
circuit OPD
TSD
ISD
Regulator
M
OUT_A+
STBY
OSC
VM
０1
PGND_A
AGND
DAC
VREF
MODE2 / CLK / S_CLK
MODE1 / SET_EN / LATCH
EN / ERR
OSCM
MODE0 / UP-DW / S_DATA
MODE3 / CW-CCW
OUT_A-
OUT_B+
OUT_B-
PGND_B
UVLO
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6. Input / Output Equivalent Circuit
Pin name Equivalent circuit
MODE3 / CW-CCW
MODE2 / CLK / S_CLK
MODE1 / SET_EN / LATCH
MODE0 / UP-DW / S_DATA
STBY
EN / ERR
VREF
OSCM
OUT_A+
OUT_A-
OUT_B+
OUT_B-
PGND_A
PGND_B
X=A or B
Note: The equivalent circ uit di agr am s may be simpl ifie d for e xplanatory purpose s.
VREF
OSCM
MOD E3 / CW-CCW
MODE2 / CLK / S_CLK
MOD E1 / SET_ EN / LATCH
MODE0 / UP-DW / S_DATA
STBY
EN / ERR
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7. Control Mode Select Function
The MODE0-3 pins can be selected Seri al mode or CLK-IN mode .
The control mode is set up by the input state of the MODE0-3 pins after releasing standby mode.
MODE3
pin input MODE2
pin input MODE1
pin input MODE0
pin input Function
L
L
L
L
Serial mode
Other than the above CLK-IN mode
Characteristics Symbol Test condition Min Typ. Max Unit
Mode setting
Setup time tmodesu From STBY edge 1 — — μs
Mode setting
Data hold time tmodeho From STBY edge 100 — — μs
VM
MODE0
STBY H
L
H
L
Non
operation
CLK-IN mode
Control Mode
Setting
t
modesu
t
modeho
Serial mode
MODE1 H
L
MODE2 H
L
MODE3 H
L
t
modesu
t
modeho
Non
operation
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8. Functional Description 1 ( f or CLK-IN m ode )
CLK Function
Each up-edge of the CLK signal will shift the motor’s electrical angle per step.
CLK pin input Function
Up-edge Shifts the electr i ca l angle per s tep
Down-edge (State of the electrica l angle d oes not chan ge)
ENABLE Function
The EN pin controls the ON and OFF of the stepping motor outputs. Motor operation starts and stops by setting H and L
to the EN pin. (When EN pin is set to L (OFF), all of the MOSFETs turn off and become high impedance (hereafter, Hi-Z).)
Setting the EN pin to L, and av oiding th e motor to opera te dur ing VM pow er-on and power -of f (i.e. , outsi de of the op erati ng
voltage r ange) is re commende d. Then, sw itch the EN pin to H after t he VM r eaches the t arget voltage and beco mes stable .
EN pin input Function
L OFF (Hi-Z)
H ON (Normal operation mode)
CW-CCW Function and the Output pin Functi on (Output logi c at the time of a
charge star t )
CW-CCW pin controls the rotation direction of the motor. When set to H, the current of OUT_A i s output firs t, with a phase
difference of 90°. When set to L, the current of OUT_B is output first with a phase difference of 90°.
CW-CC W pin input OUT_x+ OUT_x-
L: Counter clockwise
operation (CCW) L H
H: Clockwise operation (CW) H L
NOTE: x = A or B
VM
EN
STBY H
L
H
L
Internal processing time
200μs(Reference value)
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Step Resolution Sel ect Function
Step resolu tion is set up. T C78H 670FTG has the tw o modes, Variable Mode and Fixed M ode. T hese mode s ar e set up by
the input state of MODE0-3 pins after releasing standby mode.
Variable Mode: Variable mode can be started wit h Full step resolution and change d step resolution during
motor operatin g
Fixed Mode: Fixed mode can be started with the mode user selected and continued it during motor operating
MODE3
pin input MODE2
pin input MODE1
pin input MODE0
pin input Mode Function
L L L H
Variable Mode
Full step resolution <-> 1/2 step resolution
(2-phase excitation) (1-2-phase excitation)
L L H L Full step resolution <-> 1/4 step resolution
(2-phase excitation) (W1-2-phase excitation)
L L H H Full step resolution <-> 1/8 step resolution
(2-phase excitation) (2W1-2-phase excitation)
L H L L Full step resolution <-> 1/16 step resolution
(2-phase excitation) (4W1-2-phase excitation)
L H L H Full step resolution <-> 1/32 step resolution
(2-phase excitation) (8W1-2-phase excitation)
L H H L Full step resolution <-> 1/64 step resolution
(2-phase excitation) (16W1-2-phase excitation)
L H H H Full step resolution <-> 1/128 step resolution
(2-phase excitation) (32W1-2-phase excitation)
H L L L
Fixed Mode
Full step resolution (2-phase excitation)
H L L H 1/2 step resolution (1-2-phase excitation)
H L H L 1/4 step resolution (W1-2-phase excitation)
H L H H 1/8 step resolution (2W1-2-phase excitation)
H H L L 1/16 step resolution (4W1-2-phase excitation)
H H L H 1/32 step resolution (8W1-2-phase excitation)
H H H L 1/64 step resolution (16W1-2-phase excitation)
H H H H 1/128 step resolution (32W1-2-phase excitation)
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When Step mode is changed during operating, Step resolution can be set by SET_EN pin and UP-DW pin.
Step mode is changed synchronously with Step Clock.
SET_EN pin input Function
L Setting step mode is invalid
H Setting step mode is available
UP-DW pin input Function
L
Change step mode (lower side) to high resolution
H Change step mode (upper side) to Low resolution
[Example: Full Step ⇔ 1/8 Step]
H
L
H
Step setting
SET_EN
CLK
L
H
UP-DW
L
1/1
1/2
1/4
1/8
1/4
H
L
EN
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Timing Chart of Step Resolution Setting and Initial Angle
The arrow in the below figures indicates the timing of initial angle.
[Full step resolution]
[1/2 step resolut ion]
Note: Timing charts may be simplified for explanatory pur po se.
H
L
+100%
-100%
0%
+100%
-100%
0%
Iout (B)
Iout (A)
CLK
CW CCW
-71%
+71%
H
L
+100%
-100%
0%
+100%
-100%
0%
Iout (B)
Iout (A)
CLK
+71%
-71%
CW
CCW
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[1/4 step resolut ion]
Note: Timing charts may be simplified for explanatory purpose.
+38%
+100%
0%
-71%
-38%
-100%
0%
+71%
-38%
+38%
-71%
+71%
H
L
+100%
-100%
Iout (B)
Iout (A)
CLK
CW
CCW
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[1/8 step resolut ion]
Note: Timing charts may be simplified for explanatory purpose.
CW
CCW
H
L
CLK
+100%
- 100%
0%
Iout (B)
+100%
- 100%
0%
Iout (A)
+96%
+83%
+56%
+38%
+71%
+20%
+96%
+83%
+56%
+38%
+71%
+20%
- 96%
- 83%
- 56%
- 38%
- 71%
- 20%
- 96%
- 83%
- 56%
- 38%
- 71%
- 20%
- 98%
+98%
- 98%
+98%
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[1/16 step resolu tio n]
Note: Timing charts may be simplified for explanatory purpose.
CW
CCW
H
CLK
Iout (B)
+100%
- 100%
0%
Iout (A)
+96%
+83%
+56%
+38%
+71%
+20%
- 96%
- 83%
- 56%
- 38%
- 71%
- 20%
- 98%
+98%
- 100%
0%
+96%
+83%
+56%
+38%
+71%
+20%
- 96%
- 83%
- 56%
- 38%
- 71%
- 20%
- 98%
+98%
+100%
L
8th
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Step Setting and Current Percentage
Current (%) 1/1 1/2 1/4 1/8 1/16 1/32 1/64 1/128
100%
○
○
○
○
○
○
○
○
99%
○
○
○
○
98%
○
○
○
○
○
97%
○
○
○
○
96%
○
○
○
○
○
95%
○
○
94%
○
○
○
93%
○
○
92%
○
○
○
91%
○
○
90%
○
○
○
○
89%
○
○
88%
○
○
○
87%
○
○
86%
○
○
○
85%
○
84%
○
○
83%
○
○
○
○
○
82%
○
○
81%
○
80%
○
○
○
79%
○
○
78%
○
77%
○
○
○
○
76%
○
○
75%
○
74%
○
○
○
73%
○
72%
○
○
71%
○
○
○
○
○
○
○
70%
○
69%
○
○
68%
○
67%
○
○
○
66%
○
65%
○
○
64%
○
63%
○
○
○
○
62%
○
○
61%
○
60%
○
○
○
59%
○
58%
○
○
57%
○
56%
○
○
○
○
○
55%
○
53%
○
○
52%
○
○
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Current (%) 1/1 1/2 1/4 1/8 1/16 1/32 1/64 1/128
51%
○
○
50%
○
49%
○
○
48%
○
47%
○
○
○
○
46%
○
45%
○
○
44%
○
43%
○
○
○
42%
○
41%
○
○
39%
○
38%
○
○
○
○
○
○
37%
○
36%
○
○
35%
○
34%
○
○
○
33%
○
31%
○
○
30%
○
29%
○
○
○
○
28%
○
27%
○
○
25%
○
○
24%
○
○
23%
○
22%
○
○
21%
○
20%
○
○
○
○
○
18%
○
17%
○
○
16%
○
15%
○
○
○
13%
○
12%
○
○
11%
○
10%
○
○
○
○
9%
○
7%
○
○
6%
○
5%
○
○
○
4%
○
2%
○
○
1%
○
0%
○
○
○
○
○
○
○
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Step Resolution and Set Current
STEP
1/128
1/64
1/32
1/16
1/8
1/4
1/2
Full
—
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
θ0 100 0 100 0 100 0 100 0 100 0 100 0 100 0
θ1 100 1
θ2 100 2 100 2
θ3 100 4
θ4 100 5 100 5 100 5
θ5 100 6
θ6 100 7 100 7
θ7 100 9
θ8 100 10 100 10 100 10 100 10
θ9 99 11
θ10 99 12 99 12
θ11 99 13
θ12 99 15 99 15 99 15
θ13 99 16
θ14 99 17 99 17
θ15 98 18
θ16 98 20 98 20 98 20 98 20 98 20
θ17 98 21
θ18 98 22 98 22
θ19 97 23
θ20 97 24 97 24 97 24
θ21 97 25
θ22 96 27 96 27
θ23 96 28
θ24 96 29 96 29 96 29 96 29
θ25 95 30
θ26 95 31 95 31
θ27 95 33
θ28 94 34 94 34 94 34
θ29 94 35
θ30 93 36 93 36
θ31 93 37
θ32 92 38 92 38 92 38 92 38 92 38 92 38
θ33 92 39
θ34 91 41 91 41
θ35 91 42
θ36 90 43 90 43 90 43
θ37 90 44
θ38 89 45 89 45
θ39 89 46
θ40 88 47 88 47 88 47 88 47
θ41 88 48
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STEP
1/128
1/64
1/32
1/16
1/8
1/4
1/2
Full
—
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
θ42 87 49 87 49
θ43 86 50
θ44 86 51 86 51 86 51
θ45 85 52
θ46 84 53 84 53
θ47 84 55
θ48 83 56 83 56 83 56 83 56 83 56
θ49 82 57
θ50 82 58 82 58
θ51 81 59
θ52 80 60 80 60 80 60
θ53 80 61
θ54 79 62 79 62
θ55 78 62
θ56 77 63 77 63 77 63 77 63
θ57 77 64
θ58 76 65 76 65
θ59 75 66
θ60 74 67 74 67 74 67
θ61 73 68
θ62 72 69 72 69
θ63 72 70
θ64 71 71 71 71 71 71 71 71 71 71 71 71 71 71 100 100
θ65 70 72
θ66 69 72 69 72
θ67 68 73
θ68 67 74 67 74 67 74
θ69 66 75
θ70 65 76 65 76
θ71 64 77
θ72 63 77 63 77 63 77 63 77
θ73 62 78
θ74 62 79 62 79
θ75 61 80
θ76 60 80 60 80 60 80
θ77 59 81
θ78 58 82 58 82
θ79 57 82
θ80 56 83 56 83 56 83 56 83 56 83
θ81 55 84
θ82 53 84 53 84
θ83 52 85
θ84 51 86 51 86 51 86
θ85 50 86
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STEP
1/128
1/64
1/32
1/16
1/8
1/4
1/2
Full
—
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
Ach
(%)
Bch
(%)
θ86 49 87 49 87
θ87 48 88
θ88 47 88 47 88 47 88 47 88
θ89 46 89
θ90 45 89 45 89
θ91 44 90
θ92 43 90 43 90 43 90
θ93 42 91
θ94 41 91 41 91
θ95 39 92
θ96 38 92 38 92 38 92 38 92 38 92 38 92
θ97 37 93
θ98 36 93 36 93
θ99 35 94
θ100 34 94 34 94 34 94
θ101 33 95
θ102 31 95 31 95
θ103 30 95
θ104 29 96 29 96 29 96 29 96
θ105 28 96
θ106 27 96 27 96
θ107 25 97
θ108 24 97 24 97 24 97
θ109 23 97
θ110 22 98 22 98
θ111 21 98
θ112 20 98 20 98 20 98 20 98 20 98
θ113 18 98
θ114 17 99 17 99
θ115 16 99
θ116 15 99 15 99 15 99
θ117 13 99
θ118 12 99 12 99
θ119 11 99
θ120 10 100 10 100 10 100 10 100
θ121 9 100
θ122 7 100 7 100
θ123 6 100
θ124 5 100 5 100 5 100
θ125 4 100
θ126 2 100 2 100
θ127 1 100
θ128 0 100 0 100 0 100 0 100 0 100 0 100 0 100
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9. Functional Description 2 ( f or Serial mode)
Under the serial mode, it performs setting and motor control in the following 32 bit format.
For the motor control, each current value is set in the serial setting, and the output is updated to the set current value at
the timing of the LATCH signal.
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
MDT
_A0 MDT
_A1 PHA CA0 CA1 CA2 CA3 CA4 CA5 CA6 CA7 CA8 CA9 — — —
D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31
MDT
_B0 MDT
_B1 PHB CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7 CB8 CB9 TRQ
0 TRQ
1 OPD
Note: Every issuing a command, the current setting transfers by one step.
S_CLK
S_DATA
LATCH
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Register
The registers to use the serial control are shown below.
9.1.1. PHx (x = A or B)
The polality of the output current can be selected by PHx registers for each channel.
PHx Function
L Setting the direction of the output current to minus * Default
H Setting the direction of the output current to plus
9.1.2. Cx0 to Cx9 (x = A or B )
The output of each channel’s DAC for current limitation can be set by Cx0 to Cx9 registers.
The relation between Setting DAC and the output current (Iout) are shown below.
Iout (Max) = Vref (V)× Cx[9:0]
1023 × Setting torque by the torque function (%)
9.1.3. TRQ0 and TRQ1
The value of the motor torq ue can be set by TRQ0 and TRQ1 registers.
TRQ1 TORQ0 Function
L L Torque setting: 100% * Default
L H Torque setting: 75%
H
L
Torque setting: 50%
H H Torque setting: 25%
9.1.4. OPD
An ON/OFF of the open detection function of motor output pins can be switched by OPD register.
OPD Function
L Open detection OFF * Default
H
Open detection ON
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9.1.5. Selectable Mixed Decay Function MDT_x0 and MDT_x1 (x = A or B)
The Sele ctable M ixed Decay can adjust the curr ent rege neration amo unt dur ing the per iod of current regeneration. Thou gh
the Mix ed Decay is determined by controll ing 2 dif ferent types of Decay (Fast D ecay and S low Decay) , this functi on enables
the user to select the ratio of the Mixed Decay using MDT_x0 and MDT_x1 register.
MDT_x1 MDT_x0 Function
L L Fast Decay: 37.5% (Fast Decay = OSCM × 6) * Default
L H Fast Decay: 75%
H L Fast Decay: 50%
H
H
Fast Decay only
Note: x = A or B
Note: Decay control is controlled in order of Charge, Slow Decay and Fast Decay.
Note: The blanking time(AtBLK) is also set to prevent an incorrect operation in the NF detection (the motor current
reaches the set current value (NFth))..
Note: Timing charts may be simplified for explanatory purpose.
Charge Mode -> NF detect -> Slow Decay -> Fast Decay -> 1 fchop cycle ->Charge Mode
OSC internal
signal
NF detection
fchop
(MDT_x1/MDT_x0) = (L/H): Fast Decay: 75%
(MDT_x1/MDT_x0) = (H/H): Fast Decay only
(MDT_x1/MDT_x0) = (L/L): Fast Decay 37.5%
(MDT_x1/MDT_x0) = (H/L): Fast Decay 50%
1fchop cycle: OSCM × 16 clock
Setting current
(NFth)
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Mixed Decay Waveform (Current Waveform) *Charge → Slow Decay → Fast Decay
Note: Timing charts may be simplified for explanatory purpose.
Setting
current
OSC internal
signal
Iout
fchop
fchop
Fast Decay
Slow Decay
Charge
NF Detection
NF Detection
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Constant Cur rent PWM Func t ion an d Timings *Charge → Slow Decay → Fast Decay
The Charge period (the time until the motor current reaches the set current value) is deter mined by the opera ting status.
Therefore the NF detection timing (the motor current reaches the set current value) with the chopping cycle (fcho p) m ay
change. If NF is detected in the early period of the fchop cycle, the Slow Decay will be longer. If NF is detected in the late
period of the fchop cycle, the Slow Decay will be shorter, as shown above.
Note: The chopping cycle is determined as: fchop - (Charge + Fast Decay) = Slow Decay
(Fast Decay ratio can be chan ged by MDT_x0 and MDT_x1 (x = A or B) registers setting.)
Note: Timing charts may be simplified for explanatory purpose.
Fast
Decay
Charge
fchop
Iout
NF detection
MDT setting
OSC
Internal
signal
Setting
current
If NF is detected within the MDT setting, Decay
sequence will only be Fast Decay.(Slow Decay
does not appear.)
Fast Decay
Slow Decay
Charge
fchop
Fast Decay
Slow
Decay
Charge
fchop
MDT setting
Iout
Iout
OSC
Internal
signal
Setting
current Setting
current
OSC
Internal
signal
NF detection NF detection
MDT setting
If the NF is detected during the early timing of the
fchop cycle, the Slow Decay will be longer. If the NF is detected during the late timing of the
fchop cycle, the Slow Decay will be shorter.
TC78H670FTG
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Mixed Decay current wav efor m *Charge → Slow Decay → Fast Decay
When the next current st ep i s hi gher:
Whe n Charge Period i s More T han 1 fchop Cycle:
When the Charge per iod is lon ger t han fchop cy cle, th e C h arge perio d extends unti l t he mo tor curr en t reaches t h e NF
threshold. Once the current reaches the next current step, then the sequence goes on to Decay mode.
• When the Next Current Step is lower:
Note: Timing charts may be simplified for explanatory purpose.
Setting
current
Slow
Slow
Slow
Slow
Fast
Fast
Charge
Charge
Fast
Charge
Fast
Charge
Setting
current
NF
NF
NF
NF
Setting
current
NF
NF
NF
Charge
mode will appear per each fchop cycle to check the
current level using RS comparator. If the current level
is
already above the current set level, the sequence will
be
switched to Slow Decay in a very short period.
fchop
fchop
fchop
fchop
Setting
current
OSC
Internal
signal
Slow
Fast
Charge
Slow
Fast
Charge
Fast
Slow
Charge
Setting
current
Slow
Slow
Slow
Fast
Fast
Charge
Charge
Fast
Charge
Setting
current
NF
NF
NF
OSC
Internal
signal
fchop
fchop
fchop
fchop
NF
Fast
Slow
Charge
fchop
fchop
fchop
fchop
OSC
Internal
signal
TC78H670FTG
25 2019-11-28
Serial Setting Example when driving a motor
Serial setting example for motor operation is shown below.
The motor operates with full step resolution by transmitting from the 1st to 4th commands repeatedly.
1st Command
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
0 0 1 1 1 1 1 1 1 1 1 1 1 0 0 0
D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31
0 0 1 1 1 1 1 1 1 1 1 1 1 0 0 0
2nd Command
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0
D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31
0
0
1
1
1
1
1
1
1
1
1
1
1
0
0
0
3rd Command
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0
D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31
0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0
4th Command
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
0 0 1 1 1 1 1 1 1 1 1 1 1 0 0 0
D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31
0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0
TC78H670FTG
26 2019-11-28
10. Common Functi on (CLK-IN Mode and Serial Mode)
Error Function (Error detect fla g output)
When TC78H670FTG detects some errors, ERR pin outputs low level to peripheral block.
Since ERR pin and EN pin share the function, the below peripheral circuit between TC78H670FTG and HOST MCU
should be inserted. In normal status, since the internal MOSFET is OFF, the level of ERR pin is equal to the MODE
control voltage from outside. When the error function (Thermal shutdown (TSD), Over current (ISD), or motor load
open (OPD)) occurs, ERR pin will become Low (the internal MOSFET is ON). When the error detection is released
by reasserting the VM power supply or setting the device to STANDBY mode, ERR pins show “normal status”.
Note: This figure may be simplified for explanatory purpose.
Note: It is possible to detect OPD only when Serial mode is selected.
ERR pin output Function
H Normal status (N orma l oper at i on)
L Detect error stat us (ISD, TSD, OPD)
After detecting TSD detection: TC78H670FTG draws out currents of motor by Fast mode. If the output current is zero-
detected or for 1ms at maximum, the output becom es Hi-Z.
After detecting ISD detection: In H Brid ge high-side (Pch DMOS) detection, TC78H670FTG draws out currents of motor
by Slow mode on low-side. The output after 80 ms (typ.) becomes Hi-Z. In H Bridge low-side (Nch DMOS) detection, it
draws out by Slow mode on high-side.
Note: A b ov e times are refer e n ce valu es, and are not guar a nt eed.
EN/ERR
TSD
ISD
ERR
EN
OPD
TC78H670FTG HOST MCU
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STANDBY Function
It is possible to switch to Standby mode by STBY pin.
STBY pin input Function MEMO
L
Standby mode
Electrical angle: 45°
H Normal operatio n —
Note: When STBY pin is Low, TC78H670FTG stop supplying the power to logic circuit.
Therefore, Logic circuit is reset and Electrical angle and Step mode are initialized.
STBY H
L
Standby mode
Mode
Normal mode
Internal processing time
100μｓ(Reference value)
Output current
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11. Output Transisto r Function Mode
Note: The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory
purposes.
Output Transis tor Function
MODE U1 U2 L1 L2
Charge ON OFF OFF ON
Slow OFF OFF ON ON
Fast OFF ON ON OFF
Note: This table show s an ex ample of w hen the current flows as i ndicated by the arrow s in the figu res show n above.
If the current flows in the opposite direction, refer to the following table.
MODE U1 U2 L1 L2
Charge OFF ON ON OFF
Slow OFF OFF ON ON
Fast
ON
OFF
OFF
ON
This IC controls the motor current to be constant by changing 3 modes listed above automatically
U1 U2
OFF
U1 U2
Load
PGND_x
VM
Load
PGND_x
VM
OFF
OFF
L1 L2 L2
OFF
L1
ON
ON ON ON OFF
U1 U2
Load
PGND_x
VM
L1
OFF
L2
ON
ON
Charge mode
A current flow into the
motor coil.
Slow mode
A current circulates around
the motor coil and this device.
Fast mode
The energy of the motor coil
is feed back to the power.
OUT_x+ OUT_x- OUT_x+ OUT_x- OUT_x+
OUT_x-
x = A or B
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Description of H Bridge Operation
To eliminate shoot-through current that flows from supply to ground due to the simultaneous conduction of high side
and low side transistors in the bridge output, a dea d time is gener at ed i n this IC w hen tran si stor s switch from o n t o of f
(t2), or vice versa (t4).
U1 U2
OFF
OFF
U1 U2
OFF
Load
U1 U2
Load
PGND_x
VM
Load
PGND_x
VM
PGND_x
VM
OFF
OFF
OFF
L1 L2 L1 L2 L2
OFF
U1 U2
OFF
Load
U1 U2
Load
VM
PGND_x
VM
OFF
L1 L2 L1
OFF
t1 t2 t3
t4 t5
OUT_x+
OFF
L2
PGND_x
OFF L1
x =A or B
ON
ON ON ON ON
ON
ONON
OUT_x- OUT_x+ OUT_x- OUT_x+ OUT_x-
OUT_x+ OUT_x- OUT_x+ OUT_x-
VM
PGND_x
t3
t1 t5
t2
100ns
(Reference value)
Output voltage
waveform
OUT_x+
(x = A or B)
t4
100ns
(Reference value)
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12. Calcul a ti on of t he Pre de f ined Output Curre nt
The peak output current (Setting current value) can be set via the reference voltage (Vref), as follows:
Iout (Max) = 1.1 × Vref (V)
13. OSCM Oscilla ti on Freque ncy and Ch opping Frequency
The OSCM oscillation frequency ( fOSCM) and ch opping freq uency (fchop) can be adjusted by the ex ternal resi stor (ROSC)
connecting to OSCM pin.
ROSC[kΩ] fOSCM [kHz](typ.) fchop[kHz](typ.)
18 3290 206
22 2691 168
30
1982
124
39 1526 95
47 1266 79
56 1064 66
75
795
50
91 656 41
If chopping frequency is raised, Ripple of current will become small and wave-like reproducibility will improve.
However, the gate loss inside IC goes up and generation of heat becomes large.
By lowering chopping frequency, reduction in generation of heat is expectable. However, Ripple of current may become
large.
It is a standard about 70 kHz. A setup in the range of 50 kHz to 100 kHz is recommended.
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14. Absolute Maximum Ratings (Ta = 25°C)
Characteristics Symbol Rating Unit Remarks
Motor output voltage Vout 20 V Outputs are OFF
18 V Outputs are ON
Motor power supply (non active) VM 20 V STBY pin = L
Motor power supply (active)
-0.4 to 18
V
STBY pin = H
Motor output current Iout 2.0 A (Note 1)
Logic input voltage VIN(H) 6.0 V —
VIN(L) -0.4 V —
ERR output pin voltage VLO 6.0 V —
ERR output pin inflow current ILO 6.0 mA —
Power dissipation PD 1.79 W (Note 2)
Operating temperature Topr -40 to 85 °C —
Storage temperature Tstg -55 to 50 °C —
Junction temperature Tj(max) 150 °C —
Note1: Usually, the maximum current value at the time should use 70% or less of the absolute maximum ratings for
a standard on thermal rating. The maximum output current may be further limited in view of thermal
considerations, depending on ambient temperature and board conditions.
Note2: Device alone (Ta =25°C)
When Ta exceeds 25°C, it is necessary to do the derating with 14.3 mW/°C.
Ta: Ambient temperature
Topr: Ambient temperature while the IC is active
Tj: Junction temperature while the IC is active.
The maximum junction temperature is limited by the thermal shutdown (TSD) circuitry. It is advisable to
keep the maximum current below a certain level so that the maximum junction temperature, Tj (MAX), will
not exceed 120°C.
Caution) Absolute maximum ratings
The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded,
even for a moment. Do not ex ceed any of th ese rating s. Exceeding the ratin g (s) may c ause device bre akdown,
damage or deterioration, and may result in injury by explosion or combustion.
The value of even one parameter of the absolute maximum ratings should not be exceeded under any
circumstances. The TC78H670FTG does not have overvoltage detection circuit. Therefore, the device is
damaged if a voltage exceeding its rated maximum is applied.
All voltage ratings, including supply voltages, must always be followed. The other notes and Considerations
described later sho uld also be referred to.
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15. Operati ng Ra nge (Ta = -40 to 85°C)
Characteristics Symbol Min Typ. Max Unit Remarks
Motor power supply VM 2.5 - 16.0 V -
Motor output current Iout - 1.1 2.0 A (Note 1)
ERR pin output voltage VLO - - 5.5 V -
Vref reference voltage Vref 0 - 1.8 V -
Note1: M ax imum current for actual us age may be limited by the operating circumstances such as operati ng conditions
(exciting mode, operating time, and so on), ambient temperature, and heat conditions (board condition and
so on).
16. Electrical Specifications 1
(Ta = 25° C, VM = 2.5 to 16V unless other wise specified)
Characteristics Symbol Test condition Min Typ. Max Unit
Logic input voltage HIGH VIN(H) Logic input (Note1) 1.5 — 5.5 V
LOW VIN(L) Logic input (Note1) 0 — 0.7 V
Logic input hy stere si s volta ge VIN(HYS) Logic input (Note1) — 60 — mV
Logic input curre nt HIGH IIN(H) VIN(H) = 3.3 V — 33 45 μA
LOW IIN(L) VIN(L) = 0 V — — 1 μA
ERR pin output voltage LOW VOL(LO) IOL = 5 mA, output = L — — 0.5 V
Current consum ptio n
IM1 Output pins = open
Standby mode — — 0.1 μA
IM2
Output pins = open
EN pin = L
in releasing Standby mode — 2.8 3.5 mA
IM3 Output pins = open
Full step resolut ion
fCLK=75 kHz — 3.3 4.3 mA
Output leakage current
High-side
IOH
VM = 18 V, Vout = 0 V
—
—
1
μA
Low-side IOL VM = Vout = 18 V -1 — — μA
Motor current channel differential ΔIout1 Current differential between Ch -5 0 5 %
Motor current setting ac curacy ΔIout2 Iout = 1.1 A -5 0 5 %
Motor output ON resistance
(High side + Low side) Ron(H+L) Tj = 25°C,
VM = 12 V, Iout = 1 A — 0.48 0.6 Ω
Note: When the logic signal is applied to the device whilst the VM power supply is not asserted; the device is
designed not to function, but for safe usage, please apply the logic signal after the VM power supply is
asserted and the VM voltage reaches the proper operating range.
Note1: VIN(H) is define d as the VIN voltage that cau ses the outputs ( OUT_A+ pin, OUT_A- pin, OUT_B+ pin, OUT_B-
pin) to change when a pin under test is gradually raised from 0 V.VIN(L) is defined as the VIN voltage that
causes the outputs (OUT_A+ pin, OUT_A- pin, OUT_B+ pin, OUT_B- pin) to change when the pin is then
gradually lowered fr om 5V. The difference between VIN(H) and VIN(L) is defined as the VIN(HYS).
TC78H670FTG
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17. Electrical Specifications 2
(Ta = 25°C, VM = 2.5 to 16V unless otherwise specified)
Characteristics Symbol Test condition Min Typ. Max Unit
Vref input curre nt
Iref
Vref = 1.8 V
—
0
1
μA
Thermal shutdown (TSD )
threshold (Note1) TjTSD — 145 165 175 °C
UVLO release voltage (Note 2)
VUVLO
At rising VM
2.1
2.3
—
V
UVLO hysteresis voltage
Vhys_uvlo
—
—
200
—
mV
Over current detection (ISD)
threshold (Note3) ISD VM = 12V 2.5 3.2 4.2 A
Note1: Thermal shutdown (TSD)
When the junction temperature of the device reaches the TSD threshold, the TSD circuit is triggered; the internal reset
circuit then turns off the output transistors. Noise rejection blanking time is built-in to avoid misdetection. Once the TSD
circuit is tri ggered, t he devic e w ill set out put pin to H i-Z, and can be cleared by r easser ting t he VM pow er sourc e, or s etti ng
the STBY pins to standby mode. The TSD circuit is a backup function to detect a thermal error, therefore is not
recommended to be used aggressively.
Note 2: Under voltage lockout ( UVLO)
W hen t he s u pply voltage to VM pin is 2.1 or less (typ.), the internal circuit is triggered; the internal reset circuit then turns
off the output transistors. Once the UVLO is triggered, it can be cleared by reasserting the VM supply voltage to 2.3V or
more (typ.)
Note3: Over current detection (ISD)
When the output current reach es the thres hold, th e ISD circui t is trig gered; th e internal re set circuit then turn s off the ou tput
transistors. It has a dead band time of 1.2 μs (typ.) to avoid ISD false tri gger ing by switchin g nois e. O nce th e ISD circ uit i s
triggered, the device will set output pins to Hi-Z, and can be cleared by reasserting the VM power source, or setting the
STBY pins to standby mode.
Dead band time: 1.2 μs (typ.)
Output current
ISD threshold
Slow mode
80ms (typ.) Output pins to Hi-Z
Note: Above ISD operation threshold value and band times are reference values, and are not guaranteed.
0.0
1.0
2.0
3.0
4.0
5.0
0 5 10 15 20
ISD threshold[A]
VM [V]
VM-ISD threshold
H Bridge high-side
Pch DMOS
H Bridge low-side
Nch DMOS
TC78H670FTG
34 2019-11-28
Back-EMF
While a motor is rotating, there is a timing at which power is fed back to the power supply. At that timing, the motor
current recirculates back to the power supply due to the effect of the motor back-EMF.
If the power supply does not have enough sink capability, the power supply and output pins of the device might rise
above the rated voltages. The magnitude of the motor back-EMF varies with usage conditions and motor characteristics.
It must be fully verified that there is no risk that the TC78H670FTG or other components will be damaged or fail due to
the motor back-EMF.
Cautions on Overcurrent Shutdown (ISD) and Thermal Shutd own (TSD)
The ISD and TSD circuits are only intended to provide temporary protection against irregular conditions such as an
output short-circuit; they do not necessarily guarantee the complete IC safety.
If the device is used beyond the specified operating ranges, these circuits may not operate properly: then the device may
be damaged due to an output short-circuit.
The ISD circuit is only intended to provide a temporary protection against an output short-circuit. If such a conditi on
persists for a long time, the device may be damaged due to overstress. Overcurrent conditions must be removed
immediately by external hardware.
IC Mounting
Do not insert devices incorrectly or in the wrong orientation. Otherwise, it may cause breakdown, damage and/or
deterioration of the device.
TC78H670FTG
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18. AC Electrical Specification 1
(Ta = 25°C, VM =12V, 6.8 mH/5.7 Ω un l es s o th erwise specif ied )
Characteristics Symbol Test condition Min Typ. Max Unit
CLK input frequency fCLK — — — 400 kHz
Inside filter of CLK input
minimum High width tCLK(H) The CLK(H) minimum pulse width 500 — — ns
Inside filter of CLK inp ut
minimum Low width tCLK(L) The CLK(L) minimum pulse width 500 — — ns
Output transistor
switchi ng specific
tr — 10 20 30 ns
tf — 10 20 30 ns
tpLH(CLK) — — 840 — ns
tpHL(CLK) — — 900 — ns
Analog noise blanking time AtBLK VM = 12 V 340 540 740 ns
Oscillator frequency accuracy ∆fOSCM ROSC = 47 kΩ
VM = 2.5 V to 16 V -15 — +15 %
Oscillator reference frequency fOSCM ROSC = 47 kΩ 1076 1266 1456 kHz
Chopping frequency
fchop
Output: Active, fOSCM = 1266 kHz
—
79
—
kHz
AC Electric al Specifi cation Timing chart
Note: Timing charts may be simplified for explanatory purpose.
Output
OUT_A+
OUT_A-
OUT_B+
OUT_B-
CLK
tCLK(L)
50% 50% 50%
90% 90%
50%50%
10% 10%
tCLK(H)
tpHL(CLK)
tpLH(CLK)
tr tf
1/fCLK
TC78H670FTG
36 2019-11-28
19. AC Electrical Specification 2
(Ta = 25°C, VM = 2.5 to 16V unless otherwise specified)
Characteristics Symbol Test condition Min Typ. Max Unit
No.in Timing
Chart
Serial CLK frequency fSCLK VIN = 3.3 V 1.0 — 25 MHz —
CLK Cycle tsCKW VIH = 3.3 V, VIL = 0 V,
tr = tf = 23 ns 46 — — ns —
Minimum CLK pulse width
tw(CLK)
VIN = 3.3 V
40 — — ns 1
twp(CLK) 20 — — ns 2
twn(CLK) 20 — — ns 3
Minimum LATCH pulse width tLATCH (H) VIN = 3.3 V 20 — — ns 4
Data setup time tsuSIN - CLK
VIN = 3.3 V 10 — — ns 5
tsuLT - CLK 10 — — ns 6
Data hold time thSIN - CLK VIN = 3.3 V 10 — — ns 7
thLT - CLK 40 — — ns 8
tw (CLK)
twn(CLK) twp(CLK)
50%
50%
tsuLT - CLK
tLATCH(H)
thLT - CLK
thSIN - CLK
tsuSIN - CLK
50% 50% DATA15 DATA0
S_CLK
LATCH
S_DATA
50%
DATA1
H
L
L
H
H
L
6 8
1
3 2
5 4
7
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37 2019-11-28
20. (Reference data) PD–Ta Charact er isti c s
When mount ed on the boar d (J E DE C 4 l ayers)
Note: Characteristics shown above are reference values and not guaranteed.
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
025 50 75 100 125 150
PD(W)
Ta (ºC)
PD -Ta
TC78H670FTG
38 2019-11-28
21. Application Circuit Example
The application circuit shown in this document is provided for reference purposes only. The data for mass production are
not guaranteed.
Component values (for reference only)
Part’s sy mbol Component Reference constant nu mber
CVM1 Electrolytic capacitor 47 μF
CVM2
Ceramic capacitor 0.1 μF
CVREF
Ceramic capacitor 0.1 μF
CEN
Ceramic capacitor 22 nF
ROSC Resistor 47 kΩ
REN
Resistor 10 kΩ
Note: Constant numbers in above table are for reference only. Some components outside of the range can be
adopted depending on the usage conditions.
TC78H670FTG
OUT_A+
STBY VM
PGND_A
AGND
VREF
OSCM
OUT_A-
OUT_B+
OUT_B-
PGND_B
VREF
MCU
VM
CVREF CVM2 CVM1
ROSC
REN
CEN
MODE2/CLK/S_CLK
MODE1/SET_EN/LATCH
EN/ERR
MODE0/UP-DW/S_DATA
MODE3/CW-CCW
TC78H670FTG
39 2019-11-28
22. Package Dim e ns ions
P-VQFN16-0303-0.50-001
Unit: mm
Weight: 22.9 mg (typ.)
TC78H670FTG
40 2019-11-28
Notes on Contents
1. Block Diagrams
Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory
purposes.
2. Equivalent Circuits
The equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes.
3. Timing Charts
Timing charts may be simplified for explanatory purposes.
4. Application Circuits
The application circuits shown in this document are provided for reference purposes only. Thorough evaluation is
required, especially at the mass production design stage.
Providing these application circuit examples does not grant a license for industrial property rights.
TC78H670FTG
41 2019-11-28
IC Usage Considerations
Notes on handling of ICs
(1) The absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even
for a moment. Do not exceed any of these ratings.
Exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury b y
explosion or comb ust ion.
(2) Use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of over
current and/or IC failure. The IC will fully break down when used under conditions that exceed its absolute
maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring
or load, causing a large current to continuously flow and the breakdown can lead smoke or ignition. To minimize
the effects of the flow of a large current in case of breakdown, appropriate settings, such as fuse capacity, fusing
time and insertion circ uit lo cati on, are required.
(3) If your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to
prevent device malfunction or breakdown caused by the current resulting from the inrush current at power ON or
the negative current resulting from the back electromotive force at power OFF. IC breakdown may cause injury,
smoke or ignition. Use a stable power supply with ICs with built-in protection functions. If the power supply is
unstable, the protection function may not operate, causing IC breakdown. IC breakdown may cause injury,
smoke or ignition.
(4) Do not insert devices in the wrong orientation or incorrectly.
Make sure that the positive and negative terminals of power supplies are connected properly. Otherwise, the
current or power consumption may exceed the absolute maximum rating, and ex ceed ing th e rati ng(s) may cause
the device breakdown, damage or deterioration, and may result injury by explosion or combustion. In addition, do
not use any device that is applied the current with inserting in the wrong orientation or inc orrectly even just one
time.
(5) Carefully select ex ternal co mpon ent s (such as inputs and negat iv e fee dba ck capac itor s) and load components
(such as speakers), for example, power amp and regulator. If there is a large amount of leakage current such as
from input or negative feedback condenser, the IC output DC voltage will increase. If this output voltage is
connected to a speaker with low input withstand voltage, overcurrent or IC failure may cause smoke or ignition.
(The overcurrent may cause smoke or ignition from the IC itself.) In particular, please pay attention when using a
Bridge Tied Load (BTL) connection-type IC that inputs output DC voltage to a speaker directly.
TC78H670FTG
42 2019-11-28
Points to remember on handling of ICs
(1) Over current Protection Circuit
Over current protection circuits (referred to as current limiter circuits) do not necessarily protect ICs under all
circumstances. If the Over current protection circuits operate against the over current, clear the over current
status immediately.
Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings c an cau se
the over current protection circuit to not operate properly or IC breakdown before operation. In addition,
depending on the method of use and usage conditions, if over current continues to flow for a long time after
operation, the IC may generate heat resulting in breakdown.
(2) Thermal Shutdown Circuit
Thermal shutdown circuits do not necessarily protect ICs under all circumstances. If the thermal shutdown
circuits operate against the over temperature, clear the heat generation status immediately.
Depending on the method of use and usage conditions, such as exceeding absolute maximum ratings c an cau se
the thermal shutdown circuit to not operate properly or IC breakdown before operation.
(3) Heat Radiation Design
In using an IC with large current flow such as power amp, regulator or driver, please design the device so that
heat is appropriately radiated, not to exceed the specified junction temperature (Tj) at any time and condition.
These ICs generate heat even during normal use. An inadequate IC heat radiation design can lead to decrease
in IC life, deterioration of IC characteristics or IC breakdown. In addition, please des ign the dev ice tak ing into
considerate t he effect of IC heat radiation with peripheral components.
(4) Back-EMF
When a motor reverses the rotation direction, stops or slows down abruptly, a current flow back to the motor’s
power supply due to the effect of back-EMF. If the current sink capability of the power supply is small, the
device’s motor power supply and output pins might be exposed to conditions beyond absolute maximum ratings.
To avoid this problem, take the effect of back-EM F into cons ider at ion in system design.
TC78H670FTG
43 2019-11-28
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